Electrical Resistance

Transcription

1 Electrical Resistace I + V _ W Material with resistivity ρ t L Resistace R V I = L ρ Wt (Uit: ohms) where ρ is the electrical resistivity

2 Addig parts/billio to parts/thousad of dopats to pure Si ca chage resistivity by 8 orders of magitude! Resistivity Rage of Materials Si with dopats SiO2, Si3N4 Ω-m = 00 Ω-cm 2

3 The Si Atom The Si Crystal diamod structure High-performace semicoductor devices require defect-free crystals 3

4 Carrier Cocetratios of Itrisic (udoped) Si electro - Bottom of coductio bad Eergy gap =.2 ev hole + Top of valece bad (electro coc) = p (hole coc) = i 4

5 Dopats i Si By substitutig a Si atom with a special impurity atom (Colum V or Colum III elemet), a coductio electro or hole is created. Doors: P, As, Sb Acceptors: B, Al, Ga, I 5

6 Semicoductor with both acceptors ad doors has 4 kids of charge carriers Hole Electro Mobile Charge Carriers they cotribute to curret flow with electric field is applied. Ioized Door Ioized Acceptor Immobile Charges they DO NOT cotribute to curret flow with electric field is applied. However, they affect the local electric field 6

7 Charge Neutrality Coditio Eve N A is ot equal to N D, microscopic volume surroudig ay positio x has zero et charge Valid for homogeeously doped semicoductor at thermal equilibrium Si atom (eutral) Ioized Door Ioized Acceptor Hole Electro Electros ad holes created by Si atoms with coc i 7

8 Electro ad Hole Cocetratios for homogeeous semicoductor at thermal equilibrium : electro cocetratio (cm -3 ) p : hole cocetratio (cm -3 ) N D : door cocetratio (cm -3 ) N A : acceptor cocetratio (cm -3 ) Assume completely ioized to form N D + ad N A - ) Charge eutrality coditio: N D + p = N A + 2) Law of Mass Actio : p = i 2 Note: Carrier cocetratios deped o NET dopat cocetratio (N D - N A )! 8

9 -type Semicoductor If N D >> N A (such that N D N A 0 i ): + = N D /cm 3 N A /cm 3 -type N D N A ad p N D 2 i N A Note >> p 9

10 p-type Semicoductor If N A >> N D (such that N A N D 0 i ): + = N A /cm 3 N D /cm 3 p-type p N A N D ad N A 2 i N D Note p >> 0

11 Carrier Drift Whe a electric field is applied to a semicoductor, mobile carriers will be accelerated by the electrostatic force. This force superimposes o the radom thermal motio of carriers: E.g. Electros drift i the directio opposite to the E-field Curret flows electro 4 electro 5 5 E =0 E Average drift velocity = v = µ E Carrier mobility

12 Carrier Mobility Mobile carriers are always i radom thermal motio. If o electric field is applied, the average curret i ay directio is zero. Mobility is reduced by ) collisios with the vibratig atoms phoo scatterig - - Si 2) deflectio by ioized impurity atoms Coulombic scatterig - B- - As+ 2

13 Carrier Mobility µ Mobile charge-carrier drift velocity v is proportioal to applied E-field: v = µ E µ Mobility depeds o (N D + N A )! (Uit: cm 2 /V s) µ p 3

14 Electrical Coductivity σ Whe a electric field is applied, curret flows due to drift of mobile electros ad holes: electro curret J = ( q) v = qµ E desity: hole curret desity: total curret desity: coductivity J J J σ = ( + q) pv = qp µ p p p = σe qµ p p E = J + J = ( qµ + qpµ ) E + qpµ p 4

15 Electrical Resistivity ρ ρ σ = q µ + qpµ p ρ qµ for -type ρ qpµ p for p-type (Uit: ohm-cm) Note: This plot does ot apply for compesated material! 5

16 Example Calculatio Si 0 6 Boro/cm 3 What are ad p values? What is its electrical resistivity? Aswer: N A = 0 6 /cm 3, N D = 0 (N A >> N D p-type) p 0 6 /cm 3 ad 0 4 /cm 3 ρ = = q µ + qpµ qpµ p [ ] 9 6 (.6 0 )(0 )(450) =.4 Ω cm From µ p vs. ( N A + N D ) plot p 6

17 Example Calculatio 2: Dopat Compesatio EE43 S06 Si 0 6 Boro/cm Arseic/cm 3 What are ad p values? What is its electrical resistivity? Aswer: N A = 0 6 /cm 3, N D = 0 7 /cm 3 (N D >>N A -type) = * The p-type sample is coverted to -type material by addig more doors tha acceptors, ad is said to be compesated. 9x0 6 /cm 3 ad p.x0 3 /cm 3 ρ = q µ + qpµ qµ p [ ] 9 6 (.6 0 )(9 0 )(600) = 0.2 Ω cm From µ vs. ( N A + N D ) plot 7

18 Summary of Dopig Termiology itrisic semicoductor: udoped semicoductor extrisic semicoductor: doped semicoductor door: impurity atom that icreases the electro cocetratio group V elemets (P, As)i Si acceptor: impurity atom that icreases the hole cocetratio group III elemets (B, I) i Si -type material: semicoductor cotaiig more electros tha holes p-type material: semicoductor cotaiig more holes tha electros majority carrier: the most abudat mobile carrier i a semicoductor miority carrier: the least abudat mobile carrier i a semicoductor mobile carriers: Charge carriers that cotribute to curret flow whe electric field is applied. 8

19 W I + L Sheet Resistace R S V Material with resistivity ρ R s is the resistace whe W = L _ R s t ρ t L = ρ Wt R s value for a give coductive layer (e.g. doped Si, metals) i IC or MEMS techology is used for desig ad layout of resistors for estimatig values of parasitic resistace i a device or circuit R = R s L W (uit of R S i ohms/square) if ρ is idepedet of depth x 9

20 R S whe ρ(x) is fuctio of depth x I + V _ ρ, dx ρ 2, dx ρ 3, dx. ρ, dx R S = W dx ρ + dx ρ 2 + dx ρ 3 + L... + dx ρ = ( σ + σ 2 + t.. σ depth x )dx For a cotiuous σ(x) fuctio: R S = = t 0 σ ( x) dx t [ qµ ( x) ( x) + qµ p( x) p( x) ] 0 dx 20

21 Electrical Resistace of Layout Patters (Uit of R S : ohms/square) Metal cotact Top View W = µm m R = R s L=µm R = R s m R 2.6R s R = 3R s R = R s /2 R = 2R s 2

22 How to measure R S? (Typically, s mm >>t) The Four-Poit Probe is used to measure R s 4 probes are arraged i-lie with equal spacig s 2 outer probes used to flow curret I through the sample 2 ier probes are used to sese the resultat voltage drop V with a voltmeter For a thi layer (t s/2), V R s = I For derivatio of expressio, see EE43 Lab Maual If ρ is kow, the R s measuremet ca be used to determie thickess t 22

23 Electro mobility vs. T For referece oly Hole mobility vs. T 23