Applied Electronic I. Lecture Note By Dereje K. Information: Critical. Source: Apple. Ref.: Apple. Ref.

Transcription

1 Applied Electroic I Lecture Note By Dereje K. Iformatio: Source: Apple Ref.: Apple Ref.: IBM Critical dimesio (m) Ref.: Palo Alto Research Ceter 1

2 Itroductio to Electroic Devices Fudametals of Semicoductors.1 Semicoductors Geeral Iformatio.1.1 Geeral Material Properties.1. Structural Properties of Materials.1..1 Classificatio of semicoductig materials.1.. The uit cell.1..3 Diamod crystal structure.1..4 Crystal Plaes ad Miller Idices.1.3 Basics of Crystal Growth. Basics of Solid State Physics..1 The Hydroge Atom.. Eergy bads..3 Bad structure i Semicoductors..4 Eergy-Mometum Diagram..5 Electro eergy i a Solid

3 ..6 Material ad Carrier Properties..6.1Carrier Cocetratio i Semicoductors..6. Desity of States..6.3 Fermi-Dirac Statistic..6.4 Fermi Eergy i Solids..7 Itrisic carrier cocetratio..8 Doors ad Acceptors..9 Electros ad Holes i Semicoductor.1.10 Compesated Semicoductors.1.11 Miority ad Majority Carriers..1 Degeerated ad No-degeerated Semicoductors..13 Bulk Potetial 3

4 .1 Semicoductors Geeral Iformatio The purpose of this part of the lecture is to itroduce the solid state physics cocepts, which are eeded to uderstad semicoductor materials ad semicoductor devices. This part of the lecture is kept as comprehesive as possible..1.1 Geeral Material Properties Solid-state materials ca be grouped i terms of their coducttivity or resistiviy. Accordigly three classes of materials ca be dified: Isulators, Semicoductors ad coductors. The coductivity of semicoductors is geerally sesitive to temperature, illumiatio, radiatio, magetic fields ad impurity atoms. 4

5 .1.1 Geeral Material Properties Rage of electrical coductivities σ. Correspodig resistivity: ρ = 1 σ Classificatio of materials i terms of their coductivity or resititivity. 5

6 .1.1 Geeral Material Properties Periodic table of semicoductor materials All materials listed i this periodic table are of iterest for electroic applicatios. However, silico (Si) ad gallium arseide (GaAs) are the most most importat materials. Germaium (Ge) is oly of iterest for iche applicatios. Silico has substituted germaium maily due to the properties of silico oxide. Ref.: M.S. Sze, Semicoductor Devices 6

7 .1.1 Geeral Material Properties Periodic table of semicoductor materials GaAs is a compoud semicoductor, meaig it is a alloy of gallium ad arseic. GaAs is o-toxic i its solid state phase. GaAs is a III/V semicoductor, because it is composed of material out of colum III ad colum V of the periodic table. GaAs ca be see as a alloy of gallium ad arseic. Other importat materials out of the group of III/V semicoductors are Idium Phosphide (IP), ad Gallium Nitride (GaN). The electrical ad the optical properties of III/V compoud materials are differet from the properties of silico. The materials are of mai iterest for high speed electroics, photoics, optical commuicatio ad high-ed solar cells. 7

8 .1. Structural Properties of Materials.1..1 Classificatio of semicoductig materials I order to build electroic devices we have to uderstad the electroic trasport of charges i the material. However, the electroic properties of electroic material highly deped o the strucutral properties of the material. Based o the strucutral propeties of the material differet classes of materials ca be distiguished: Amorphous materials, polycrystallie materials ad (moo)crystallie materials. The structural order of materials highly depeds o the fabricatio method ad temperatures. I geeral, the higher the structural order of the material the better the charges ca move i the semicoductig material. 8

9 .1..1 Classificatio of semicoductig materials Amorphous materials Poly crystallie materials (Moo)Crystallie materials No log-rage order Completely ordered i segmets Etirely ordered solid Ref.: R.F. Pierret, Semicoductor Fudametals 9

10 .1.. The uit cell The periodic arragemet of atoms is called lattice! A uit cell of a material represets the etire lattice. By repeatig the uit cell throughout the crystal, oe ca geerate the etire lattice. Primitive uit cell. A uit cell ca be characterized by a vector R, where a, b ad c are vectors ad m, ad p are itegers, so that each poit of a lattice ca be foud. R=ma+b+pc The vectors a, b, ad c are called the lattice costats. Ref.: M.S. Sze, Semicoductor Devices 10

11 .1.. The uit cell Differet uit cells based o cubic uit cells Simple cubic uit cell Body cetered cubic uit cell (bcc) Face cetered cubic uit cell (fcc) Ref.: M.S. Sze, Semicoductor Devices 11

12 .1..3 Diamod crystal structure Silico ad germaium have a diamod crystal structure. The silico structure belogs to the class of face ceter cubic uit cells. A silico uit cell cosists of eight silico atoms. Diamod lattice. The structure ca be see as two iterpeetratig face cetered crystal sublattices with oe sublattice displaced from the other by oe quarter of the distace alog the body diagoal of the cube. Ref.: M.S. Sze, Semicoductor Devices 1

13 .1..3 Diamod crystal structure Most of the III/V semicoductors grow i a zicblede lattice, which is idetical to a diamod lattice except that oe of face ceter cubic cell sublattices has gallium atom ad the other arseic atoms. Zicblede lattice. Ref.: M.S. Sze, Semicoductor Devices 13

14 .1..4 Crystal Plaes ad Miller Idices Miller Idices of some importat plaes i a cubic crystal. Crystal properties alog differet plaes are differet ad the electrical, thermal ad mechaical properties ca be depedet o the crystal orietatio. Idices (Miller idices) were itroduced to defie various plaes i a crystal. Ref.: M.S. Sze, Semicoductor Devices 14

15 .1..4 Crystal Plaes ad Miller Idices Example: Determie the crystal plae The plae has iterceptios at a, 3a ad a alog the three coordiates. Takig the reciprocals of the itercepts, we get 1, 1/3 ad ½. The three smallest itegers have the ratio 6,, ad 3. Thus, the plae is referred to be the (63) plae. Ref.: M.S. Sze, Semicoductor Devices 15

16 .1..4 Crystal Plaes ad Miller Idices Covetios how to defie Miller idices: (hkl): For a plae that itercepts the x-axis o the egative side of the origi such as (100). [hkl]: For a crystal directio, such as [100] for the x-axis. By defiitio, the [100]-directio is perpedicular to the (100)-plae, ad the [111]-directio is perpedicular to the (111)-plae. Ref: M. Shur, Itrodcutio to Electroic Devices 16

17 .1..4 Crystal Plaes ad Miller Idices Covetios how to defie Miller idices: {hkl}: For plaes of equivalet symmetry such as {100} for (100), (010), (001), (100), (010) ad (001) i cubic symmetry. Ref.: M. Shur, Itrodcutio to Electroic Devices 17

18 .1.3 Basics of Crystal Growth 95% of the material used i semicoductor idustry is crystallie silico. Before growig the silico igots, the material (SiO, sad) is purified. The most commo growth method is the Czochralski method. The crucible cotais poly crystallie material, which is heated by radio frequecy iductio up to 141 C. The system is typically filled with a iert gas like argo to prevet cotamiatio of the sigle crystallie igot. A silico <111> rod is used as the seed for the growth of the silico crystal. Simplified schematic drawig of the Czochralski puller. Ref.: M.S. Sze, Semicoductor Devices 18

19 .1.3 Basics of Crystal Growth Photo of a igot. The igot has a diameter of 00mm. After pullig the sigle crystallie igot the material is sawed ito wafers of µm thickess. A more detailed descriptio of the growth of crystallie materials is give i chapter 11 of M.S. Sze s book Semicoductor devices, Physics ad Techology. Ref.: M.S. Sze, Semicoductor Devices 19

20 . Basics of Solid State Physics To uderstad the properties of semicoductors it is essetial to uderstad the properties of their costituet atoms. Based o Bohr s model the atom cosists of a core, which cotais basically the complete mass of the atom. The shell is early without a mass. Despite the fact that early all the mass is cocetrated i the core the diameter of the core is small with m i compariso to the diameter of the shell m=0.1m=1å (Ågström). The core cosists of eutros ad protos. The core is positively charged. The shell (electro shell) is egatively charged due to electros o is orbital. Overall the atom is ot charged or eutral. The electros behave like satellites. The electros circulate aroud the core o defied orbitals. The electros are stabilized o their orbitals due a equilibrium of cetrifugal ad Coulomb forces. We will discuss the cosequeces of the model based o a hydroge atom, which is the simplest atom. 0

21 ..1 The Hydroge Atom Due to the equilibrium betwee the cetrifugal forces ad the electrostatic forces a direct relatio exists betwee the velocity of the electro ad the radius to the core. The velocity of each electro is related to radius of the orbital. As a electro ca have differet eergies, the electro ca have differet radius to the core of the atom. However, the model has the followig problems: r core v electro + q q 1 Electrostatic force Cetrifugal force Based o classical electrodyamics it ca be expected that a charged particle o a orbital leads to the formatio of a magetic dipole, which radiates eergy. Due to the loss of eergy the particle would be more attracted by the core, which leads to a spiral like projectio. Fially, the particle would fall ito the core of the atom. Schematic diagram of a hydroge atom 1

22 ..1 The Hydroge Atom To solve this icosistecy Nils Bohr proposed the followig postulate: The eergy levels of a atom ad therefore the radius of the orbitals are quatized. The allowed eergy levels for a hydroge atom are give by E EB = =1,,3,... Hydroge eergy levels where E B is the Bohr eergy ad is the priciple quatum umber. The Bohr eergy is give by E B = Bohr egery q 8πε a 0 B where a B is the Bohr radius. q is the charge of the electro, which is the elemetary charge ad ε 0 is the permittivity. Electro eergies betwee these eergy levels E are ot allowed.

23 ..1 The Hydroge Atom As the electro eergies are quatized the radius of the eergy levels are quatized as well. The eergy levels for each elemet are uique. The formatio or the splittig of these eergy levels allows the formatio of eergy bads. The eergies betwee the defied eergy levels are called the forbidde eergy bads. The uit of the eergy is usually give i electrovolt (ev). The quatity ev (electro volt) is a eergy uit correspodig to the eergy gaied by a electro whe its potetial is icreased by 1V (1eV=1.6*10-19 AVs=1.6*10-19 J). The Bohr radius is give by a B ε0h = π m q e Bohr radius where h is the Plack costat ad m e is the mass of the electro. 3

24 ..1 The Hydroge Atom Bohr's atom model ca be combied with Eistei's photo theory (. Bohr s Postulate). The eergy differece betwee two eergy levels ad m is give by E E = h f, m Photo eergy m m > where E correspods to the higher eergy level. The trasitio from a higher to a lower eergy level leads to a eergy loss. The eergy ca be released i the form of a photo, where f is the frequecy of the emitted light. The frequecy ad the correspodig wavelegth of the light is give by f, m λ, m = 4 q me 1 1 = 8 ε h m c f 0, m Frequecy of the emitted light. Wavelegth of the emitted light. 4

25 .. Eergy Bads Movig from a sigle atom to a solid. For a isolated atom, the electros have discrete eergy levels. As a umber of p isolated atoms are brought together to form a solid, the orbitals of the outer electros overlap ad iteract with each other. This iteractio icludes attractio ad repulsio forces betwee the atoms. The forces betwee the atoms cause a shift of the eergy levels. Istead of formig a sigle levels, as it is the case for a sigle atom, p eergy levels are formed. These eergy levels are closely spaced. Whe p is large the differet levels essetially form a cotiuous bad. The levels ad therefore the bads ca exted over several ev depedig o the iteratomic or molecular spacig. Schematic illustratio of the splittig of the degeerated states ito a cotiuous bad of allowed states. Ref.: M.S. Sze, Semicoductor Devices 5

26 ..3 Bad structure i Semicoductors Eergy Bad i semicoductors Schematic represetatio of a isolated silico atom Ref.: M.S. Sze, Semicoductor Devices We will ow move from the geeral descriptio of the bad structure i a solid to the more specific situatio for silico. A isolated silico atom has 14 electros. Of the 14 electros 10 occupy deeper eergy levels. Therefore, the orbital radius is smaller tha the itermolecular separatio forces i the crystal. The 10 electros are boud very strogly to the atoms. 6

27 ..3 Bad structure i Semicoductors Eergy Bad i semicoductors The 4 remaiig valece bad electros are boud weakly ad ca be ivolved i chemical reactios. Therefore, we ca cocetrate o the outer shell (=3 level). The =3 level cosists of a 3s (=3 ad l=0) ad a 3p (=3 ad l=1) subshells. The subshell 3s has two allowed quatum states per atom ad both states are filled with a electro (at 0 Kelvi). The subshell 3p has 6 allowed states ad of the states are filled with the remaiig electros. 7

28 ..3 Bad structure i Semicoductors Eergy Bad i semicoductors Schematic diagram of the formatio of the eergy bads i silico as a fuctio of the lattice spacig Schematic diagram of the formatio of the eergy bads i silico as the iteratomic distace decreases ad the 3s ad 3p subshells overlap. At a temperature of absolute zero, the electros occupy the lowest eergy states, so that all states i the lower bad (valece bad) will be full ad all states i the upper bad (coductio bad) are empty. Ref.: M.S. Sze, Semicoductor Devices 8

29 ..3 Bad structure i Semicoductors Eergy Bad i semicoductors The bottom of the coductio bad is called E c ad the top of the valece bad is called E v. The eergy differece betwee the bottom of the coductio bad ad the top of the valece bad is called badgap eergy E g. The badgap eergy E g =(E c -E v ) betwee the bottom of the coductio bad ad the top of the valece bad is the width of the forbidde eergy gap. E g is the eergy required to break a bod i the semicoductor to free a electro to the coductio bad ad leave a hole i the valece bad. A deficiecy of a electro i the valece bad is cosidered to be a hole. The deficiecy i the valece bad maybe be filled by a eighborig electro, which results i a shift of the deficiecy locatio. A hole is positively charged. Both the electro ad the hole cotribute to the curret flow. 9

30 ..4 Eergy Mometum Diagram Eergy-bad diagram for Silico ad Gallium Arseide If a electro is excited to the coductio bad it ca move freely i the crystal, sice the electro ca be treated like a particle i free space. The propagatio of the free electro ca be described by the wave fuctio, which is the solutio of the Schrödiger equatio. The wave fuctio for a free electro is give by ( ikx) + B ( ikx) ψ = A1 exp 1 exp Wave fuctio where k is the wave vector, which is give by k = h p π Wave vector P is the mometum of the electro. Due to this expressio the electro eergy ca be give as a fuctio of the wave factor. We speak about the k-space represetatio. The eergy bads ca ow be determied as a fuctio of the k-vector. 30

31 ..4 Eergy Mometum Diagram Electro eergy i free space E = mev Eergy of a free electro p = m v e Mometum of a free electro Eergy mometum diagram for a free electro E : Eergy of a free electro m e : mass of a free electro v: velocity of the electro e E mev = = p m 31

32 ..4 Eergy Mometum Diagram Electro eergy i free space λ = p = h mev hk π DeBroglie equatio Dualism of waves ad matter for electromagetic waves. k: wave vector We ca rewrite the equatio so that the wave vector is expressed i terms of the mometum of the electro. k = h p π Wave vector 3

33 ..4 Eergy Mometum Diagram Eergy-bad diagram for for Silico ad Gallium Arseide Silico GaAs Ref.: M.S. Sze, Semicoductor Devices Idirect semicoductor Direct semicoductor 33

34 ..4 Eergy Mometum Diagram Electro eergy i a Solid For a solid the electro eergy ear the coductio bad miimum ca be approximated by a parabolic fuctio similar to a electro i free space. However, the electro eergy of a electro i a solid is quite differet from the eergy of a electro i free space. The eergy of a electro ca be give by: E ( k) h k 8π m = EC + Eergy of a electro i the coductio bad where m is the effective mass of the electro. The effective mass ca be calculated by: m = 1 E p Effective mass of a electro 34

35 ..4 Eergy Mometum Diagram Electro eergy i a Solid Narrowig the parabola, correspods to a larger secod derivative, the smaller the effective mass. Eergy-mometum relatio-ship of a special semi-coductor with a electro effective mass of m =0.5m 0 i the coductio bad ad a hole effective mass of m p =m 0. The actual eergymometum relatioship (also called eergy-bad diagram) for silico ad gallium arseide are much more complex. Ref.: M.S. Sze, Semicoductor Devices 35

36 ..4 Eergy Mometum Diagram Electro eergy i a Solid The actual eergy-mometum relatioship (also called eergy-bad diagram) for silico ad gallium arseide are quite differet from the eergy mometum diagram of a free electro. Nevertheless, the geeral features like the badgap betwee the bottom of the coductio bad ad the top of the valece bad ca be observed. Secod, the miimum ad the maximum of the coductio ad valece bad are parabolic. For silico the maximum of the valece bad occurs for p=0, but miimum of the coductio bad is shifted to p=p c. Therefore, i silico i additio to the eergy E g, which is ecessary to excite a electro a mometum p c is ecessary. For GaAs the maximum i the valece bad ad the miimum i the coductio bad occur at the same mometum (p=0). Gallium arseide is called a direct semicoductor, because it does ot require a chage i mometum for a electro trasitio from the valece bad to the coductio bad. Silico is called a idirect semicoductor, because a chage of the mometum is required i a trasitio. 36

37 ..5 Electro eergy i a Solid With the gaied kowledge we ca schematically explai the eormous differeces i coductivity of isulators, semicoductors ad coductors i terms of eergy bads. Metals or coductors are characterized by a very low resistivity. Depedig o the material two differet schematic eergy bad diagrams exist. The coductio bad is either partially filled (e.g. for Cu) or the valace bad ad the coductio bad overlap (e.g. Z, Pb). Electros are free to move with oly a small applied electric fields. Eergy Bad diagram i a coductor Ref.: M.S. Sze, Semicoductor Devices 37

38 ..5 Electro eergy i a Solid For a isulator the valece electros are strogly boded to the eighborig atoms. This bods are difficult to break ad cosequetly there are o free electros, which ca participate i a curret flow. Isulators are characterized by a large badgap. All eergy levels i the valace bad are occupied, whereas all eergy levels i the coductio bad are empty. Thermal eergy or a applied electrical field is ot sufficiet to raise the uppermost electro i the valece bad to the coductio bad. Oe of the best isulators is silico oxide. Ref.: M.S. Sze, Semicoductor Devices Eergy Bad diagram i a isulator 38

39 ..5 Electro eergy i a Solid Materials with a badgap of 0.6eV to 4.0eV are cosidered to be semicoductors (room temperature). Most of the materials have badgaps betwee 1.0eV ad.0ev (room temperature). Silico has a badgap of 1.1eV, Gallium arseide has a badgap of 1.4eV. Therefore, the coductivity of a (itrisic) semicoductors is low at room temperature. The thermal activatio eergy is ot high eough to excite a electro from the valece bad to the coductio bad. At room temperature the thermal activatio eergy is a fractio of the badgap, E thermal =kt=0.056ev=5.6mev, so that a small umber of electros get thermally excited, which cotribute to a moderate curret flow for low/moderate electric field levels. Eergy Bad diagram i a semicoductor. Ref.: M.S. Sze, Semicoductor Devices 39

40 ..6 Material ad Carrier Properties Itrisic ad extrisic Semicoductors The material is cosidered to be a itrisic semicoductor if the materials cotais a relatively small amout of impurities. The material is cosidered to be a extrisic semicoductor if the materials cotais a relatively large amout of impurities. Semicoductors i Thermal Equilibrium I the followig it is assumed that the semicoductor is a itrisic semicoductor. Iflueces of impurities o the semicoductor properties are eglected. Further, it is assumed that the semicoductor is i thermal equilibrium, which meas that the semicoductor is ot exposed to additioal excitemets like light, pressure or electric field. The semicoductor material is kept costat temperature throughout the etire sample (o temperature gradiet exists i the semicoductor material). 40

41 ..6.1Carrier Cocetratio i Semicoductors I the followig the carrier cocetratio i the coductio ad the valece bad will be calculated. The carrier cocetratio is give by: = E E top C bot C N e ( E) F ( E) e de Electro cocetratio p = E E top V bot V N h ( E) F ( E) h de Hole cocetratio where ad p are the electro ad hole cocetratio [1/cm 3 ] (Number of electros ad holes per uit volume. N e (E) ad N h (E) are Desity of States (Allowed eergy states per eergy rage ad per uit volume). F e (E) ad F h (E) are the Fermi-Dirac distributios for electros ad holes. The Fermi-Dirac distributio is a probability fuctio, which idicates whether a state is occupied by a electro or a hole. 41

42 ..6.1Carrier Cocetratio i Semicoductors I the first step the product of the Desity of States N e (E), N h (E) ad the Fermi- Dirac Distributio F e (E), F h (E) is calculated. The product states whether the states i the coductio ad the valece bad are occupied by free electros ad holes. The product correspods to a carrier desity for a give eergy. I order to determie the overall carrier cocetratio the itegral over all eergies (coductio ad the valece bad) has to be determied. 4

43 ..6.1 Carrier Cocetratio i Semicoductors Schematic Bad Diagram, Desity of States, Fermi-Dirac Distributio ad Carrier Cocetratio of a itrisic semicoductor i thermal equilibrium Schematic Bad Diagram Desity of States Fermi-Dirac Distributio Electro ad hole Desity Ref.: M.S. Sze, Semicoductor Devices 43

44 ..6. Desity of States The desity of states ca be calculated by the Schrödiger equatio. However, the derivatio of the desity of state fuctio will ot be discussed here. Further iformatio is give by M.S Sze, Semicoductor Devices, Appedix H. N C 4π 3 ( E) = m ( E E ) h 3 e c Desity of states for electros N V 4π 3 ( E) = m ( E E) h 3 h V Desity of states for holes The Desity of States is determied by a sigle material parameter, which is the effective mass of the electro or the hole. Therefore, the desity of states for electros ad holes are very ofte differet. 44

45 ..6.3 Fermi-Dirac Statistic The Fermi-Dirac statics describes the probability that a electroic state for a give eergy E is occupied by a electro. The Fermi-Dirac Statistic is symmetric aroud the Fermi eergy E F. The Fermi eergy ca be defied as the eergy at which the Fermi-Dirac distributio is equal to ½. I geeral, the Fermi-Dirac statistic is strogly temperature depedet. With decreasig temperature the k: Boltzma costat, T: temperature i Kelvi, E F : Fermi eergy trasitio gets sharper. It meas that i practical terms a electroic state is very likely to be occupied by a electro if the eergy of the electro is a few kt higher tha the Fermi eergy. Cosequetly it is very ulikely that a electroic state is occupied by a electro if the eergy is a few kt below tha the Fermi eergy. Ref.: M.S. Sze, Semicoductor Devices 45

46 ..6.3 Fermi-Dirac Statistic So far the Fermi-Dirac distributio was oly itroduced for electros. The Fermi-Dirac distributio for holes is give by: Fermi Dirac Distributio F(E) F h (h) F e (E) Eergy E-E F [ev] F e ( E) F h = 1+ exp 1 ( E) = 1 F ( E) = 1+ exp 1 ( E E kt ) Fermi eergy for electros F ( E E kt ) F e = Fermi eergy for holes 46

47 ..6.3 Fermi-Dirac Statistic Thermal equilibrium A semicodutig material is i thermal equilibrium, if the temperature at each positio of the crystal is the same, the overall curret through the material is 0, ad the solid state is ot illumiated. Furthermore, we assume that o chemical reactio is takig part. As a cosequece the Fermi eergy throughout the material is costat. ( x, y, z) cost. EF EF = = Thermal equilibrium 47

48 ..6.4 Fermi Eergy i Solids E E E E c E F E C E C E F E F E V E V EV Coductor Semicoductor Isulator Fermi levels for coductors (metal), semicodcutors ad isulators. 48

49 ..6.4 Fermi Eergy i Solids How ca we apply ow the cocept of the Fermi level do differet materials like coductors, isulators ad semicoductors? I the case of a coductor the Fermi level is i the coductio bad. Therefore, the coductio bad is always occupied with electros. The situatio is quite differet for isulators ad semicoductors. I the case of a semicoductor it is assumed that the material is a itrisic semicoductor. As a cosequece the Fermi level is (approximately) i the middle of the badgap. However, the badgap of a isulator is much larger tha the badgap of a semicoductor. The badgap for a semicoductor is i the rage of 0.6eV to 4eV, whereas the badgap of a isulator is larger tha 5.0eV. For example silico oxide, which is the isulator i microelectroics, has a badgap of 9.0eV. As a cosequece it is very difficult to overcome such a high eergy barrier. 49

50 ..6.5 Boltzma distributio To calculate the carrier cocetratio for electros ad holes the Fermi-Itegral has to be solved. = NC I1 p = NV I1 ( ( EC EF ) kt ) ( ( E E ) kt ) F V Electro cocetratio Hole cocetratio However, the Fermi itegral caot be solved aalytically. Therefore, a approximatio is used to determie the carrier desities. The approximatio is called the Boltzma distributio. N C exp ( ( E E ) kt ) C F for EC EF kt Electro cocetratio, Boltzma distributio p N V exp ( ( E E ) kt ) F V for EF EV kt Hole cocetratio, Boltzma distributio 50

51 ..6.5 Boltzma distributio Istead of usig the eergy depedet Desity of States a ew parameter is itroduced, which is the effective Desity of States. The effective Desity of States is agai defied for electro ad holes. The effective Desity of States is idepedet of the eergy. Therefore, the effective Desity of States is a pure material parameter. N C = mekt π h 3 Effective Desity of States i the coductio bad N V = mhkt π h 3 Effective Desity of States i the valece bad 51

52 ..7 Itrisic carrier cocetratio We already distiguished betwee itrisic ad extrisic semicoductors. The material is cosidered to be a itrisic semicoductor, if the material cotais a relatively small amout of impurities. Uder such coditios the umber of electros per volume i the coductio bad is equal to the umber of holes per volume i the valece bad. Therefore, a itrisic carriers cocetratio i ca be defied. = p = i Itrisic carrier cocetratio Electro, hole ad itrisic carrier cocetratio. Ref.: M.S. Sze, Semicoductor Devices 5

53 ..7 Itrisic carrier cocetratio Based o the itrisic carrier cocetratio a itriisc eergy ca be determied. For a itrisic semicoductor i thermal equlibrium the itriisc eergy is equal to the Fermi eergy. F ( = p = i ) Ei E = The electro ad hole cocetratio is give by p N V NV exp ( ( EF EV ) kt ) NC exp( ( EC EF ) kt ) exp( ( E E ) kt ) = N exp( ( E E ) kt ) i V C So that we ca derive the followig expressio for the itrisic eergy. C i E i = E V + E C + kt l N N V C Itrisic eergy 53

54 ..7 Itrisic carrier cocetratio The itrisic eergy is agai a pure material parameter. The itrisic eergy is ot affected by light exposure or pressure. The itrisic eergy is costat for a semicoductor eve if the material is ot i thermal equilibrium aymore (e.g. a voltage is applied to the sample). At room temperature the secod term is much smaller tha the first term. Therefore, the itrisic eergy is very close to the middle of the badgap (E C -E V )/=E g /. For silico the itrisic eergy deviates from the middle of the badgap by E i -(E C +E V )/ -kt/=-13mev. The itrisic eergy is shifted towards the valece bad. For Gallium Arseide the situatio is opposite ad the itrisic eergy is slightly shifted towards the coductio bad: E i - (E C +E V )/ 3kT/=39meV 54

55 ..7 Itrisic carrier cocetratio Based o =p= i the itrisic carrier cocetratio ca be expressed i terms of the effective desity of states for the electros ad holes. N C = i exp EC Ei kt N V = i exp E i E kt V So that the itrisic cocetratio results to the followig expressio: i E = g NCNV exp kt Itrisic carrier cocetratio Itrisic carrier cocetratio for silico ad GaAs. Ref.: M.S. Sze, Semicoductor Devices 55

56 ..7 Itrisic carrier cocetratio I the ext step the expressio for the carrier cocetratio (electros) ca be modified by describig the effective desity of states as a fuctio of the itrisic carrier cocetratio. As a result a expressio for the carrier cocetratio ca be derived which does ot require kowledge of the effective desity of states for the material. N C exp ( ( E E ) kt ) C F for EC EF kt N C = i exp EC Ei kt = i exp E F kt E i Electro cocetratio p = i exp E i E kt F Hole cocetratio 56

57 ..8 Door ad Acceptors Whe a semicoductor is doped, the semicoductor becomes extrisic ad impurity levels are itroduced. I the followig the ifluece of acceptors ad doors o the material properties will be discussed. We will focus here o the dopig of silico. Schematic silico lattice for -type dopig with door atoms (arseic or phosphorus). If we itroduce doors like arseic ad phosphorus i a silico sigle crystal a silico atom is replaced by a door atom with five valece electros. The arseic or phosphorus atoms form covalet bods with its eighborig silico atoms. The 5th electro has a low bidig eergy to become a coductig electro. The arseic or phosphorus atom is called a door ad the silico becomes -type because of the additio of the egative charge carrier. Ref.: M.S. Sze, Semicoductor Devices 57

58 ..8 Door ad Acceptors If we itroduce acceptors like boro i the silico lattice a silico atom is replaced by a boro atom with three valece electros. Additioal electros are accepted to form four covalet bods. The boro atom is cosidered as a acceptor ad the silico becomes p-type because of the additio of the positive charge carrier. Schematic silico lattice for p-type dopig with door atoms (boro). Ref.: M.S. Sze, Semicoductor Devices 58

59 ..8 Door ad Acceptors Periodic table of semicoductor materials Ref.: M.S. Sze, Semicoductor Devices Elemets out of colum III ad colum V of the perodic table are of particualr iterest to itetioally dope silico. Elemets out of colum III form acceptor states, whereas elemets from colum V ted to form door states. 59

60 ..8 Door ad Acceptors The itroductio of doors like arseic i the silico lattice leads to the formatio of eergy levels very close to the bottom of the coductio bad. At room temperature the thermal eergy kt is high eough to thermally excite the excess electro to the coductio bad. As a cosequece positively charged localized states are left i the material ad free ad mobile electros are created i the coductio bad. A door state is eutral whe it is occupied by a electro ad becomes positively charged if the state doates its electro to the coductio bad. Uder such coditios the eergy level of the doors is very close to the coductio bad. E C Eergy E D E V Door levels Schematic eergy bad represetatio of a semicoductor with door ios. Distace 60

61 ..8 Door ad Acceptors With icreasig door cocetratio the Fermi level will shift closer to the bottom of the coductio bad. Therefore, the eergy differece betwee the Fermi level ad the coductio bad (E C -E F ) gets smaller with icreasig door cocetratio. Schematic Bad Diagram Desity of States Fermi-Dirac Distributio Electro ad hole Desity M.S. Sze, Semicoductor Devices 61

62 ..8 Door ad Acceptors A aalog behavior is observed for icreasig acceptor cocetratio. The higher the acceptor cocetratio the closer the Fermi level will move to the valece bad. At room temperature the thermal activatio is already high eough to active a hole from the valece bad. As a cosequece the acceptor ios get egative ad holes are created i the valece bad. A acceptor is egatively charged whe it is occupied it is occupied by ad electro ad becomes eutral after acceptig a electro from the valece bad. E C Eergy E A E V Acceptor levels Schematic eergy bad represetatio of a semicoductor with acceptor ios. Distace 6

63 ..9 Electros ad Holes i Semicoductor The product of the electro ad hole cocetratio is equal to the square of the itrisic carrier cocetratio if the semicoductor is i thermal equilibrium. I this case it does ot matter, whether the semicoductor is a itrisic semicoductor or a extrisic semicoductor. I the secod case the semicoductor is doped by acceptors or doors. If the semicoductor is itrisic the followig relatioship applies p = = i ad p = i Itrisic semicoductor i thermal equilibrium Dopig of a semicoductor leads to the followig relatioship p, p, i i ad p = i Extrisic semicoductor i thermal equilibrium 63

64 ..9 Electros ad Holes i Semicoductor If a semicoductor samples is uiformly doped (o iteral electric field) ad o electric field is applied (exteral electric field) the semicoductor is eutral. I this case charge eutrality applies. To preserve charge eutrality, the total egative charges (electros ad ioized acceptors) must equal the total positive charges (holes ad ioized doors). + N = p + A N D Charge eutrality If we assume that the material is oly doped by doors so that N A =0 the equatio is simplified to =p+n D. Therefore, the semicoductor is a -type semicoductor. The hole cocetratio ca ow be calculated by p = i Hole cocetratio for a -type semicoductor where the idex idicates that we deal with a -type semicoductor. 64

65 ..9 Electros ad Holes i Semicoductor The followig expressio for the electro cocetratio ca be derived: ( ) N + N 4 1 = D D + i Electro cocetratio for a -type semicoductor I most of the cases we ca assume that the Door cocetratio is higher tha the itrisic carrier cocetratio so that the expressio is reduced to N D Complete ioizatio for a -type semicoductor If the electro cocetratio is approximately equal to the Door cocetratio complete ioizatio ca be assumed. Complete ioizatio is observed for (shallow) doors ad acceptors, which meas that the itroduced impurities form defect levels very close to the bads. 65

66 ..9 Electros ad Holes i Semicoductor Cosequetly we get the followig term for the hole cocetratio : p = i N D So that the Fermi level ca be calculated by usig the Boltzma distributio E F E C kt l N N C D Fermi level for a -type semicoductor The aalog behavior ca be observed for a p-type doped semicoductor. If we assume that door cocetratio is N D =0 we get the followig expressio for the holes: p=+n A. The electro cocetratio ca be described by p = i p p Electro cocetratio for a p-type semicoductor 66

67 ..9 Electros ad Holes i Semicoductor Subsequetly the followig expressio is obtaied for the hole cocetratio : ( ) N + N 4 1 p p = A A + i Hole cetratio for a p- type semicoductor If we agai assume that the defect levels are very close to the bad (valece bad) most of the acceptors will be ioized so that p p N A Complete ioizatio for a p-type semicoductor So that the Fermi level ca be calculated by usig the Boltzma distributio E F E V + kt l N N V A Fermi level for a p-type semicoductor 67

68 ..9 Electros ad Holes i Semicoductor Various impurities i silico ad gallium arseide Si Measured ioizatio egeries for various impurities i silico ad GaAs. GaAs Ref.: M.S. Sze, Semicoductor Devices 68

69 ..9 Electros ad Holes i Semicoductor Ifluece of the Dopig Cocetratio o the Fermi Level The eergetic positio of the Fermi level depeds o the cocetratio of the dopats ad the temperature. With icreasig temperature the Fermi distributio is gettig broader so that the Fermi level is closer to the itrisic eergy level. With icreasig doped cocetratio the Fermi level shifts closer to the bads (coductio ad valece bad). This behavior is similar for all semicoductor materials. Ifluece of the temperature ad the dopig cocetratio o the Fermi level i silico. Ref.: M.S. Sze, Semicoductor Devices 69

70 ..10 Compesated Semicoductor So far either -type or p-type semicoductors were cosidered i the discussio. However, every ofte i microelectroics the material is doped by doors ad acceptors. For example a p-type wafer is doped with arseic (-type regio) so that a p-juctio is formed. I this case the semicoductor is compesated. I order to preserve charge eutrality both dopat cocetratios have to be cosidered. N = p + + Charge eutrality A N D However, i most of the cases the cocetratio of oe dopat species is much higher tha the cocetratio of the other species so that the semicoductor properties are determied by the higher dopat cocetratio. 70

71 71 Itroductio to Electroic Devices, Fall 006, Dr. Dietmar Kipp..10 Compesated Semicoductor [ ] D i D i D D N N N N >> + + = 4 1 [ ] D i i D i D D i N p N N N p 4 1 >> + + = Majority carriers (-type semicoductor) Miority carriers (-type semicoductor) [ ] A p i A i A A p N p N N N p >> + + = 4 1 [ ] A i p i A i A A i p N N N N 4 1 >> + + = Majority carriers (p-type semicoductor) Miority carriers (p-type semicoductor) D N A N > A N D N > Assumptio: (p-type semicoductor) Assumptio: (-type semicoductor)

72 ..11 Miority ad Majority Carriers As complete ioizatio ca assumed for typical dopats like arseic or boro the cocetratio of free carriers is more or less cotrolled by the dopat cocetratio. If for example silico is doped by arseic the cocetratio of electros i the coductio bad is much higher tha the cocetratio of holes i the valece bad. I this case the electros i the coductio bad are majority carriers ad the holes i the valece bad are miority carriers. As the ame implies, the electros represet the majority of carriers ad the holes represet the miority of carriers. The aalog behavior is observed for boro doped material. Here the cocetratio of holes i the valace is much higher tha the cocetratio of electros i the coductio bad. Cosequetly the holes are the majority carriers, whereas the electros are the miority carriers. Electros are majority ad holes are miority carriers i -type materials! Holes are majority ad electros are miority carriers i p-type materials! For bipolar electroic devices like diodes (e.g. solar cells, LED) or bipolar trasistors the electroic trasport is cotrolled by the miority carriers, because the electroic trasport is limited by the umber or the lifetime of miority carriers. 7

73 ..1 Degeerated ad No-degeerated Semicoductors For most of the electroic devices the electro ad hole cocetratio is much lower tha the effective desity of states i the coductio or the valece bad. The Fermi level is at least 3kT above the valece bad or 3kT below the coductio bad. I such a case we speak about a odegeerated semicoductor. For very high levels of dopig the cocetratio of dopats gets higher tha the effective desity of states i the valece or the coductio bad. I such a case the semicoductor is degeerated ad the Fermi levels shifts ito the coductio or the valece bad. Uder such coditios the equatios which were derived here does ot apply ay more. However, the fabricatio of degeerated semicoductig materials ca be ecessary. For example the fabricatio of laser diodes require populatio iversio, which ca oly achieve if the semicoductor is degeerated. 73

74 ..13 Bulk potetial I followig we will itroduce the bulk potetial. The bulk potetial is a importat parameter if it comes to the explaatio of bipolar devices like diodes or bipolar trasistors. The bulk potetial is directly related to the Fermi level i a material. Therefore, the positio of the Fermi level ca be expressed by the bulk potetial or vice versa. The electro ad the hole cocetratio of a itrisic semicoductor ca be expressed i terms of the itrisic carrier cocetratio. E E E F i i EF = i exp p = i exp kt kt Istead of usig the eergy differece betwee the itrisic eergy level ad the Fermi level the term ca be substituted by the bulk potetial. ϕ b = 1 q ( E E ) i F Bulk potetial 74

75 ..13 Bulk potetial The bulk potetial is a measure of the eergy differece betwee the itrisic eergy level ad the Fermi level. Bulk implies that this parameter is related to the bulk/volume properties of a semicoductor. The complemetary term would be the surfec potetial, which correspods to the potetial at the surface of a semicoductor. The term surface potetial will be itroduced i chapter 6, Furthermore, the Boltzma equatio ca be simplified by usig the temperature voltage V th = kt q Temperature voltage so that electro ad hole cocetratio results to = ( ϕ ) i exp V b th Electro cocetratio p ( ϕ ) = i exp V b th Hole cocetratio Therefore, the bulk potetial is directly related with the carrier cocetratio. 75

76 ..13 Bulk potetial I order to directly relate the bulk potetial with the material properties we have to rewrite the equatio. For a -type semicoductor the bulk potetial results to ϕ b = V th 1 l i ( ) N + N + 4 D D i I most of the cases the Door cocetratio is large tha the itrisic carrier cocetratio so that: ϕ b V th N D l > 0 i Bulk potetial for a -type semicoductor Accordigly we ca derive a expressio for a p-type semicoductor. ϕ bp = V th N A l < 0 i Bulk potetial for a p-type semicoductor 76

77 Refereces Michael Shur, Itroductio to Electroic Devices, Joh Wiley & Sos; (Jauary 1996). (Price: US$100) Simo M. Sze, Semicoductor Devices, Physics ad Techology, Joh Wiley & Sos; d Editio (001). (Price: US$115) R.F. Pierret, G.W. Neudeck, Modular Series o Solid State Devices, Volumes i the Series: Semicodcutor Fudametals, The p juctio diode, The bipolar juctio trasistor, Field effect devices, (Price: US$5 per book) 77