AN B. Basic PCB traces transmission line effects causing signal integrity degradation simulation using Altium DXP version 6.
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1 AN B Basic PCB traces transmission line effects causing signal integrity degradation simulation using Altium DXP version 6.9 By Denis Lachapelle eng. and Anne Marie Coutu. May 2008 The objective of this note is to simulate basic transmission line effect that we find in printed circuit board. These transmission line effects cause signal integrity degradation often due to transmission delay and reflection that cause ringing. Transmission delay may cause clock and data signal misalignment, ringing may cause double clocking or increased crosstalk. The conducted simulations are listed below. Simulation #1 and #2 use only one PCB trace to demonstrate the transmission delay and ringing caused by reflection. Simulation #3 and #4 use two PCB traces, one is the aggressor trace and the second is the victim trace, we will demonstrate crosstalk effect. 1. Simulate a microstrip 50ohm 100cm a. Source impedance 0ohm, load impedance open. b. Source impedance 0ohm, load impedance 50ohm. c. Source impedance 50ohm, load impedance 50ohm. d. Source impedance 50ohm, load impedance open. e. Measure delay, source overshoot/undershoot, load overshoot/undershoot. 2. Simulate a stripline 50ohm 100cm a. Source impedance 0ohm, load impedance open. b. Source impedance 0ohm, load impedance 50ohm. c. Source impedance 50ohm, load impedance 50ohm. d. Source impedance 50ohm, load impedance open. e. Measure delay, source overshoot/undershoot, load overshoot/undershoot. 3. Simulate a microstrip crosstalk effect. a. The victim trace is 50ohm, 30 cm with 0.004in spacing with source 50ohm, load 50ohm. b. Use source 50ohm, load 50ohm. c. Measure the overshoot/undershoot at both end of the victim trace. d. Increase spacing to 0.006in, the 0.008in, then and then at 0.012in. 4. Simulate stripline crosstalk effect. a. The victim trace is 50ohm, 30 cm with 0.004in spacing with source 50ohm, load 50ohm. b. Use source 50ohm, load 50ohm. c. Measure the overshoot/undershoot at both end of the victim trace. d. Increase spacing to 0.006in, the 0.008in, then and then at 0.012in. Page 1 of 22
2 Simulation setup For the purpose of simulation we use the 74AC04 inverter with 5V logic. Since there is a non-zero output resistance in the 74AC04 the source resistance to add is not 50-ohm, by doing some preliminary simulation we found that 39-ohm is a good compromise. A microstrip is a PCB trace located on the top or bottom layer of a PCB which has an underlying ground plane. So one side of the trace is exposed to air and the other trace is exposed to FR4. A stripline is a PCB trace located within the inner layers of a PCB which as a ground plane above and below. So both side of the trace are exposed to FR4, the electromagnetic field is all contained in the FR4. Microstrip, Source 0-ohm, load open PCB: Page 2 of 22
3 Simulation: The delay between the rising edges is 6.02ns; this is due to the signal propagation speed. Microstrip in FR4 cause 60ps/cm. Note the importance of the ringing. Page 3 of 22
4 Microstrip, Source 0-ohm, load 50-ohm PCB: Page 4 of 22
5 Simulation: The addition of the terminating resistor greatly reduces ringing, undershoot and overshoot are really limited. Page 5 of 22
6 Microstrip, Source 50ohm, load open PCB: Page 6 of 22
7 Simulation: Adapting source impedance reduces the ringing compared to 0-ohm source. Page 7 of 22
8 Microstrip, Source 50ohm, load 50ohm PCB: Page 8 of 22
9 Simulation: Quite clean signals but the level at the receiver is not at the proper DC voltage, proper switching of the gate is not guarantee. Page 9 of 22
10 Stripline, Source 0ohm, load open PCB: Page 10 of 22
11 Simulation: The delay between the rising edges is 7.07ns; this is due to the signal propagation speed. Stripline in FR4 cause 70ps/cm. We note the signal propagation is a little bit slower than the microstrip. This is due to the fact that for stripline all the surrounding material is all FR4 compared to microstrip that is FR4 on one side and air on the other side. Note the importance of the ringing. Page 11 of 22
12 Stripline, Source 0-ohm, load 50-ohm PCB: Page 12 of 22
13 Simulation: The addition of the terminating resistor greatly reduces ringing, undershoot and overshoot are really limited. Page 13 of 22
14 Stripline, Source 50ohm, load open PCB: Page 14 of 22
15 Simulation: Adapting source impedance reduces the ringing compared to 0-ohm source. But as in microstrip it seems that the receiver termination does better. Page 15 of 22
16 Stripline, Source 50ohm, load 50ohm PCB: Page 16 of 22
17 Simulation: Again as in the microstrip quite clean signals but the level at the receiver is not at the proper DC voltage, proper switching of the gate is not guarantee. That can be worked out partially by choosing a smaller value capacitor that will affect only the transition and delay period. Page 17 of 22
18 Crosstalk simulation between two traces The purpose of these simulations is to understand the effect of traces spacing on crosstalk and the crosstalk differences between microstrip and stripline. A 30 cm traces was used for the simulation both traces were 50-ohm and source and load adapted as shown in the schematic below. Example of PCB used for simulation (microstrip 4mil shown) Page 18 of 22
19 Microstrip, Spacing 4mil Page 19 of 22
20 Stripline, Spacing 4mil Example of PCB used for simulation (stripline 4mil shown) Spacing :4mil Page 20 of 22
21 The table and the graphic below present the simulation results for various spacing for microstrip and stripline. The crosstalk (overshoot and undershoot) reduces when the traces spacing increase for both trace types. That is expected and seems natural. The crosstalk is a lot lower for the stripline than he microstrip, near ten times lower. Spacing (mils) Overshoot (mv) Undershoot (mv) Microstrip Stripline Page 21 of 22
22 Crosstalk: microstrip, Stripline Overshoot/Undershoot mv Spacing in thousand Microstrip Overshoot Microstirp Undershoot Stripline Overshoot Stripline Undershoot Page 22 of 22
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