0805 Size Differential Chip Delay Line. S o l v e s t h e p r o b l e m s o f s p a c e u s a g e a n d t h e c h a r a c t e r i s t i c

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Sharyl Hawkins
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FEATURES SPECIFICATIONS Smaller & lower cost than our existing products 10ps increments 15GHz Band width, available for 10Gbps data signals Suitable for inter-lane de-skew on multi-lane high speed

1 FEATURES SPECIFICATIONS Smaller & lower cost than our existing products 10ps increments 15GHz Band width, available for 10Gbps data signals Suitable for inter-lane de-skew on multi-lane high speed serial transmission S o l v e s t h e p r o b l e m s o f s p a c e u s a g e a n d t h e c h a r a c t e r i s t i c degradation of the substrate trace. ( Please See Technical Note) Based on your requirements, 2012 size single-ended Delay Lines are also possible. Input/Output Impedance: Differential 100±10% * Waveform Distortion: Overshoot/preshoot under ±20% Insulation Resistance: DC50V, over 100M Durable Voltage: DC50V, 1 minute Rated Current: 50mA Rated Voltage: 5V Operating Temperature Range: -40 C to +85 C Storage Temperature Range: -40 C to +120 C * Single-ended operation will not produce usable waveforms. Part Number Delay Time Rise/Fall Time(1)* -3dB Passband DC Actual(2)* Guarantee(3)* Actual(2)* Guarantee(3)* Resistance 01C 10ps±5ps 20ps Typ. 40ps Max. DC20GHz DC15GHz 0.5 Max. 02C 20ps±5ps 20ps Typ. 40ps Max. DC20GHz DC15GHz 0.5 Max. 03C 30ps±5ps 20ps Typ. 40ps Max. DC20GHz DC15GHz 1.0 Max. 04C 40ps±5ps 20ps Typ. 40ps Max. DC20GHz DC15GHz 1.0 Max. 05C 50ps±5ps 20ps Typ. 40ps Max. DC20GHz DC15GHz 1.0 Max. 10C 100ps±10ps 20ps Typ. 40ps Max. DC20GHz DC15GHz 1.5 Max. 15C 150ps±10ps 25ps Typ. 50ps Max. DC18GHz DC12GHz 1.8 Max. 20C 200ps 10ps/20ps 25ps Typ. 50ps Max. DC15GHz DC11GHz 2.5 Max. 30C 300ps 10ps/20ps 30ps Typ. 60ps Max. DC10GHz DC7GHz 3.5 Max. (1)* 20%-80% (2)* Using the recommended Land Pattern, when there is no skew in the differential input signal. (3)* Restricted value due to the test fixture. Recommended combination for 60ps90ps, 110ps140ps and 160ps190ps interpolation Delay Delay Delay Combination Combination Time Time Time Combination 60ps 03C 2 110ps 01C+10C 160ps 01C+15C 70ps 03C+04C 120ps 02C+10C 170ps 02C+15C 80ps 04C 2 130ps 03C+10C 180ps 03C+15C 90ps 04C+05C 140ps 04C+10C 190ps 04C+15C We can provide the products for delay times shown in the table above, subject to volume requirements.

2 PACKAGE DIMENSIONS & PIN CONFIGURATION Unit:mm (inch) Tolerance: ±0. 1( ±0. 004) Direction marking SUGGESTED LAND PATTERN Unit:mm (inch) Tolerance: ±0. 1( ±0. 004) Solder Resist Example for Dielectric Layer Dielectric Layer ( εr) GND Plane εr,t and W r t 0.3(0.012) 0.4(0.016) 0.5(0.020) 3.5 W=0.44(0.017) W=0.50(0.020) W=0.52(0.020) 4.1 W=0.38(0.015) W=0.46(0.018) W=0.50(0.020) SUGGESTED REFLOW SOLDERING CONDITIONS J-STD-020C Pb-Free Standard Storage conditions are as per MSL1. These component families are not moisture- sensitive. Baking prior to reflow is not required. Maximum Cycles: 2x

3 TYPICAL APPLICATIONS AND TERMINATION METHODS

OUTPUT WAVEFORMS ( 1) (1) 05C (Actual measurement) Sdd21(Transmission) 16Gbps PRBS Response [X-axis: 15.

4 OUTPUT WAVEFORMS ( 1) (1) 05C (Actual measurement) Sdd21(Transmission) 16Gbps PRBS Response [X-axis: ps/Div, Y-axis: 50mV/Div] (2) 10C (Actual measurement) Sdd21(Transmission) 16Gbps PRBS Response [X-axis: ps/Div, Y-axis: 50mV/Div]

5 OUTPUT WAVEFORMS ( 2) (3) 20C (Actual measurement) Sdd21(Transmission) 12.5Gbps PRBS Response [X-axis: 20ps/Div, Y-axis: 50mV/Div] (4) 30C (Actual measurement) Sdd21(Transmission) 12.5Gbps PRBS Response [X-axis: 20ps/Div, Y-axis: 50mV/Div]

6 Within tens of picoseconds of delay time adjustment, a substrate trace can be used f o r t h e r e t u r n c i r c u i t. F o r a p s a d j u s t m e n t, e i t h e r a s u b s t r a t e t r a c e o f a c o u p l e d d i ff e r e n t i a l p a i r, a s s h o w n i n F i g. 1, o r a s u b s t r a t e t r a c e o f a n u n c o u p l e d d i ff e r e n t i a l p a i r, a s s h o w n i n F i g. 2 c a n b e a s s u m e d. H o w e v e r, t h e t r a c e a r e a i n e i t h e r c a s e w i l l b e c o m e v e r y l a r g e. M o r e o v e r, a s s h o w n i n F i g. 1, a t i m e l a g a r i s e s b e t w e e n t h e d i ff e r e n t i a l p a i r s d u e t o t h e i m b a l a n c e a t t h e c o r n e r. C o m m o n m o d e n o i s e w i l l o c c u r a t t h e m i d - p o i n t, a s w i l l t h e f e a r o f n o i s e r a d i a t i o n. I t i s v e r y l i k e l y t h a t h i g h - q u a l i t y 10GHz+ band width characteristics cannot be obtained for the circuit shown in Fig. 2. Fig.1 and Fig.2 are verified with an electromagnetic simulator and the characteristics are compared to the results utilizing the 10C. The published Recommended Land Pattern is assumed for the substrate: W=0.38mm, t=0.3mm, and εr=4.1. The underside of the substrate is GND plane. Mid-point Fig.1 Trace example of a coupled Fig.2 Trace example of an uncoupled Fig.3 differential pair differential pair (Trace area: 40mm 2 ) (Trace area: 30mm 2 ) Coupled Trace Comparison (Fig.1) and 10C (Fig.3) Common-mode Waveform C Output of Coupled Trace Time [ns] 0 10C Uncoupled Trace Frequency [GHz] Mid-point of Coupled Trace Uncoupled Trace Comparison (Fig.2) and 10C (Fig.3) Differential Transmission Magnitude [db] Time [ps] Common-mode Spectrum Differential Output Eye-Pattern (10Gbps PRBS, tr/tf=20ps(20%-80%)) Uncoupled Trace Group Delay [ps] Frequency [GHz] C Mounting Image (Footprint: 2.5mm 2 ) Mid-point of Coupled Trace Output of Coupled Trace 10C Uncoupled Trace C Frequency [GHz] 10C Time [ps]

MC10ELT22, MC100ELT V Dual TTL to Differential PECL Translator

MC10ELT22, MC100ELT V Dual TTL to Differential PECL Translator 5.0 V Dual TTL to Differential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small