KH600. 1GHz, Differential Input/Output Amplifier. Features. Description. Applications. Typical Application

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1 KH 1GHz, Differential Input/Output Amplifier Features DC - 1GHz bandwidth Fixed 1dB (V/V) gain 1Ω (differential) inputs and outputs -7/-dBc nd/3rd HD at MHz ma output current 9V pp into 1Ω differential load 13,V/µs slew rate Optional supply current and offset voltage adjustment Applications ATE systems High-end instrumentation High bandwidth output amplifier Differential buffer Line driver Typical Application Description The KH is the first amplifier to combine differential input and output with a bandwidth of DC-1GHz at Vpp. The inputs and outputs are 1Ω differential (Ω single ended). The KH operates from ±V supplies and offers a fixed gain of 1dB (V/V). The KH also offers optional supply current, differential output offset voltage, and common mode offset voltage adjustments. The KH is constructed using Cadeka's in-house thin film resistor/bipolar transistor technology. The KH is available in a 1-pin TO-8 package. Single Tone Intercept Point 1 Differential 1Ω Source The KH includes Ω resistors from each input to ground (resulting in a differential input impedance of 1Ω). + - Ω Ω Distortion (dbm) I I Distortion (dbc) nd and 3rd Harmonic Distortion -3 V o = V pp rd nd Output voltage (V) V pp Pulse Response Time (ns/div) REV. January

2 DATA SHEET KH Pin Assignments 1-pin TO8 TOP VIEW GND +Vb1 +Vs +In OUT 9 -Vb 8 -Vs 3 7 -In -OUT GND +Vb +Vs NOTE: Case is grounded. Pin Definitions Pin Number Pin Name Pin Function Description, 1 +V s Positive supply voltage 8 -V s Negative supply voltage 11 +V b1 Positive bias voltage for OUT1 +V b Positive bias voltage for OUT -V b Negative bias voltage for OUT1 and OUT 1 IN1 Input 1, +IN 3 IN Input, -IN 9 OUT1 Output 1, +OUT 7 OUT Output, -OUT, 1 GND Input termination ground and case Absolute Maximum Ratings Parameter Min. Max. Unit Total Supply Voltage 1 V Maximum Junction Temperature +1 C Storage Temperature Range - +1 C Lead Temperature, 1 seconds +3 C REV. January

3 KH DATA SHEET Electrical Specifications (G = +V/V (1dB), R L = 1Ω (differential), T a = + C, +V b1 = +V b = +V s = +V, -V b = -V s = -V; unless noted) Parameter Conditions Min. Typ. Max. Unit Frequency Domain Response -3dB Bandwidth V o = Vpp 1 MHz Peaking DC to MHz. db DC to MHz. db Full Power Bandwidth V o = 8Vpp 3 MHz Linear Phase Deviation DC to MHz 3 deg Gain 1MHz 1 db DC db Input Return Loss (SE Ω) DC = MHz db DC = MHz 1 db Output Return Loss (SE Ω) DC = MHz 7 db Time Domain Response Rise and Fall Time V step 3 ps 8V step 1 ns Overload Recovery Vin = Vpp 9 ps Slew Rate 8V step 13, V/µs Distortion and Noise Response nd Harmonic Distortion Vpp, MHz 1 dbc Vpp, MHz dbc 1Vpp, MHz dbc 3rd Harmonic Distortion Vpp, MHz dbc Vpp, MHz 1 7 dbc 1Vpp, MHz 7 dbc Input Referred Noise >1MHz 1.3 nv/ Hz Noise Figure. db DC Performance Output Offset Voltage I/Os terminated Ω to GND mv Average Drift µv/ C Power Supply Rejection Ratio (±V s ) DC db Supply Current ±V s pins ma ±V b pins ma (+V b1 shorted to +V b ) 1 Output Characteristics Output Voltage Swing differential 9 V pp Output Current ± ma Recommended Operating Conditions Total Supply Voltage (+V s to -V s ) to 1 V -V b to -1 V +V b1, +V b to -1 V Input Voltage (Relative to Gain) ± V Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Notes: 1. 1% tested at C.. SE = Single-Ended. REV. January 3

4 DATA SHEET KH Typical Operating Characteristics (G = +V/V (1dB), R L = 1Ω (differential), T a = + C, +V b1 = +V b = +V s = +V, -V b = -V s = -V; unless noted) Magnitude (1dB/div) Small Signal AC Response (S 1) Reverse Isolation (S 1) -1 Magnitude (db) Input and Output Return Loss (S 11/S ) S 11 Ch S Ch Linear Phase Deviation Magnitude (db) Linear Phase Deviation (deg) Input Refered Noise (nv Hz) Input Noise Differential Gain (V/V) Differential Gain vs. Supply Voltage 3 1 ±Vb = ±Vs Supply Voltage (±V) Tone 3rd Order Intermod. Distortion V o = 1V pp Tone 3rd Order Intermod. Distortion V o = 1V pp IMD (dbc) IMD (dbc) REV. January

5 KH DATA SHEET Typical Operating Characteristics (G = +V/V (1dB), R L = 1Ω (differential), T a = + C, +V b1 = +V b = +V s = +V, -V b = -V s = -V; unless noted) Tone 3rd Order Intermod. Distortion Tone 3rd Order Intermod. Distortion Vo = Vpp Vo = Vpp IMD (dbc) IMD (dbc) nd Harmonic Distortion vs. V o -3 3rd Harmonic Distortion vs. V o -3 Distortion (dbc) V o = 1V pp V o = V pp V o = V pp V o =.V pp Distortion (dbc) V o = V pp V o = V pp V o = 1V pp V o =.V pp Single Tone Intercept Point 1 9-1dB Compression 3 Distortion (dbm) I I3 Power Output (dbm) V s Supply Currents vs. Temperature 7 V b Supply Currents vs. Temperature Supply Current (ma) 7 8 +V s -V s Supply Current (ma) V b +V b1 shorted to +V b Temperature ( C) Temperature ( C) REV. January

6 DATA SHEET KH Typical Operating Characteristics (G = +V/V (1dB), R L = 1Ω (differential), T a = + C, +V b1 = +V b = +V s = +V, -V b = -V s = -V; unless noted) Output Offset vs. Temperature Differential Output Offset vs. Temperature -1 3 Output (mv) - -3 OUT1 OUT Output (mv) Inputs/outputs terminated into Ω to GND Temperature ( C) Temperature ( C) Low Frequency Gain vs. Temperature 1. Clipping Response Gain (db) 1 Output (V) Temperature ( C) - -8 Time (ns/div) Functional Description +V s +V b1 +V b +V s The circuit is a differential amplifier with current output and feedback. The simplified schematic is shown in Figure 1. The output impedance is set by the value of the feedback resistors (R3-R) and the gain of the current mirrors. Amplifier gain is set by R1 and R. All of these resistors are internal due to the high bandwidth of the amplifier. Current Mirror 3x out in Q1 R9 R1 Current Mirror 3x in out Q The common mode output voltage (both outputs together) can be varied by changing the voltages on +V b1, +V b and -V b. Making all three voltages more negative (for instance, +V b s change from + to +3, and -V b changes from - to -7) will cause the output common mode level to become more positive. The opposite conditions will cause the output common mode level to become more negative. This can be very useful in driving differential circuits which have an elevated DC common mode input level. See Adjusting Common Mode Output Offset Voltage section for more details. +OUT +IN R3 3 R 3 R11 Q3 out in Current Mirror 3x R7 R1 R R8 Q R1 R 3 R 3 in out Current Mirror 3x -OUT -IN -V s -V b -V s By varying +V b1 and +V b differentially, the differential output offset can be adjusted. See Trimming Differential Output Offset Voltage for more details. Figure 1: KH Simplified Schematic REV. January

7 KH DATA SHEET Application Information C1.8µF +V b1 General Description + +V s Standard Operation: +V b1 = +V b = +V s = +V; -V b = -V s = -V +IN C1.1µF 3pF C1.1µF +OUT The KH is a 1GHz differential input/output amplifier constructed using Cadeka s in-house thin film resistor/bipolar transistor technology. A differential signal on the inputs of the KH will generate a differential signal at the outputs. If a single ended input signal is applied to IN1 and a fixed voltage to IN, the KH will produce both a differential and commonmode output signal. To achieve the maximum dynamic range, center the inputs halfway between +V s and -V s. -IN -Vb C.8µF + C.1µF C13.1µF 1 -Vb GND GND +Vb1 U1 KH +Vb +Vs +Vs 9 8 -Vs 7 C.1µF -V s C8.1µF -OUT The KH includes Ω resistors from each input to ground, resulting in a differential input impedance of 1Ω. Each KH output has a Ω resistance, synthesized by feedback, providing a 1Ω differential output impedance. The KH has 3 bias voltage pins that can be used to: Adjust the supply current Trim the differential output offset voltage Adjust the common mode output offset voltage over a ±3V range If these adjustments are not required, short +V b1 and +V b to +V s and -V b to -Vs as shown in Figure. Throughout this data sheet, this configuration (+V b1 = +V b = +V s = +V and -V b = -V s = -V) is referred to as the Standard Operating Condition. All of the plots in the Typical Performance section and the specifications in the Electrical Characteristics table utilize the basic circuit configuration shown in Figure, unless otherwise indicated. Figure 3 illustrates the optional circuit configuration, utilizing the bias voltage pins. Further discussions regarding these optional adjustments are provided later in this document. +V s +V s Figure 3: Optional Circuit Configuration (including optional supply current and offset adjust) Gain Differential Gain for the KH is defined as (OUT1 OUT)/ (IN1 IN). Applying identical (same phase) signals to both inputs and measuring one output will provide the Common Mode Gain. Figure shows the differential and common mode gains of the KH. Figure illustrates the response of the KH outputs when one input is driven and the other is terminated into Ω. +Vs +Vs GND GND -Vs -Vs C9.8µF C1.8µF + +V b 3pF C1.8µF +IN C.1µF -Vb 3 C1.1µF GND GND +V b1 U1 KH +V b +Vs +Vs 8 -V s 7 +OUT -V s -V 1 9 s C8.1µF +V s +V s GND -V s -V s Gain (db) Differential Gain Common Mode Gain -IN C.1µF +Vs -OUT C9.8µF C1.8µF -1 1M 1M 1M 1G Frequency (Hz) Figure : Basic Circuit Configuration Figure : Differential and Common Mode Gain REV. January 7

8 DATA SHEET KH Gain (db) 1 1 Figure : Gain with Single-Ended Input Applied to IN1 Supply Current 8 OUT1 OUT 1M 1M 1M 1G Frequency (Hz) The KH draws supply current from the V s pins as well as the 3 V b pins. Under Standard Conditions, the total supply current is typically 89mA. Changing the voltages on the bias voltage pins will change their respective supply currents as shown in Figures and 7 Power Dissipation The KH runs at constant power, which may be calculated by (Total I s )(V s (-V s )). Under standard operating conditions, the power is 89mW. The power dissipated in the package is completely constant, independent of signal level. In other words, the KH runs class A. Power Supply Rejection Ratio (PSRR) The KH has supply pins, +V s, -V s, +V b1, +V b, and -V b. All of these sources must be considered when measuring the PSRR. Figure 8 shows the response of +V s and -V s, looking at OUT. +V s and -V s have the same effect on OUT1. db ±V b = ±V +V s -V s Vb Supply Currents (ma) V b +V b +V b1 8 +V b1 (V) Figure : V b Supply Currents vs. +V b1 Changing the voltage on the +Vb1 pin will alter the supply current for +V b1 only, +V b and -V b stay constant at typically 11mA and ma respectively. See Figure. The same principle applies for +V b. And Figure 7 illustrates the effect of changing -V b. +Vb Supply Currents (ma) V b +V b1, +V b V b (V) b Vb Supply Currents (ma) -Vb Supply Currents (ma) -1 1k 1M 1M 1M 1G Frequency (Hz) Figure 8: ±V s PSRR Figure 9 shows the response of OUT1 and OUT when +V b1 changes. The PSRR of the V b pins is bad, which means that they have a large effect on the response of the KH when their voltages are changed. This is the desired effect of the bias voltage pins. As Figure 9 indicates, changing +V b1 has a greater effect on OUT1 than it does on OUT. Changing +V b1 has a direct effect on OUT1. Changing +V b has a direct effect on OUT. See the Trimming Differential Output Offset Voltage section for more details. db ±V s = ±V OUT OUT1-1 1k 1M 1M 1M 1G Frequency (Hz) Figure 9: +V b PSRR Figure 7: V b Supply Currents vs -V b 8 REV. January

9 KH Single-to-Differential Operation The KH is specifically designed for differential-todifferential operation. However, the KH can be used in a single-to-differential configuration with some performance degradation. The unused input should be terminated into Ω. When driven single-ended, there will be a slight imbalance in the differential output voltages, see Figure. This imbalance is approximately.88db. To compensate for this imbalance, attenuate the higher gain output. (If the signal is applied to IN1, attenuate OUT1.) Unused Inputs and/or Outputs For optimal performance, terminate any unused inputs and/or outputs with Ω. Adjusting Supply Current The KH operates class A, so maximum output current is directly proportional to supply current. Adjusting the voltages on +V b1 and +V b in opposition to -V b controls supply current. The default supply current of the KH has been optimized for best bandwidth and distortion performance. The main reason for adjusting supply current is to either reduce power or increase maximum output current. Adjusting the supply current will not significantly improve bandwidth or distortion and may actually degrade them. To adjust the supply current, apply voltages of equal magnitude, but opposite polarity, to the bias voltage pins. For example, setting +V b1, +V b to +VDC and -V b to -VDC (as shown in Figure 3) results in the standard supply current condition. Setting +V b1, +V b to +.V and -V b to -.V results in an approximate 1% increase in supply current. Figure 1 shows the how the total supply current of the KH is effected by changes in the bias voltages (V b = +V b1 = +V b = -V b ). Total supply Current (ma) ±V s = ±V Total supply Current (ma) 1 7 Figure 11: Total Supply Current vs. V s -3dB Bandwidth (MHz) Distortion (db) ±V b = ±V 8 Supply Voltage (±V) Total Supply Current (ma) Figure 1: -3dB Bandwidth vs. I s V MHz 3rd nd Total Supply Current (ma) DATA SHEET Figure 13: Harmonic Distortion vs. Total I s ± 8 V b (V) Figure 1: Total Supply Current vs. V b Supply current is relatively independent of the voltages on +V s and -V s as shown in Figure 11. REV. January 9

10 DATA SHEET KH Distortion (db) -1 V MHz rd nd Total Supply Current (ma) Output (mv) OUT1, OUT V b (V) Figure 1: Harmonic Distortion vs. Total I s Trimming Differential Output Offset Voltage Vary +V b1 and +V b to adjust differential offset voltage. +V b1 controls OUT1 and +V b controls OUT. The output voltage moves in a direction opposite to the direction of the bias voltage. Figure 1 shows the resulting voltage change at OUT1 and OUT when the voltage on +V b1 is changed. Figure 1 shows the resulting voltage change at OUT1 and OUT when the voltage on +V b is changed. OUT1 and OUT change at the same rate when -Vb is changed, as shown in Figure 17. Therefore, changing the voltage on -V b has no effect on differential output offset voltage. Output (mv) Output (mv) OUT Figure 1: Output vs. +V b1 OUT1 OUT1 8 +V b1 (V) OUT 8 +V b (V) Figure 1: Output vs. +V b Figure 17: Output vs. -V b Adjusting Common Mode Output Offset Voltage Short +V b1 to +V b and vary +V b and -V b to adjust common mode output offset voltage. The recommended values for achieving a given output offset are shown in Figure 18. These values were chosen to give the best distortion performance. The exact values are not crucial. Volts (V) V b1, +V b 1 3 Common Mode Voltage (V) Figure 18: V b vs. Common Mode Voltage For common mode voltages of to -3.V swap the V b s and change the polarity. See the example below. Figures 19 and illustrate how the common mode voltage effects harmonic distortion. Figure 1 shows the resulting I s and -I s supply currents. Pay close attention to your peak-to-peak output voltage requirement. As you change the common mode voltage, you may need to increase or shift ±V s in order to achieve your output requirements. A V margin is recommended. For example, if your output requirement is V pp and you will be -V b +V s = +7.V -Vs = -3.V Desired Common +V b1 and +V b (V) -V b (V) Mode Voltage Volts -8 - Volts 8-1 REV. January

11 KH DATA SHEET changing the common mode from 1V to 3V set V s = +7. and -V s to -3.V. This example calls for a supply voltage of greater than 1V. This will not effect supply current because as Figure 11 indicates, changing ±V s has no effect on supply current. Harmonic Distortion (dbc) Figure 19: V pp HD vs. Common Mode Voltage Harmonic Distortion (dbc) V s = +7.V -Vs = -3.V Vpp, MHz HD3 HD +V s = +7.V -Vs = -3.V Vpp, MHz HD HD3 1 3 Common Mode Output Voltage (V) HD3 HD 1 3 Common Mode Output Voltage (V) Figure : V pp HD vs. Common Mode Voltage Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Cadeka has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include all recommended.8µf and.1µf bypass capacitors Place the.8µf capacitors within.7 inches of the power pin Place the.1µf capacitors within.1 inches of the power pin Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Minimize all trace lengths to reduce series inductances A 1pF to pf bypass capacitor can be used between pins and and between pins 1 and 11 to reduce crosstalk from the positive supply Refer to the evaluation board layouts shown in Figure for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device: Evaluation Description Products Board KEB7 Basic KH Eval Bd KH KEB9 KH Eval Bd with offset and KH I cc Adjust Option Supply Current (ma) V s = +7.V -Vs = -3.V I s, -I s Do not include capacitors C, C3, C7, C11, and C1 that are shown on the KEB7 evaluation board. Evaluation board schematics and layouts are shown in Figure. Refer to the schematic shown in Figure 1 for the KEB7 board and Figure 3 for the KEB9 board. 1 3 Common Mode Output Voltage (V) Figure 1: Resulting I s and -I s REV. January 11

12 DATA SHEET KH KH Evaluation Board Layout Figure a: KEB7 (top side) Figure b: KEB7 (bottom side) Figure c: KEB9 (top side) Figure d: KEB9 (bottom side) 1 REV. January

13 KH DATA SHEET Ordering Information Model Part Number Package Evaluation Board KH KHAI 1-pin TO8 KEB7, KEB9 Temperature range: - C to +8 C. KH Package Dimensions A L e 1 e φd D 1 e 11 1 F φb 3 1 k α k 1 TO-8 SYMBOL INCHES MILIMETERS Minimun Maximum Minimum Maximum A φb φd φd e. BSC 1.1 BSC e 1. BSC.8 BSC e.1 BSC. BSC F k k L α BSC BSC NOTES: Seal: cap weld Lead finish: gold per MIL-M-381 Package composition: Package: metal Lid: Type A per MIL-M-381 Life Support Policy Cadeka s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of Cadeka Microcircuits, Inc. As used herein: 1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Cadeka does not assume any responsibility for use of any circuitry described, and Cadeka reserves the right at any time without notice to change said circuitry and specifications. Cadeka Microcircuits, LLC

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