Low Drift, Low Power Instrumentation Amplifier AD621
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1 a FEATURES EASY TO USE Pin-Strappable Gains of 0 and 00 All Errors Specified for Total System Performance Higher Performance than Discrete In Amp Designs Available in -Lead DIP and SOIC Low Power,.3 ma Max Supply Current Wide Power Supply Range ( 2.3 V to V) EXCELLENT DC PERFORMANCE 0.% Max, Total Gain Error ppm/ C, Total Gain Drift 2 V Max, Total Offset Voltage.0 V/ C Max, Offset Voltage Drift LOW NOISE 9 nv/ khz, Input Voltage Noise 0.2 V p-p Noise (0. Hz to 0 Hz) EXCELLENT AC SPECIFICATIONS 00 khz Bandwidth (G = 0), 200 khz (G = 00) 2 s Settling Time to 0.0% APPLICATIONS Weigh Scales Transducer Interface and Data Acquisition Systems Industrial Process Controls Battery-Powered and Portable Equipment PRODUCT DESCRIPTION The AD62 is an easy to use, low cost, low power, high accuracy instrumentation amplifier that is ideally suited for a wide range of applications. Its unique combination of high performance, small size and low power, outperforms discrete in amp implementations. High functionality, low gain errors, and low TOTAL ERROR, ppm OF FULL SCALE 30,000 2,000 20,000,000 0,000,000 AD62A 3 OP AMP (3 OP 07S) SUPPLY CURRENT ma Figure. Three Op Amp IA Designs vs. AD62 Low Drift, Low Power Instrumentation Amplifier AD62 CONNECTION DIAGRAM -Lead Plastic Mini-DIP (N), Cerdip (Q) and SOIC (R) Packages G = 0/00 IN 2 AD62 7 G = 0/00 +V S +IN 3 TOP VIEW (Not to Scale) 6 V S 4 REF gain drift errors are achieved by the use of internal gain setting resistors. Fixed gains of 0 and 00 can easily be set via external pin strapping. The AD62 is fully specified as a total system, therefore, simplifying the design process. For portable or remote applications, where power dissipation, size, and weight are critical, the AD62 features a very low supply current of.3 ma max and is packaged in a compact -lead SOIC, -lead plastic DIP or -lead cerdip. The AD62 also excels in applications requiring high total accuracy, such as precision data acquisition systems used in weigh scales and transducer interface circuits. Low maximum error specifications including nonlinearity of 0 ppm, gain drift of ppm/ C, 0 µv offset voltage, and 0.6 µv/ C offset drift ( B grade), make possible total system performance at a lower cost than has been previously achieved with discrete designs or with other monolithic instrumentation amplifiers. When operating from high source impedances, as in ECG and blood pressure monitors, the AD62 features the ideal combination of low noise and low input bias currents. Voltage noise is specified as 9 nv/ Hz at khz and 0.2 µv p-p from 0. Hz to 0 Hz. Input current noise is also extremely low at 0. pa/ Hz. The AD62 outperforms FET input devices with an input bias current specification of. na max over the full industrial temperature range. TOTAL INPUT VOLTAGE NOISE, G = 00 Vp-p (0. 0Hz) 0,000, TYPICAL STANDARD BIPOLAR INPUT AD62 SUPER ETA BIPOLAR INPUT 0. k 0k 00k M 0M 00M SOURCE RESISTANCE Figure 2. Total Voltage Noise vs. Source Resistance Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
2 AD62 SPECIFICATIONS Gain = 0 2 C, V S = V, and R L = 2 k, unless otherwise noted.) AD62A AD62B AD62S Model Conditions Min Typ Max Min Typ Max Min Typ Max Unit GAIN Gain Error V OUT = ± 0 V % Nonlinearity, V OUT = 0 V to +0 V R L = 2 kω ppm of FS Gain vs. Temperature. ±. ± ± ppm/ C TOTAL VOLTAGE OFFSET Offset (RTI) V S = ± V µv Over Temperature V S = ± V to ± V µv Average TC V S = ± V to ± V µv/ C Offset Referred to the Input vs. Supply (PSR) 2 V S = ± 2.3 V to ± V db Total NOISE Voltage Noise (RTI) khz nv/ Hz RTI 0. Hz to 0 Hz µv p-p Current Noise f = khz fa/ Hz 0. Hz 0 Hz pa p-p INPUT CURRENT V S = ± V Input Bias Current na Over Temperature na Average TC pa/ C Input Offset Current na Over Temperature na Average TC...0 pa/ C INPUT Input Impedance Differential GΩ pf Common-Mode GΩ pf Input Voltage Range 3 V S = ± 2.3 V to ± V V S +.9 +V S.2 V S +.9 +V S.2 V S +.9 +V S.2 V Over Temperature V S V S.3 V S V S.3 V S V S.3 V V S = ± V to ± V V S +.9 +V S.4 V S +.9 +V S.4 V S +.9 +V S.4 V Over Temperature V S V S.4 V S V S.4 V S V S.4 V Common-Mode Rejection Ratio DC to 60 Hz with kω Source Imbalance V CM = 0 V to ± 0 V db Output Swing R L = 0 kω, V S = ± 2.3 V to ± V V S +. +V S.2 V S +. +V S.2 V S +. +V S.2 V Over Temperature V S +.4 +V S.3 V S +.4 +V S.3 V S +.6 +V S.3 V V S = ± V to ± V V S +.2 +V S.4 V S +.2 +V S.4 V S +.2 +V S.4 V Over Temperature V S +.6 +V S. V S +.6 +V S. V S V S. V Short Current Circuit ± ± ± ma DYNAMIC RESPONSE Small Signal, 3 db Bandwidth khz Slew Rate V/µs Settling Time to 0.0% 0 V Step µs REFERENCE INPUT R IN kω I IN V IN +, V REF = µa Voltage Range V S +.6 +V S.6 V S +.6 +V S.6 V S +.6 +V S.6 V Gain to Output ± ± ± POWER SUPPLY Operating Range ± 2.3 ± ± 2.3 ± ± 2.3 ± V Quiescent Current V S = ± 2.3 V to ± V ma Over Temperature ma TEMPERATURE RANGE For Specified Performance 40 to + 40 to + to +2 C See Analog Devices military data sheet for 3B tested specifications. 2 This is defined as the supply range over which PSRR is defined. 3 Input Voltage Range = CMV + (Gain V DIFF ). Specifications subject to change without notice. 2
3 Gain = 00 2 C, V S = V, and R L = 2 k, unless otherwise noted.) AD62 AD62A AD62B AD62S Model Conditions Min Typ Max Min Typ Max Min Typ Max Unit GAIN Gain Error V OUT = ± 0 V % Nonlinearity, V OUT = 0 V to +0 V R L = 2 kω ppm of FS Gain vs. Temperature ± ± ± ppm/ C TOTAL VOLTAGE OFFSET Offset (RTI) V S = ± V µv Over Temperature V S = ± V to ± V 2 22 µv Average TC V S = ± V to ± V µv/ C Offset Referred to the Input vs. Supply (PSR) 2 V S = ± 2.3 V to ± V db Total NOISE Voltage Noise (RTI) khz nv/ Hz RTI 0. Hz to 0 Hz µv p-p Current Noise f = khz fa/ Hz 0. Hz 0 Hz pa p-p INPUT CURRENT V S = ± V Input Bias Current na Over Temperature na Average TC pa/ C Input Offset Current na Over Temperature na Average TC...0 pa/ C INPUT Input Impedance Differential GΩ pf Common-Mode GΩ pf Input Voltage Range 3 V S = ± 2.3 V to ± V V S +.9 +V S.2 V S +.9 +V S.2 V S +.9 +V S.2 V Over Temperature V S V S.3 V S V S.3 V S V S.3 V V S = ± V to ± V V S +.9 +V S.4 V S +.9 +V S.4 V S +.9 +V S.4 V Over Temperature V S V S.4 V S V S.4 V S V S.4 V Common-Mode Rejection Ratio DC to 60 Hz with kω Source Imbalance V CM = 0 V to ± 0 V db Output Swing R L = 0 kω, V S = ± 2.3 V to ± V V S +. +V S.2 V S +. +V S.2 V S +. +V S.2 V Over Temperature V S +.4 +V S.3 V S +.4 +V S.3 V S +.6 +V S.3 V V S = ± V to ± V V S +.2 +V S.4 V S +.2 +V S.4 V S +.2 +V S.4 V Over Temperature V S +.6 +V S. V S +.6 +V S. V S V S. V Short Current Circuit ± ± ± ma DYNAMIC RESPONSE Small Signal, 3 db Bandwidth khz Slew Rate V/µs Settling Time to 0.0% 0 V Step µs REFERENCE INPUT R IN kω I IN V IN +, V REF = µa Voltage Range V S +.6 +V S.6 V S +.6 +V S.6 V S +.6 +V S.6 V Gain to Output ± ± ± POWER SUPPLY Operating Range ± 2.3 ± ± 2.3 ± ± 2.3 ± V Quiescent Current V S = ± 2.3 V to ± V ma Over Temperature ma TEMPERATURE RANGE For Specified Performance 40 to + 40 to + to +2 C See Analog Devices military data sheet for 3B tested specifications. 2 This is defined as the supply range over which PSEE is defined. 3 Input Voltage Range = CMV + (Gain V DIFF ). Specifications subject to change without notice. 3
4 AD62 ABSOLUTE MAXIMUM RATINGS Supply Voltage ± V Internal Power Dissipation mw Input Voltage (Common Mode) ±V S Differential Input Voltage ± 2 V Output Short Circuit Duration Indefinite Storage Temperature Range (Q) C to +0 C Storage Temperature Range (N, R) C to +2 C Operating Temperature Range AD62 (A, B) C to + C AD62 (S) C to +2 C Lead Temperature Range (Soldering 0 seconds) C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: -Lead Plastic Package: θ JA = 9 C/W -Lead Cerdip Package: θ JA = 0 C/W -Lead SOIC Package: θ JA = C/W ESD SUSCEPTIBILITY ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD62 features proprietary ESD protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality. ORDERING GUIDE Temperature Package Package Model Range Description Option AD62AN 40 C to + C -Lead Plastic DIP N- AD62BN 40 C to + C -Lead Plastic DIP N- AD62AR 40 C to + C -Lead Plastic SOIC R- AD62BR 40 C to + C -Lead Plastic SOIC R- AD62SQ/3B 2 C to +2 C -Lead Cerdip Q- AD62ACHIPS 40 C to + C Die N = Plastic DIP; Q = Cerdip; R = SOIC. 2 See Analog Devices military data sheet for 3B specifications. METALIZATION PHOTOGRAPH Dimensions shown in inches and (mm). Contact factory for latest dimensions..2 (3.7) +V S 7 6 RG REFERENCE (2.4) RG 4 V S 2 IN 3 +IN 4
5 AD62 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic DIP (N-) Package ( ) SEATING PLANE 0.2 (3.) MIN 0.39 (9.9) MAX (6.3) 0.3 (7.7) ( ) 0.30 (7.62) REF ( ) C /0 (rev. B) ( ) 0.0 (2.4) TYP ( ) (0.4) NOM Cerdip (Q-) Package 0.00 (0.3) MIN 0.0 (.4) MAX 0.30 (7.7) (.9) 0.40 (0.29) MAX (.7) (0.76) (.3) (7.37) (.0) MAX (.2) 0.0 (0.3) (.0) 0.2 (3.) 0.0 (3.) MIN 0.0 (0.3) 0.00 (0.20) (0.) 0.04 (0.36) 0.00 (2.4) 0 - BSC SEATING PLANE SOIC (R-) Package 0.9 (.03) 0. (4.77) (.27) TYP 0. (4.00) 0.0 (3.0) 0.0 (0.46) 0.04 (0.36) (6.200) 0.22 (.0) 0.20 (.20) 0. (4.60) PRINTED IN U.S.A (0.2) (0.0) 0.094(2.39) 0.00 (2.9) 0.0 (0.3) (0.) 0.04 (.) (0.0) 6
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