DAC10* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017

Size: px
Start display at page:

Download "DAC10* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017"

Transcription

1

2 * PRODUCT PAGE QUICK LINKS Last Content Update: 0/3/07 COMPARABLE PARTS View a parametric search of comparable parts. DOCUMENTATION Data Sheet : 0-Bit Current-Out DAC Data Sheet REFERENCE MATERIALS Solutions Bulletins & Brochures Digital to Analog Converters ICs Solutions Bulletin DESIGN RESOURCES Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints DISCUSSIONS View all EngineerZone Discussions. SAMPLE AND BUY Visit the product page to see pricing options. TECHNICAL SUPPORT Submit a technical question or find your regional support number. DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.

3 SPECIFICATIONS ELECTRICAL CHARACTERISTICS F G Parameter Symbol Conditions Min Typ Max Min Typ Max Units MONOTONICITY 0 0 Bits NONLINEARITY NL LSB DIFFERENTIAL NONLINEARITY DNL LSB SETTLING TIME t S All Bits Switched ON or OFF Settle to 0.05% of FS (See Note) ns OUTPUT CAPACITANCE C O 8 8 pf PROPAGATION DELAY t PLH All Bits Switched R L = 5 kω ns t PHL R L = 0 kω ns OUTPUT VOLTAGE Full-Scale Current Change V COMPLIANCE V OC < LSB V GAIN TEMPCO TCI FS (See Note) ±0 ±5 ±0 ±50 ppm/ C FULL-SCALE SYMMETRY I FSS I FR I FR µa ZERO-SCALE CURRENT I ZS µa FULL-SCALE CURRENT I FR (See Note) ma REFERENCE INPUT SLEW RATE DI/dt ma/µs REFERENCE BIAS CURRENT I B 3 3 µa POWER SUPPLY PPS/ FS +.5 V V+ 8 V % I FS /% V SENSITIVITY PPS/ FS 8 V V 0 V % I FS /% V POWER SUPPLY CURRENT I+ V S = ± 5 V; I REF = ma.3.3 ma I ma I+ V S = +5 V; 7.5 V; I REF = ma.8.8 ma I ma POWER DISSIPATION P D V S = ± 5 V; I REF = ma mw P D V S = +5 V; 7.5 V; I REF = ma mw LOGIC INPUT LEVELS V IL = V V IH = 0 V LOGIC INPUT CURRENTS I IL = 0; V IN = 0.8 V µa I IH V IN =.0 V µa ELECTRICAL CHARACTERISTICS F G Parameter Symbol Conditions Min Typ Max Min Typ Max Units MONOTONICITY 0 0 Bits NONLINEARITY NL LSB DIFFERENTIAL NONLINEARITY DNL LSB OUTPUT VOLTAGE COMPLIANCE V OC Full-Scale Current Change, < LSB 5 / /+5 +0 V FULL-SCALE CURRENT I FS V REF = V, R = R5 = kω ma FULL-SCALE SYMMETRY I FSS I FR I FR µa ZERO-SCALE CURRENT I ZS µa NOTE: Guaranteed by design. (@ V S = 5 V; I REF = ma; 0 C T A +70 C for F and G, unless otherwise noted. Output characteristics apply to both UT and UT.) (@ V S = 5 V; I REF = ma; T A = +5 C, unless otherwise noted. Output characteristics apply to both UT and UT.) REV. D

4 WAFER TEST LIMITS N Parameter Symbol Conditions Limit Units RESOLUTION 0 Bits min MONOTONICITY 0 Bits min NONLINEARITY NL ±0.5 LSB max OUTPUT VOLTAGE COMPLIANCE V OC True LSB +0 V max 5 V min OUTPUT CURRENT RANGE I FS ±3.99 ma ±8 µa max ZERO-SCALE CURRENT I ZS All Bits OFF 0.5 µa max LOGIC INPUT V IH I IN = 00 na V min LOGIC INPUT 0 V Ground 0.8 V max I IN = 00 µa POSITIVE SUPPLY CURRENT I+ V+ = 5 V ma max NEGATIVE SUPPLY CURRENT I V+ = 5 V 5 ma max NOTE: Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard produce dice. TYPICAL ELECTRICAL CHARACTERISTICS (@ V S = 5 V, I REF = ma, T A = +5 C, unless otherwise noted. Output characteristics refer to both UT and UT ). (@ V S = 5 V, I REF = ma, unless otherwise noted. Output characteristics refer to both UT and UT ). F Parameter Symbol Conditions Typ Units SETTLING TIME t S To ± / LSB When Output Is Switched from 0 to FS 85 ns GAIN TEMPERATURE COEFFICIENT (TC) V REF Tempco Excluded ±0 ppm FS/ C OUTPUT CAPACITANCE 8 pf OUTPUT RESISTANCE 0 MΩ DICE CHARACTERISTICS DIE SIZE inch, 7,97 sq. mils (.3.0 mm, 5.07 sq. mm) REV. D 3

5 ABSOLUTE MAXIMUM RATINGS Operating Temperature FX, GX, GS, GP C to +70 C Junction Temperature (T J ) C to +50 C Storage Temperature C to +50 C Lead Temperature (Soldering, 0 sec) C V+ Supply to V Supply V Logic Inputs V to V plus 3 V V to V+ Analog Current Outputs V to 8 V Reference Inputs (V to V 7 ) V to V+ Reference Input Differential Voltage (V to V 7 ).... ± 8 V Reference Input Current (I ) ma Package Type JA JC Units 8-Lead Hermetic DIP (X) 8 5 C/W 8-Lead SOIC (S) 89 8 C/W 8-Lead Plastic DIP (P) 7 33 C/W NOTES Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. θ JA is specified for worst case mounting conditions, i.e., θ JA is specified for device in socket for Cerdip packages. ORDERING GUIDE INL Temperature Package Package Model (LSB) Range Description Options FX C to +70 C Cerdip Q-8 GX 0 C to +70 C Cerdip Q-8 GS 0 C to +70 C SOIC R-8 GP 0 C to +70 C Plastic DIP N-8 PIN CONNECTIONS 8-Lead Hermetic DIP 8-Lead Plastic DIP 8-Lead SOIC V (MSB) B 3 5 TOP VIEW (Not to Scale) 8 COMP 7 V REF ( ) V REF (+) 5 V+ B0 (LSB) B B3 B B B9 B8 B7 B REV. D

6 Typical Performance Characteristics 0mA.0mA.0mA I REF = ma UT UT ( ) () Figure. True and Complementary Output Operations OUTPUT CURRENT ma 8.0 T A = T MIN TO T MAX 7. ALL BITS ON V = 5V, V = 0V I REF = ma I REF = ma. 0.8 I REF = 0.mA OUTPUT VOLTAGE Volts Figure. Output Current vs. Output Voltage (Output Voltage Compliance) OUTPUT VOLTAGE Volts SHADED AREA INDICATES PERMISSABLUTPUT VOLTAGE RANGE FOR V = 5V I REF.0mA FOR OTHER V OR I REF SEUTPUT CURRENT vs. OUTPUT VOLTAGE CURVE TEMPERATURE C Figure 3. Output Voltage Compliance vs. Temperature POWER SUPPLY CURRENT ma ALL BITS "HIGH" OR "LOW" V+, POSITIVE POWER SUPPLY V DC Figure. Power Supply Current vs. V+ I I+ POWER SUPPLY CURRENT ma BITS MAY BE HIGH OR LOW I WITH I REF = ma I WITH I REF = ma I WITH I REF = 0.mA I WITH I REF = 0.mA V, NEGATIVE POWER SUPPLY V DC Figure 5. Power Supply Current vs. V POWER SUPPLY CURRENT ma V = 5V I REF =.0mA ALL BITS MAY BE "HIGH" OR "LOW" V+ = +5V I TEMPERATURE C Figure. Power Supply Current vs. Temperature I BASIC CONNECTIONS +V REF I FR = +V REF 03 R REF 0 + = I FR FOR ALL MSB LSB LOGIC STATES B B B 3 B B 5 B B 7 B 8 B 9 B 0 R REF V REF (R) I REF R F 3 8 C C V COMP 0.0 F V+ FOR FIXED REFERENCE, TTL OPERATION, TYPICAL VALUES ARE: V REF = V R REF = 5.000k R5 = R REF C C = 0.0 F = 0V (GROUND) Figure 7. Basic Positive Reference Operation V IN R REF R7 +V REF V IN I IN R IN R REF R REF R7 (OPTIONAL) I REF I REF 7 7 PEAK NEGATIVE SWING OF I IN HIGH INPUT IMPEDANCE +V REF MUST BE ABOVE PEAK POSITIVE SWING OF V IN Figure 8. Accommodating Bipolar References CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 000 V readily accumulate on the human body and test equipment and can discharge without detection. WARNING! ESD SENSITIVE DEVICE REV. D 5

7 V REF I FS R REF R7 V REF R REF 7 NOTE: R REF SETS I FS ; R7 IS FOR BIAS CURRENT CANCELLATION V REF +0V 0k POT LOW T.C..5k 39k I REF (+) ma V 7 APPROXIMATELY 5k Figure 9. Basic Negative Reference Operation Figure 0. Recommended Full-Scale Adjustment Circuit MSB LSB B B B 3 B B 5 B B 7 B 8 B 9 B 0 ma ma B B B 3 B B 5 B B 7 B 8 B 9 B 0 FULL RANGE I REF =.000mA.5k.5k HALF-SCALE +LSB HALF-SCALE HALF-SCALE LSB HALF-SCALE +LSB ZERO SCALE +LSB Figure. Basic Unipolar Negative Operation MSB LSB +5V POSITIVE FULL RANGE B B B 3 B B 5 B B 7 B 8 B 9 B I REF (+) =.000mA B B B 3 B B 5 B B 7 B 8 B 9 B 0 E O.5k.5k POSITIVE FULL RANGE LSB ZERO-SCALE +LSB ZERO-SCALE ZERO-SCALE LSB NEGATIVE FULL-SCALE +LSB NEGATIVE FULL-SCALE Figure. Basic Bipolar Output Operation +5V 5k MSB LSB B B B 3 B B 5 B B 7 B 8 B 9 B 0.5k V IN V O REF0 GND k 5k C C +5V 5V B B B 3 B B 5 B B 7 B 8 B 9 B 0 POSITIVE FULL RANGE ZERO-SCALE NEGATIVE FULL-SCALE +LSB NEGATIVE FULL-SCALE V+ V Figure 3. Offset Binary Operation REV. D

8 LOW-TO-HIGH SETTLING V L =.500V 0.00V HIGH-TO-LOW SETTLING V L = 0.500V 0.00V V L 0.500V 0.00V +5V 5 5 k 0. F 0 F IN57 0. F 0 F 0.0 F.7 F D.U.T. N F +5V F.5k 5V +5V.5k 0.0 F REF-0 5 0k N98 5V M /W, 5% CARBON k.7 F 5V 0.0 F F k NOTES:. CASF N98s MUST BE GROUNDED.. RESISTORS ARE /W MF, % UNLESS OTHERWISE SPECIFIED. 3. USE FET PROBE (7A SCOPE PLUGIN). 5V V O 99k /W, 5% CARBON / LSB SETTLING = 7.8mV 75mV Figure. Settling Time Measurement R L TTL V TH = +.V +5V 9.k V TH = +.V +5V CMOS V TH = +7.V E P0 O O 0 TO +I FR R L I FR = 03 0 I REF FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC), CONNECT INVERTING INPUT OF OP AMP TO (PIN ); CONNECT (PIN ) TO GROUND. ECL.k 0. F Figure 5. Positive Low Impedance Output Operation 3k "A" N390 3k N390 R L OP5 0 TO I FR R L I FR = 03 0 I REF 39k TO PIN.k FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC), CONNECT NOINVERTING INPUT OF OP AMP TO PIN ); CONNECT (PIN ) TO GROUND. 5.V Figure. Negative Low Impedance Output Operation Figure 7. Interfacing with Various Logic Families REV. D 7

9 APPLICATIONS 0V R IN +V REF R P R REF TYPICAL VALUES: R IN = k +V IN = V R EQ = + + R IN R P R REF OPTIONAL RESISTOR FOR OFFSET INPUTS R EQ = NO CAP Figure 8. Pulsed Reference Operation Reference Amplifier Setup The is a multiplying D/A converter in which the output current is the product of a digital number and the input reference current. The reference current may be fixed or may vary from nearly zero to ma. The full-scale output current is a linear function of the reference current and is given by: I FR = 03 0 I REF where I REF equals current flowing into Pin. In positive reference applications, an external positive reference voltage forces current through R into the V REF (+) terminal (Pin ) of the reference amplifier. Alternatively, a negative reference may be applied to V REF ( ) at Pin 7; reference current flows from ground through R into V(+) as in the positive reference case. This negative reference connection has the advantage of a very high impedance presented at Pin 7. R7 (nominally equal to R) is used to cancel bias current errors; R7 may be eliminated with only a minor increase in error. Bipolar references may be accommodated by offsetting V REF or Pin 7. The negative common-mode range of the reference amplifier is given by: V CM = V plus (I REF kω) plus V. The positive common-mode range is V+ less.8 V. When a dc reference is used, a reference bypass capacitor is recommended. A 5 V TTL logic supply is not recommended as a reference. If a regulated power supply is used as a reference, R should be split into two resistors with the junction bypassed to ground with a 0. µf capacitor. For most applications, the tight relationship between I REF and I FS will eliminate the need for trimming I REF. If required, fullscale trimming may be accomplished by adjusting the value of R, or by using a potentiometer for R. An improved method of full-scale trimming that eliminates potentiometer TC effect is shown in the Recommended Full-Scale Adjustment circuit. The reference amplifier must be compensated by using a capacitor from Pin 8 to V. For fixed reference operation, a 0.0 µf capacitor is recommended. For variable reference applications, see section entitled Reference Amplifier Compensation for Multiplying Applications. R L R L Multiplying Operation The provides excellent multiplying performance with an extremely linear relationship between I FS and I REF over a range of ma to µa. Monotonic operation is maintained over a typical range of I REF from 00 µa to ma. Reference Amplifier Compensation for Multiplying Applications AC reference applications will require the reference amplifier to be compensated using a capacitor from Pin 8 to V. The value of this capacitor depends on the impedance presented to Pin for R values of.0 kω,.5 kω and 5.0 kω, minimum values of C C are 5 pf, 37 pf and 75 pf. Larger values of R require proportionately increased values of C C for proper phase margin. For fastest response to a pulse, low values of R enabling small C C values should be used. If Pin is driven by a high impedance such as a transistor current source, none of the above values will suffice and the amplifier must be heavily compensated, which will decrease overall bandwidth and slew rate. For R = kω and C C = 5 pf, the reference amplifier slews at ma/µs enabling a transition from I REF = 0 to I REF = ma in 500 ns. Operation with pulse inputs to the reference amplifier may be accommodated by an alternate compensation scheme. This technique provides lowest full-scale transition times. An internal clamp allows quick recovery of the reference amplifier from a cutoff (I REF = 0) condition. Full-scale transition (0 ma to ma) occurs in 0 ns when the equivalent impedance at Pin is 00 Ω and C C = 0. This yields a reference slew rate of ma/ µs, which is relatively independent of R IN and V IN values. LOGIC INPUTS The design incorporates a unique logic input circuit that enables direct interface to all popular logic families and provides maximum noise immunity. This feature is made possible by the large input swing capability, µa logic input current and completely adjustable logic threshold voltage. For V = 5 V, the logic inputs may swing between 5 and +8 V. This enables direct interface with +5 V CMOS logic, even when the is powered from a +5 V supply. Minimum input logic swing and minimum logic threshold voltage are given by: V plus (l REF kω) plus 3 V. The logic threshold may be adjusted over a wide range by placing an appropriate voltage at the logic threshold control Pin (Pin, ). The appropriate graph shows the relationship between and V TH over the temperature range, with V TH nominally. V above. For TTL interface, simply ground Pin. When interfacing ECL, an I REF = ma is recommended. For interfacing other logic families, see Figure 7. For general setup of the logic control circuit, it should be noted that Pin will sink. ma typical; external circuitry should be designed to accommodate this current. Fastest settling times are obtained when Pin sees a low impedance. If Pin is connected to a kω divider, for example, it should be bypassed to ground by a 0.0 µf capacitor. 8 REV. D

10 ANALOG OUTPUT CURRENTS Both true and complemented output sink currents are provided where + = I FS. Current appears at the true output when a is applied to each logic input. As the binary count increases, the sink current at Pin increases proportionally, in the fashion of a positive logic D/A converter. When a 0 is applied to any input bit, that current is turned off at Pin and turned on at Pin. A decreasing logic count increases as in a negative or inverted logic D/A converter. Both outputs may be used simultaneously. If one of the outputs is not required, it must still be connected to ground or to a point capable of sourcing I FS. DO NOT LEAVE AN UNUSED OUTPUT PIN OPEN. Both outputs have an extremely wide voltage compliance enabling fast direct current-to-voltage conversion through a resistor tied to ground or other voltage source. Positive compliance is 3 V above V and is independent of the positive supply. Negative compliance is +0 V above V. The dual outputs enable double the usual peak-to-peak load swing when driving loads in quasi-differential fashion. This feature is especially useful in cable driving, CRT deflection and in other balanced applications such as driving center-tapped coils and transformers. POWER SUPPLIES The operates over a wide range of power supply voltages from a total supply of 9 V to 3 V. When operating with V supplies of 0 V or less, I REF ma is recommended. Low reference current operation decreases power consumption and increases negative compliance, reference amplifier negative common-mode range, negative logic input range and negative logic threshold range; consult the various figures for guidance. For example, operation at 9 V with I REF = ma is not recommended because negative output compliance would be reduced to near zero. Operation from lower supplies is possible, however at least 8 V total must be applied to ensure turn-on of the internal bias network. Symmetrical supplies are not required, as the is quite insensitive to variations in supply voltage. Battery operation is feasible as no ground connection is required; however, an artificial ground may be used to ensure that logic swings, etc., remain within acceptable limits. TEMPERATURE PERFORMANCE The nonlinearity and monotonicity specifications of the are guaranteed to apply over the entire rated operating temperature range. Full-scale output current drift is tight, typically +0 ppm/ C, with zero-scale output current and drift essentially negligible compared to / LSB. The temperature coefficient of the reference resistor, R, should match and track that of the output resistor for minimum overall full-scale drift. Settling times of the decrease approximately 0% at 55 C; an increase of about 5% is typical at +5 C. SETTLING TIME The is capable of extremely fast settling times; typically 85 ns at I REF = ma. Judicious circuit design and careful board layout must be employed to obtain full performance potential during testing and application. The logic switch design enables propagation delays of only 35 ns for each of the 0 bits. Settling time to within / LSB of the LSB is therefore 35 ns, with each progressively larger bit taking successively longer. The MSB settles in 85 ns, thus determining the overall settling time of 30 ns. Settling to 8-bit accuracy requires about 0 ns to 78 ns. The output capacitance of the, including the package, is approximately 8 pf; therefore, the output RC time constant dominates settling time if R L > 500 Ω. Settling time and propagation delay are relatively insensitive to logic input amplitude and rise and fall times, due to the high gain of the logic switches. Settling time also remains essentially constant for I REF values down to ma, with gradual increases for lower I REF values. The principal advantage of higher I REF values lies in the ability to attain a given output level with lower load resistors, thus reducing the output RC time constant. Measurement of settling time requires the ability to accurately resolve ± µa; therefore, a kω load is needed to provide adequate drive for most oscilloscopes. The settling time fixture of schematic titled Settling Time Measurement uses a cascode design to permit driving a kω load with less than 5 pf of parasitic capacitance at the measurement node. At I REF values of less than ma, excessive RC damping of the output is difficult to prevent while maintaining adequate sensitivity. However, the major carry from 0 to provides an accurate indicator of settling time. This code change does not require the normal. time constants to settle to within ±0.% of the final value, and thus settling times may be observed at lower values of I REF. switching transients or glitches are very low and may be further reduced by small capacitive loads at the output with a minor sacrifice in settling time. Fastest operation can be obtained by using short leads, minimizing output capacitance and load resistor values, and by adequate bypassing at the supply, reference and terminals. Supplies do not require large electrolytic bypass capacitors as the supply current drain is independent of input logic states; 0. µf capacitors at the supply pins provide full transient protection. REV. D 9

11 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Cerdip (Q-8) (0.3) MIN (.9) MAX (5.08) MAX 0.00 (5.08) 0.5 (3.8) 0.03 (0.58) 0.0 (0.3) 0 9 PIN 0.90 (.38) MAX 0.00 (.5) BSC (.78) (0.7) 0.30 (7.87) 0.0 (5.59) 0.00 (.5) 0.05 (0.38) 0.50 (3.8) MIN SEATING PLANE (8.3) 0.90 (7.37) 0.05 (0.38) (0.0) C33 0 5/98 8-Lead Plastic DIP (N-8) 0.95 (3.9) 0.85 (.7) (.0) 0.5 (.93) 0.0 (0.558) 0.0 (0.35) (7.) 0.0 (.0) PIN 0.00 (.5) (0.38) (5.33) MAX (.5) BSC (.77) 0.05 (.5) (3.30) MIN SEATING PLANE 0.35 (8.5) (7.) 0.95 (.95) 0.5 (.93) 0.05 (0.38) (0.0) 8-Lead Wide Body SOL (R-8) 0.5 (.75) 0.9 (.35) (7.0) 0.9 (7.0) 0.93 (0.5) (0.00) 9 PIN 0.08 (0.30) (0.0) (.7) BSC 0.03 (.5) 0.09 (.35) 0.09 (0.9) (0.35) SEATING PLANE 0.05 (0.3) (0.3) (0.7) (0.5) x (.7) (0.0) PRINTED IN U.S.A. 0 REV. D

Low Drift, Low Power Instrumentation Amplifier AD621

Low Drift, Low Power Instrumentation Amplifier AD621 a FEATURES EASY TO USE Pin-Strappable Gains of 0 and 00 All Errors Specified for Total System Performance Higher Performance than Discrete In Amp Designs Available in -Lead DIP and SOIC Low Power,.3 ma

More information

1 pc Charge Injection, 100 pa Leakage CMOS 5 V/5 V/3 V 4-Channel Multiplexer ADG604

1 pc Charge Injection, 100 pa Leakage CMOS 5 V/5 V/3 V 4-Channel Multiplexer ADG604 a FEATURES 1 pc Charge Injection (Over the Full Signal Range) 2.7 V to 5.5 V ual Supply 2.7 V to 5.5 ingle Supply Automotive Temperature Range: 4 C to +125 C 1 pa Max @ 25 C Leakage Currents 85 Typ On

More information

SHM-14 Ultra-Fast, 14-Bit Linear Monolithic Sample-Hold Amplifiers

SHM-14 Ultra-Fast, 14-Bit Linear Monolithic Sample-Hold Amplifiers INNOVATION and EX C ELL E N C E Ultra-Fast, 1-Bit Linear Monolithic Sample-Hold Amplifiers FEATURES Fast acquisition time: 10ns to ±0.1% 0ns to ±0.0% ns to ±0.01% ±0.001% Nonlinearity 6µV rms output noise

More information

High-Supply-Voltage, Precision Voltage Reference in SOT23 MAX6035

High-Supply-Voltage, Precision Voltage Reference in SOT23 MAX6035 19-2606; Rev 3; 11/06 High-Supply-Voltage, Precision General Description The is a high-voltage, precision micropower voltage reference. This three-terminal device is available with output voltage options

More information

PRODUCT OVERVIEW REF. IN 16 BIPOLAR OFFSET 17 REGISTER 74LS75 REGISTER 74LS75 BITS LSB

PRODUCT OVERVIEW REF. IN 16 BIPOLAR OFFSET 17 REGISTER 74LS75 REGISTER 74LS75 BITS LSB FEATURES -Bit resolution Integral nonlinearity error ±/LSB, max. Differential nonlinearity error ±/LSB, max. MIL-STD- high-reliability versions available Input register μs fast output settling time Guaranteed

More information

Product Description. TMP01: Low Power, Programmable Temperature Controller (Temperature Sensor)

Product Description. TMP01: Low Power, Programmable Temperature Controller (Temperature Sensor) TMP0: Low Power, Programmable Temperature Controller (Temperature Sensor) Product Description The TMP0 is a temperature sensor which generates a voltage output proportional to absolute temperature and

More information

LC2 MOS 4-/8-Channel High Performance Analog Multiplexers ADG408/ADG409

LC2 MOS 4-/8-Channel High Performance Analog Multiplexers ADG408/ADG409 a FEATURES 44 upply Maximum Ratings to Analog Signal Range Low On Resistance ( max) Low Power (I SUPPLY < 75 A) Fast Switching Break-Before-Make Switching Action Plug-in Replacement for G408/G409 APPLICATIONS

More information

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines

More information

IH5341, IH5352. Dual SPST, Quad SPST CMOS RF/Video Switches. Description. Features. Ordering Information. Applications. Pinouts.

IH5341, IH5352. Dual SPST, Quad SPST CMOS RF/Video Switches. Description. Features. Ordering Information. Applications. Pinouts. SEMICONDUCTOR IH, IH2 December Features Description Dual SPST, Quad SPST CMOS RF/Video Switches R DS(ON) < Ω Switch Attenuation Varies Less Than db From DC to 00MHz "OFF" Isolation > 0dB Typical at 0MHz

More information

CD54/74AC153, CD54/74ACT153

CD54/74AC153, CD54/74ACT153 CD4/74AC13, CD4/74ACT13 Data sheet acquired from Harris Semiconductor SCHS237A September 1998 - Revised May 2000 Dual 4-Input Multiplexer Features Description [ /Title (CD74 AC13, CD74 ACT1 3) /Subject

More information

Low Voltage 2-1 Mux, Level Translator ADG3232

Low Voltage 2-1 Mux, Level Translator ADG3232 Low Voltage 2-1 Mux, Level Translator ADG3232 FEATURES Operates from 1.65 V to 3.6 V Supply Rails Unidirectional Signal Path, Bidirectional Level Translation Tiny 8-Lead SOT-23 Package Short Circuit Protection

More information

74HC86. Quad 2 Input Exclusive OR Gate. High Performance Silicon Gate CMOS

74HC86. Quad 2 Input Exclusive OR Gate. High Performance Silicon Gate CMOS Quad 2 Input Exclusive OR Gate MARKING DIAGRAMS High Performance Silicon Gate CMOS The is identical in pinout to the LS86. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

More information

DATASHEET AD7520, AD7521. Features. Ordering Information. Pinouts. 10-Bit, 12-Bit, Multiplying D/A Converters. FN3104 Rev.4.

DATASHEET AD7520, AD7521. Features. Ordering Information. Pinouts. 10-Bit, 12-Bit, Multiplying D/A Converters. FN3104 Rev.4. DATASHEET AD720, AD72 0Bit, 2Bit, Multiplying D/A Converters The AD720 and AD72 are monolithic, high accuracy, low cost 0bit and 2bit resolution, multiplying digitaltoanalog converters (DAC). Intersil

More information

NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset

NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset Description: The NTE74HC109 is a dual J K flip flip with set and reset in a 16 Lead plastic DIP

More information

CD54/74HC32, CD54/74HCT32

CD54/74HC32, CD54/74HCT32 Data sheet acquired from Harris Semiconductor SCHS7A September 997 - Revised May 000 CD/7HC, CD/7HCT High Speed CMOS Logic Quad -Input OR Gate [ /Title (CD HCT, CD7 HC, CD7 HCT ) /Subject High Features

More information

TOP VIEW. Maxim Integrated Products 1

TOP VIEW. Maxim Integrated Products 1 9-2266; Rev 2; 6/3 3ppm/ C, Low-Power, Low-Dropout General Description The high-precision, low-power, low-dropout voltage reference features a low 3ppm/ C (max) temperature coefficient and a low dropout

More information

DS0026 Dual High-Speed MOS Driver

DS0026 Dual High-Speed MOS Driver Dual High-Speed MOS Driver General Description DS0026 is a low cost monolithic high speed two phase MOS clock driver and interface circuit. Unique circuit design provides both very high speed operation

More information

MM74HC151 8-Channel Digital Multiplexer

MM74HC151 8-Channel Digital Multiplexer 8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation

More information

onlinecomponents.com

onlinecomponents.com a FEATURES +.8 V to +. ingle Supply 2. V ual Supply 2. ON Resistance. ON Resistance Flatness pa Leakage Currents 4 ns Switching Times Single 6-to- Multiplexer AG76 ifferential 8-to- Multiplexer AG77 28-Lead

More information

NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder

NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder Description: The NTE4514B (output active high option) and NTE4515B (output active low option) are two output options of a 4

More information

MM74C906 Hex Open Drain N-Channel Buffers

MM74C906 Hex Open Drain N-Channel Buffers Hex Open Drain N-Channel Buffers General Description The MM74C906 buffer employs monolithic CMOS technology in achieving open drain outputs. The MM74C906 consists of six inverters driving six N-channel

More information

CMOS, +1.8 V to +5.5 V/ 2.5 V, 2.5 Low-Voltage, 8-/16-Channel Multiplexers ADG706/ADG707 REV. A

CMOS, +1.8 V to +5.5 V/ 2.5 V, 2.5 Low-Voltage, 8-/16-Channel Multiplexers ADG706/ADG707 REV. A a FEATURES +.8 V to +. ingle Supply. V ual Supply. ON Resistance. ON Resistance Flatness pa Leakage Currents ns Switching Times Single -to- Multiplexer AG ifferential 8-to- Multiplexer AG 8-Lead TSSOP

More information

P4C164 ULTRA HIGH SPEED 8K X 8 STATIC CMOS RAMS FEATURES DESCRIPTION. Full CMOS, 6T Cell. Common Data I/O

P4C164 ULTRA HIGH SPEED 8K X 8 STATIC CMOS RAMS FEATURES DESCRIPTION. Full CMOS, 6T Cell. Common Data I/O FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) 8/10/12/15/20/25/35/70/100 ns (Commercial) 10/12/15/20/25/35/70/100 ns(industrial) 12/15/20/25/35/45/70/100 ns (Military) Low Power

More information

MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter

MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power

More information

CD54HC11, CD74HC11, CD54HCT11, CD74HCT11

CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 CDHC, CD7HC, CDHCT, CD7HCT Data sheet acquired from Harris Semiconductor SCHS7E August 997 - Revised September 00 High-Speed CMOS Logic Triple -Input AND Gate [ /Title (CD HCT, CD7 HC, CD7 HCT ) /Subject

More information

NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output

NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output Description: The NTE74HC299 is an 8 bit shift/storage register with three state bus interface capability

More information

NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register

NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register Description: The NTE74HC165 is an 8 bit parallel in/serial out shift register in a 16 Lead DIP type package

More information

SC70, 1.6V, Nanopower, Beyond-the-Rails Comparators With/Without Reference

SC70, 1.6V, Nanopower, Beyond-the-Rails Comparators With/Without Reference 19-1862; Rev 4; 1/7 SC7, 1.6V, Nanopower, Beyond-the-Rails General Description The nanopower comparators in space-saving SC7 packages feature Beyond-the- Rails inputs and are guaranteed to operate down

More information

1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS

1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS 1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74AC138 is identical in pinout to the LS/ALS138, HC/HCT138. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

More information

MM74C90 MM74C93 4-Bit Decade Counter 4-Bit Binary Counter

MM74C90 MM74C93 4-Bit Decade Counter 4-Bit Binary Counter 4-Bit Decade Counter 4-Bit Binary Counter General Description The MM74C90 decade counter and the MM74C93 binary counter and complementary MOS (CMOS) integrated circuits constructed with N- and P-channel

More information

MM74C14 Hex Schmitt Trigger

MM74C14 Hex Schmitt Trigger MM74C14 Hex Schmitt Trigger General Description The MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The

More information

2 Input NAND Gate L74VHC1G00

2 Input NAND Gate L74VHC1G00 Input NAND Gate The is an advanced high speed CMOS input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining

More information

INTEGRATED CIRCUITS. 74ALS11A Triple 3-Input AND gate. Product specification 1991 Feb 08 IC05 Data Handbook

INTEGRATED CIRCUITS. 74ALS11A Triple 3-Input AND gate. Product specification 1991 Feb 08 IC05 Data Handbook INTEGRATED CIRCUITS Triple 3-Input AND gate 1991 Feb 08 IC05 Data Handbook TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 5.5ns 1.3mA PIN CONFIGURATION 1A 1 1B 2 14 13 V CC 1C ORDERING INFORMATION

More information

MM74HC175 Quad D-Type Flip-Flop With Clear

MM74HC175 Quad D-Type Flip-Flop With Clear Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity

More information

PT5108. High-PSRR 500mA LDO GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATIONS. Ripple Rejection vs Frequency. Ripple Rejection (db)

PT5108. High-PSRR 500mA LDO GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATIONS. Ripple Rejection vs Frequency. Ripple Rejection (db) GENERAL DESCRIPTION The PT5108 is a low-dropout voltage regulator designed for portable applications that require both low noise performance and board space. Its PSRR at 1kHz is better than 70dB. The PT5108

More information

NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs

NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs Description: The NTE74HC173 is an high speed 3 State Quad D Type Flip Flop in a 16 Lead DIP type package that

More information

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS TECHNICAL DATA IN74ACT74 Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT74 is identical in pinout to the LS/ALS74, HC/HCT74. The IN74ACT74 may be used as a level converter

More information

MM74C14 Hex Schmitt Trigger

MM74C14 Hex Schmitt Trigger MM74C14 Hex Schmitt Trigger General Description The MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The

More information

N.C. OUT. Maxim Integrated Products 1

N.C. OUT. Maxim Integrated Products 1 19-2892; Rev 2; 11/6 Ultra-Low-Power Precision Series General Description The MAX629 micropower, low-dropout bandgap voltage reference combines ultra-low supply current and low drift in a miniature 5-pin

More information

MM74HC157 Quad 2-Input Multiplexer

MM74HC157 Quad 2-Input Multiplexer Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and

More information

GENERAL DESCRIPTION The PT5128 is a dual channel low-dropout voltage regulator designed for portable and wireless applications that require high PSRR, low quiescent current and excellent line and load

More information

Schmitt-Trigger Inverter/ CMOS Logic Level Shifter

Schmitt-Trigger Inverter/ CMOS Logic Level Shifter Schmitt-Trigger Inverter/ CMOS Logic Level Shifter with LSTTL Compatible Inputs The is a single gate CMOS Schmitt trigger inverter fabricated with silicon gate CMOS technology. It achieves high speed operation

More information

INTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook.

INTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook. INTEGRATED CIRCUITS Supersedes data of 1997 May 15 IC24 Data Handbook 1998 Jun 23 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for low voltage applications: 1.0V to 3.6V Accepts TTL input levels

More information

9A HIGH-SPEED MOSFET DRIVERS

9A HIGH-SPEED MOSFET DRIVERS 9A HIGH-SPEED MOSFET DRIVERS 9A HIGH-SPEED MOSFET DRIVERS FEATURES Tough CMOS Construction High Peak Output Current.................. 9A High Continuous Output Current........ 2A Max Fast Rise and Fall

More information

MM74HC374 3-STATE Octal D-Type Flip-Flop

MM74HC374 3-STATE Octal D-Type Flip-Flop 3-STATE Octal D-Type Flip-Flop General Description The MM74HC374 high speed Octal D-Type Flip-Flops utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption

More information

1ppm/ C, Low-Noise, +2.5V/+4.096V/+5V Voltage References

1ppm/ C, Low-Noise, +2.5V/+4.096V/+5V Voltage References 19-123; Rev 1; 1/1 1ppm/ C, Low-Noise, +2.5V/+4.96V/+5V General Description The // are low-noise, precision voltage references with extremely low,.5ppm/ C typical temperature coefficients and excellent,

More information

LM34 - Precision Fahrenheit Temperature Sensor

LM34 - Precision Fahrenheit Temperature Sensor - Precision Fahrenheit Temperature Sensor Features Typical Application Calibrated directly in degrees Fahrenheit Linear +10.0 mv/ F scale factor 1.0 F accuracy guaranteed (at +77 F) Parametric Table Supply

More information

MM74HC373 3-STATE Octal D-Type Latch

MM74HC373 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption

More information

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset General Description The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits

More information

4-Pin µp Voltage Monitors with Pin-Selectable Power-On Reset Timeout Delay

4-Pin µp Voltage Monitors with Pin-Selectable Power-On Reset Timeout Delay 19-1122; Rev 3; 12/05 4-Pin µp oltage Monitors with Pin-Selectable General Description The microprocessor (µp) supervisory circuits monitor power supplies in µp and digital systems. They provide excellent

More information

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DS0026 Dual High-Speed MOS Driver General Description DS0026 is a low cost

More information

Miniature Electronically Trimmable Capacitor V DD. Maxim Integrated Products 1

Miniature Electronically Trimmable Capacitor V DD. Maxim Integrated Products 1 19-1948; Rev 1; 3/01 Miniature Electronically Trimmable Capacitor General Description The is a fine-line (geometry) electronically trimmable capacitor (FLECAP) programmable through a simple digital interface.

More information

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop 3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity

More information

Low Power Quint Exclusive OR/NOR Gate

Low Power Quint Exclusive OR/NOR Gate 100307 Low Power Quint Exclusive OR/NOR Gate General Description The 100307 is monolithic quint exclusive-or/nor gate. The Function output is the wire-or of all five exclusive-or outputs. All inputs have

More information

RP mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator. General Description. Features. Applications. Ordering Information. Marking Information

RP mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator. General Description. Features. Applications. Ordering Information. Marking Information RP122 3mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator General Description The RP122 is designed for portable RF and wireless applications with demanding performance and space requirements. The RP122

More information

PRODUCTION DATA SHEET

PRODUCTION DATA SHEET The positive voltage linear regulator is configured with a fixed 3.3V output, featuring low dropout, tight line, load and thermal regulation. VOUT is controlled and predictable as UVLO and output slew

More information

MC10ELT22, MC100ELT V Dual TTL to Differential PECL Translator

MC10ELT22, MC100ELT V Dual TTL to Differential PECL Translator 5.0 V Dual TTL to Differential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small

More information

MM74HC573 3-STATE Octal D-Type Latch

MM74HC573 3-STATE Octal D-Type Latch MM74HC573 3-STATE Octal D-Type Latch General Description The MM74HC573 high speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low

More information

KH600. 1GHz, Differential Input/Output Amplifier. Features. Description. Applications. Typical Application

KH600. 1GHz, Differential Input/Output Amplifier. Features. Description. Applications. Typical Application KH 1GHz, Differential Input/Output Amplifier www.cadeka.com Features DC - 1GHz bandwidth Fixed 1dB (V/V) gain 1Ω (differential) inputs and outputs -7/-dBc nd/3rd HD at MHz ma output current 9V pp into

More information

MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter

MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power

More information

74VHC123A Dual Retriggerable Monostable Multivibrator

74VHC123A Dual Retriggerable Monostable Multivibrator Dual Retriggerable Monostable Multivibrator General Description The VHC123A is an advanced high speed CMOS Monostable Multivibrator fabricated with silicon gate CMOS technology. It achieves the high speed

More information

Four-Channel Thermistor Temperature-to-Pulse- Width Converter

Four-Channel Thermistor Temperature-to-Pulse- Width Converter 19-234; Rev ; 1/2 General Description The four-channel thermistor temperature-topulse-width converter measures the temperatures of up to four thermistors and converts them to a series of output pulses

More information

CD40106BC Hex Schmitt Trigger

CD40106BC Hex Schmitt Trigger CD40106BC Hex Schmitt Trigger General Description The CD40106BC Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N and P-channel enhancement transistors.

More information

1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS

1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS 1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74ACT138 is identical in pinout to the LS/ALS138, HC/HCT138. The IN74ACT138 may be used as a level converter for interfacing TTL or NMOS

More information

74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state

74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state Rev. 7 4 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device

More information

BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA

BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA TECHNICAL DATA BCD-TO-DECIMAL DECODER HIGH-OLTAGE SILICON-GATE CMOS IW4028B The IW4028B types are BCD-to-decimal or binary-tooctal decoders consisting of buffering on all 4 inputs, decoding-logic gates,

More information

Ultra-Low-Power Series Voltage Reference

Ultra-Low-Power Series Voltage Reference 19-257; Rev 2; 3/5 Ultra-Low-Power Series Voltage Reference General Description The micropower, low-dropout bandgap voltage reference combines ultra-low supply current and low drift in a miniature 5-pin

More information

Features MIC4468 V S GND. Micrel, Inc Fortune Drive San Jose, CA USA tel + 1 (408) fax + 1 (408)

Features MIC4468 V S GND. Micrel, Inc Fortune Drive San Jose, CA USA tel + 1 (408) fax + 1 (408) MIC// Quad.-Peak Low-Side MOSFET Driver Bipolar/CMOS/DMOS General Description The MIC// family of -output CMOS buffer/drivers is an expansion from the earlier single- and dual-output drivers, to which

More information

MM74HC251 8-Channel 3-STATE Multiplexer

MM74HC251 8-Channel 3-STATE Multiplexer 8-Channel 3-STATE Multiplexer General Description The MM74HC251 8-channel digital multiplexer with 3- STATE outputs utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and

More information

74VHC221A Dual Non-Retriggerable Monostable Multivibrator

74VHC221A Dual Non-Retriggerable Monostable Multivibrator April 1994 Revised May 1999 74VHC221A Dual Non-Retriggerable Monostable Multivibrator General Description The VHC221A is an advanced high speed CMOS Monostable Multivibrator fabricated with silicon gate

More information

Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog Multiplexers

Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog Multiplexers / Precision, 6-Channel/Dual 8-Channel, General Description The / low-voltage, CMOS analog multiplexers (muxes) offer low on-resistance (Ω max), which is matched to within 6Ω between switches and remains

More information

REF0 TABLE OF CONTENTS Features... General Description... Pin Configurations... Revision History... Specifications... Electrical Specifications... Abs

REF0 TABLE OF CONTENTS Features... General Description... Pin Configurations... Revision History... Specifications... Electrical Specifications... Abs FEATURES V output: ±0.% maximum Temperature voltage output:.9 mv/ C Adjustment range: ±% minimum Excellent temperature stability: 8. ppm/ C maximum Low noise: µv p-p maximum Low supply current:. ma maximum

More information

CD4021BC 8-Stage Static Shift Register

CD4021BC 8-Stage Static Shift Register 8-Stage Static Shift Register General Description The CD4021BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individual JAM inputs to each of 8 stages.

More information

FPF1003A / FPF1004 IntelliMAX Advanced Load Management Products

FPF1003A / FPF1004 IntelliMAX Advanced Load Management Products August 2012 FPF1003A / FPF1004 IntelliMAX Advanced Load Management Products Features 1.2 V to 5.5 V Input Voltage Operating Range Typical R DS(ON) : - 30 mω at V IN =5.5 V - 35 mω at V IN =3.3 V ESD Protected:

More information

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, MONOSTABLE MULTIVIBRATORS, MONOLITHIC SILICON

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, MONOSTABLE MULTIVIBRATORS, MONOLITHIC SILICON INCH-POUND MIL-M-38510/12J 22 February 2005 SUPERSEDING MIL-M-38510/12H 16 December 2003 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, MONOSTABLE MULTIVIBRATORS, MONOLITHIC SILICON This

More information

CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate

CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate General Description The CD4071BC and CD4081BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed

More information

Ultra-Low-Power Precision Series Voltage Reference MAX6029. Features. General Description. Ordering Information. Applications.

Ultra-Low-Power Precision Series Voltage Reference MAX6029. Features. General Description. Ordering Information. Applications. MAX629 General Description The MAX629 micropower, low-dropout bandgap voltage reference combines ultra-low supply current and low drift in a miniature 5-pin SOT23 surface-mount package that uses 7% less

More information

MM74C908 Dual CMOS 30-Volt Relay Driver

MM74C908 Dual CMOS 30-Volt Relay Driver Dual CMOS 30-Volt Relay Driver General Description The MM74C908 is a general purpose dual high voltage driver capable of sourcing a minimum of 250 ma at V OUT = V CC 3V, and T J = 65 C. The MM74C908 consists

More information

CD4028BC BCD-to-Decimal Decoder

CD4028BC BCD-to-Decimal Decoder BCD-to-Decimal Decoder General Description The is a BCD-to-decimal or binary-to-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the 4 inputs, A,

More information

PARALLEL DIGITAL-ANALOG CONVERTERS

PARALLEL DIGITAL-ANALOG CONVERTERS CMOS Analog IC Design Page 10.2-1 10.2 - PARALLEL DIGITAL-ANALOG CONVERTERS CLASSIFICATION OF DIGITAL-ANALOG CONVERTERS CMOS Analog IC Design Page 10.2-2 CURRENT SCALING DIGITAL-ANALOG CONVERTERS GENERAL

More information

MM74HC175 Quad D-Type Flip-Flop With Clear

MM74HC175 Quad D-Type Flip-Flop With Clear Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity

More information

MAX6043 Precision High-Voltage Reference in SOT23

MAX6043 Precision High-Voltage Reference in SOT23 MAX643 General Description The MAX643 precision voltage reference provides accurate preset +, +3.3V, +4.96V, +5.V, and +1V reference voltages from up to +4V input voltages. The MAX643 features a proprietary

More information

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting 3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible

More information

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. September 2001 S7C256 5V/3.3V 32K X 8 CMOS SRM (Common I/O) Features S7C256

More information

PI4GTL bit bidirectional low voltage translator

PI4GTL bit bidirectional low voltage translator Features 2-bit bidirectional translator Less than 1.5 ns maximum propagation delay to accommodate Standard mode and Fast mode I2Cbus devices and multiple masters Allows voltage level translation between

More information

CD54HC257, CD74HC257, CD54HCT257, CD74HCT257

CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 Data sheet acquired from Harris Semiconductor SCHS171D November 1997 - Revised October 2003 High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State

More information

MM74C85 4-Bit Magnitude Comparator

MM74C85 4-Bit Magnitude Comparator 4-Bit Magnitude Comparator General Description The MM74C85 is a four-bit magnitude comparator which will perform comparison of straight binary or BCD codes. The circuit consists of eight comparing inputs

More information

SY10/100EL11V. General Description. Precision Edge. Features. Pin Names. 5V/3.3V 1:2 Differential Fanout Buffer. Revision 10.0

SY10/100EL11V. General Description. Precision Edge. Features. Pin Names. 5V/3.3V 1:2 Differential Fanout Buffer. Revision 10.0 SY10/100EL11 5/3.3 1:2 Differential Fanout Buffer Revision 10.0 General Description The SY10/100EL11 are 1:2 differential fanout gates. These devices are functionally similar to the E111A/L devices, with

More information

LM34 Precision Fahrenheit Temperature Sensors

LM34 Precision Fahrenheit Temperature Sensors 1 Precision Fahrenheit Temperature Sensors 1 Features 3 Description 1 Calibrated Directly in Degrees Fahrenheit The series devices are precision integratedcircuit temperature sensors, whose output voltage

More information

Low-Leakage, CMOS Analog Multiplexers

Low-Leakage, CMOS Analog Multiplexers / General Description The / are monolithic, CMOS analog multiplexers (muxes). The 8-channel is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual,

More information

CD54/74HC393, CD54/74HCT393

CD54/74HC393, CD54/74HCT393 CD54/74HC393, CD54/74HCT393 Data sheet acquired from Harris Semiconductor SCHS186A September 1997 - Revised May 2000 High Speed CMOS Logic Dual 4-Stage Binary Counter /Title CD74 C393 D74 CT39 ) Subect

More information

MM82C19 16-Line to 1-Line Multiplexer

MM82C19 16-Line to 1-Line Multiplexer 16-Line to 1-Line Multiplexer General Description The multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1-of-16 inputs which is routed to the output. The data is inverted

More information

CD4013BC Dual D-Type Flip-Flop

CD4013BC Dual D-Type Flip-Flop Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each

More information

SGM nA, Non-Unity Gain, Dual Rail-to-Rail Input/Output Operational Amplifier

SGM nA, Non-Unity Gain, Dual Rail-to-Rail Input/Output Operational Amplifier PRODUCT DESCRIPTION The SGM8046 operates with a single supply voltage as low as 1.4V, while drawing less than 670nA (TYP) of quiescent current per amplifier. This device is also designed to support rail-to-rail

More information

CD74HC109, CD74HCT109

CD74HC109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140 March 1998 CD74HC109, CD74HCT109 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger [ /Title (CD74H C109, CD74H CT109) /Subject Dual J- Fliplop

More information

MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer

MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer September 1983 Revised February 1999 MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description The MM74HC540 and MM74HC541 3-STATE buffers utilize advanced silicon-gate

More information

74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS

74HC74. Dual D Flip Flop with Set and Reset. High Performance Silicon Gate CMOS Dual D Flip Flop with Set and Reset High Performance Silicon Gate CMOS The 4HC4 is identical in pinout to the LS4. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they

More information

I2 C Compatible Digital Potentiometers AD5241/AD5242

I2 C Compatible Digital Potentiometers AD5241/AD5242 a Preliminary Technical ata FEATURES Position Potentiometer Replacement 0K, 00K, M, Ohm Internal Power ON Mid-Scale Preset +. to +.V Single-Supply; ±.V ual-supply Operation I C Compatible Interface APPLICATIONS

More information

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop Hex D-Type Flip-Flop Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered D- type flip-flops; the true outputs from each flip-flop are externally available. The

More information

MM74HC164 8-Bit Serial-in/Parallel-out Shift Register

MM74HC164 8-Bit Serial-in/Parallel-out Shift Register 8-Bit Serial-in/Parallel-out Shift Register General Description Ordering Code: September 1983 Revised February 1999 The MM74HC164 utilizes advanced silicon-gate CMOS technology. It has the high noise immunity

More information