N-Channel Enhancement-Mode Vertical DMOS FET

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1 N-Channel Enhancement-Mode Vertical DMOS FET Features Free from secondary breakdown Low power drive requirement Ease of paralleling Low C ISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain Complementary N- and P-channel devices Applications Motor controls Converters Amplifi ers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) General Description This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coeffi cient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Device Package Option TO-9 /BV DGS (V) R DS(ON) (max) (Ω) VN14 VN14N3-G G indicates package is RoHS compliant ( Green ) Pin Configuration I D(ON) (min) Absolute Maximum Ratings Parameter Drain-to-source voltage Drain-to-gate voltage Value BV DGS Gate-to-source voltage ±V Operating and storage temperature -55 O C to +15 O C Soldering temperature* 3 O C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6mm from case for 1 seconds. Product Marking VN 14 YYWW DRAIN SOURCE GATE TO-9 (N3) YY = Year Sealed WW = Week Sealed = Green Packaging TO-9 (N3)

2 Thermal Characteristics Package I D (continuous) (ma) Notes: ( ) I D (continuous) is limited by max rated T j. I D (pulsed) Power C = 5 O C (W) Electrical Characteristics (T A = 5 O C unless otherwise specifi ed) θ jc ( O C/W) θ ja ( O C/W) TO-9 (N3) Sym Parameter Min Typ Max Units Conditions Drain-to-source breakdown voltage V = V, I D = ma (th) Gate threshold voltage V = V DS, I D = ma Δ(th) Change in (th) with temperature mv/ O C = V DS, I D = ma I GSS Gate body leakage na = ± V, V DS = V I DSS I D(ON) Zero gate voltage drain current On-state drain current µa I DR (ma) I DRM = V, V DS = Max Rating V DS =.8 Max Rating, = V, T A = 15C.5 - V A GS = 5.V, V DS = 5V..5 - = 1V, V DS = 5V R DS(ON) Static drain-to-source on-state resistance V Ω GS = 5.V, I D = 5mA = 1V, I D = A ΔR DS(ON) Change in R DS(ON) with temperature -.7 %/ O C = 1V, I D = A G FS Forward transductance mmho V DS = 5V, I D = 5mA C ISS Input capacitance = V, C OSS Common source output capacitance - 5 pf V DS = 5V, C RSS Reverse transfer capacitance f = MHz t d(on) Turn-on delay time t V DD = 5V, r Rise time ns I D = A, t d(off) Turn-off delay time R GEN = 5Ω t f Fall time V SD Diode forward voltage drop V = V, I SD = A t rr Reverse recovery time ns = V, I SD = A Notes: 1. All D.C. parameters 1% tested at 5 O C unless otherwise stated. (Pulse test: 3µs pulse, % duty cycle.). All A.C. parameters sample tested. Switching Waveforms and Test Circuit V DD INPUT 1V V 1% 9% PULSE GENERATOR R L OUTPUT t (ON) t (OFF) R GEN t d(on) t r t d(off) t F OUTPUT V DD 1% 1% INPUT D.U.T. V 9% 9%

3 Typical Performance Curves 3

4 Typical Performance Curves (cont.) 1.1 Variation with Temperature On-Resistance vs. Drain Current = 5V B V D S S (normalized ) R D S(ON ) (ohms ) 3.. = 1V T j (C) I D (amperes) Transfer Characteristics V (th) and R DS Variation with Temperature.5 V DS = 5V I D (amperes ). 1.5 T A = -55C 5C 15C V G S(th ) (normalized ) V 1mA R 1V, A R 5V,.5A R DS(ON) (normalized ) (volts) T j (C) Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics f = 1MHz 8 V DS = 1V 4V C (picofarads) 5 C ISS V G S (volts ) pf 5 C OSS C RSS V DS (volts) 4 pf Q G (nanocoulombs) 4

5 3-Lead TO-9 Package Outline (N3) D A Seating Plane 1 3 L b e1 e Front View C Side View E1 1 3 E Bottom View Symbol A b C D E E1 e e1 L MIN Dimension NOM (inches) MAX Drawings not to scale. (The package drawing(s) in this data sheet may not refl ect the most current specifi cations. For the latest package outline information go to Doc.# DSFP-VN14 A197 5

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