1015P2 CLOCK GEN 1.0G 2010_0104 THERMAL CONTROL CPU SODIMM 200P. AZALIA CODEC Realtek ALC269 SOUTH BRIDGE EC ENE KBC3310 MINICARD LAN.

Transcription

1 0_lock iagram 0_Power Sequence 0_lock en_isprs 0.PineView-M_ (VS_MI_PU) 0.PineView-M_ (R_XP_RT) 0.PineView-M_ (PWR&) 0.XP 0.Tigerpoint_MI_US 0.Tigerpoint_SYS 0.Tigerpoint_PWR.R SOIMM.R-Termination.Onboard V. onn_i.wifi&smrtsw.n_r.wn.usin&_on.luetooth 0._ON...US Port.E_ENE K0.K_TP.Fan_debug.SPI_ROM.U_ON.PWR Jack 0_ischarge..Srew ole&emi.power Flow.Power_harger.Vcore.Power _+.V&VTTR&+.VS.Power_VP.Power_+0.VS.Power_+.VS 0.Power atch.power System.power swich S/MM ard Reader oard SPI ROM ST ebug onn Internal K ard Reader au amera ST onn PineView-M F SOUT RIE ISPRSFT 00_00 TERM ONTRO 0P VS TT E ENE K0 RT US Port x Touch Pad.0 PU TIERPOINT OK EN SOIMM 00P ZI OE Realtek MINIR N MINIPIE ONN UETOOT theros R <ore esign> INE OUT Speaker EXT MI INT MI WN RJ- R/ WiMax SUSTek omputer IN. lock iagram Nicky_heng ustom 0P. ate: Saturday, February 0, 00 Sheet of

2 For dapter Mode: () -> () -> () -> () -> () ->... For attery Mode: () -> () - > () -> () -> (a) -> (b) -> () ->... /_OK_IN _T_SYS dapter a b T_IN attery +V VSUS_ON 0 VSUS_PWR PS-ON PWR_SW# Signal VSUS_ON SUS_ON SUS_ON E_RSMRST# PM_RSMRST# 0 +V_RT + TT +VSUS +VSUS S0/S T PM_PWRTN# S +.VSUS (internal) +VS +VS +.VS +VP ENE K0 SUS# Tiger Point S/S dapter attery SUS# M ms 0ms Power VS Main U VRMPWR PWROK ms SUS_ON SUS_ON PU_VRON VRM_PWR E_PWROK PI_RST# _PI_E b _OK _OK PI_RST# _M_S _PIE_S _ST_S _PI_S VRM_PWR PM_PWROK PT_RST# _M_US _PWR PS-ON 0 _T_SYS atch 0 VSUS_ON VSUS_PWR 0 E_RSMRST# VSUS_PWR E_PWROK PM_PWROK PT_RST# RT0 EN EN +VS +.VS +0.VS +.VS +.V +VP +.VS _PWR N N (internal) PWROK +VSUS REF K M S US K M S, R REER PI K M S E EU +V +VSUS +VSUS PUPWROO K_EN# VSUS_PWR PM_PWROK PINEVIEW PURST# PM_RSMRST# VTT_PWR/P#.ms K Stable ISPRS +V +VSUS SUS_ON +VSUS SUS_ON _T_SYS +VS PU_VRON _T_SYS +VS VP_PWR VI[:0] _FS_PU _FS_N _PIE_N _M_N VS MK_R FS K M PU ITP PIE K 00M PU, S WIFI, N /WIMX VS K 00M PU V EN EN UP P00 P00 UP UP V SOIMM +V +VS +V_US +VS +VP VP_PWR +0.VS 0 +0.VS_PWR +VORE RSTTN +.V VNT +VTTR +VS UP +VSUS UFFER _T_SYS SUS_ON +.V +VS SUS_ON +.V +VS +VS +.V VP_PWR S_PIRST# PT_RST# RT.ms SYS_RESET# RESET MP V EN EN P V EN UP0 V EN UP V SPTRST# P _T_SYS TPT SYS_RESET# K en +.V +.VS +.VS_PWR +.VS +.VS +VS +0.VS_PWR K_EN# VRM_PWR E WN R XP PINEVIEW RSTIN# ST K 00M S UM K M PU <ore esign> Power Sequence SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

3 _XIN PF/0V R MOhm X.Mhz _XOUT PF/0V _PI_EU _P_E _PI_S _M_R_REER _M_US _M_N _M_N# VS VS# _PIE_N _PIE_N# _PIE_WIMX _PIE_WIMX# _PIE_WN _PIE_WN# _ST_S _ST_S# +VSUS R +VS R R /00Mhz N/ /00Mhz +V_K 0UF/.V c00 0.UF/V for RF, close to pin _FS _FS PIE PIE# :isable 0:Enable PEREQ:PIEx0 & PIEx PEREQ:PIEx & PIEx & ST PEREQ:PIEx & PIEx & PIEx +V_K PEREQ# _REQ#_WN Ohm/EU FS R Ohm R Ohm _PI_S_R Ohm _M_R K_EN Ohm 0.UF/V 0.UF/V 0.UF/V FS Function FIXE P (synchronous) PI/PIEX P(synchronize) 0 /00Mhz N/ 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V U V Mz/FREERUN PI&PIEX_STOP# PEREQ# PU_STOP# PEREQ# REF0/FS FS/PIK0 O_PEREQ# VPI X 0 ITP_EN/PIK_F0 X SE_#/_Mz VREF 0 Vtt_Pwrd/P# ST V SK FS/US_Mz PUT_R0 OTT_MzR PU_R0 OT_MzR VPU FS PUT_R PIeT_R0 PU_R 0 PIe_R0 RESET# PIeT_R 0 PIe_R V VPIEX PUITPT_R/PIeT_R PIeT_R PUITP_R/PIe_R PIe_R VPIEX PIeT_R PIeT_R PIe_R PIe_R STKT_R PIeT_R STK_R PIe_R 0 VPIEX ISPRSFT +V_K_V +V_K _N_M_R _FS Ohm R _O_REQ R _XIN /N_REQ _XOUT S_SMT S_SMK _RESET# +V_K_V Ohm R P R0 P /N_K 0.UF/V R R0 _N_M _N_M STP_PI# STP_PU# _M_S _REQ#_N S_SMT S_SMK _FS_PU _FS_PU# _FS_N _FS_N# SYS_RESET#, _ITP_K _ITP_K# _PIE_N _PIE_N# _PIE_S _PIE_S# _ST_S _ST_S# VS# VS STP_PI# STP_PU# _PI_S_R FS S_SMT S_SMK _O_REQ _FS _FS _M_R For RF,EMI _FS _FS _FS _M_R PIE PIE# _N_M_R _PIE_N _PIE_N# _PI_EU _P_E _M_S R 0 E E0 E E E 0 E E E E0 E R 0KOhm.KOhm.KOM RN.KOM RN.KOM RN.KOM RN 0PF/0V 0PF/0V 0PF/0V 0PF/0V 0PF/0V 0PF/0V 0PF/0V /EMI 0PF/0V /EMI 0PF/0V 0PF/0V 0PF/0V /EMI 0PF/0V /EMI 0PF/0V /EMI 0PF/0V 0PF/0V PF/0V N/ 0PF/0V /RF 0PF/0V /EMI 0PF/0V /EMI 0PF/0V /EMI 0PF/0V /EMI 0PF/0V /EMI +V_K +V_K +V_K FS FS FS PU(MZ) R.KOhm % N/ +VS R K_EN _O_REQ Q Q R UMKN O KOM UMKN O /O /O R.KOhm % /O K_EN# 0KOhm S Q N00 R 00KOhm 0.UF/V.KOM RN _REQ#_WN.KOM RN PEREQ#.KOM RN _PI_S_R.KOM RN +V_K R K_EN FS R.KOhm +V_K O_O O_O * Voltage.-.V 0.-.V 0-0.V Status Super Normal Power saving,, VP_PWR +V_K R 0KOhm Q UMKN lock enable. VP_OK_R# Q UMKN <ore esign> FOR R.kOhm SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of ISPRS

4 +VS I to control backlight, Type I/O. PVRN.KOM PVRN.KOM PVRN.KOM PVRN.KOM T_K T_T K T 00KOhm PVR_V_EN 00KOhm PVR_N_EN _PMN_0 _PMN PMN PMN KN _KP _TN0 _TP0 _TN _TP _TN _TP.KOhm PVR _I PVT PVR PVR _VREF _VREF _N_EN _N_TR K T _V_EN T_K T_T U U R R N N R R R J N N K K K PVRN _PMN_0# 0OM P PVRN P_PMN_# 0OM E PVRN _PMN_# 0OM P PVRN P_PMN_# 0OM F NU _KN _KP _TN_0 _TP_0 _TN TP TN TP_ I V VREF VREF KT_EN KT_T T_K T_T _K _T V_EN PM 0# PM # PM # PM # SMI# 0M# FERR# INT0 INT INNE# STPK# PRSTP# PSP# INIT# PRY# PREQ# TERMTRIP# PROOT# PUPWROO TREF VSS RSV RSV0 KN KP E F0 F E F 0 E F E W E 0 J0 STPK PROOT# PU_TREF Reserved for debug _SMI# _0M# _FERR# _INITR _NMI _INNE# PM_PRSTP# PM_PSP# _INIT# _PMN_RY# _PMN_REQ# _TEMTRIP# _FS_PU# _FS_PU PVR0 PVR PV 0PF/0V c00 PV 0PF/0V PU_TREF +VP PV UF/0V _STPK Ohm PVR _PROOT# _PWR, The rising time of PUPWROO should be small than 0ns and rising edge should be monotonicity +VP PVR KOhm % PVR KOhm % +VP _PMN_0 _PMN PMN PMN_ PVRN _PMN_0 0OM P PVRN _PMN_ 0OM P PVRN _PMN_ 0OM P PVRN P_PMN_ 0OM PVR Ohm _TI _TO _TK _TMS _TRST# _TERM_PU+ _TERM_PU- PVT PVT NU_P E0 0 PM 0#/RSV PM #/RSV PM #/RSV PM #/RSV RSV TI TO TK TMS TRST# TRM_ TRM_ MIRO-F- N/ SE_0 SE_ SE_ VI_0 VI_ VI_ VI_ VI_ VI_ VI_ RSV RSV RSV RSV RSV_TP RSV_TP TRM_/RSV EXTREF TRM_/RSV K K 0 0 F E 0 K K _SE0 _SE _SE _VI0 _VI _VI _VI _VI _VI _VI PU_EXTREF PVT PVT0 PVT 0.UF/.V _VI[0..] PV UF/.V PVR +VP % OM PVR.KOhm % +VP P PVRN Ohm P PVRN Ohm P PVRN Ohm P PVRN Ohm PVRN Ohm PVRN Ohm PVRN Ohm PVRN Ohm PPVR r00 Ohm _PMN_0 _PMN PMN PMN PMN_REQ# _TI _TMS _PMN_RY# NU Reference voltage.near PVN side. MI_TXP0 F MI_RXP_0 MI_TXP_0 MI_RXP0 MI_TXN0 F MI_RXN_0 MI_TXN_0 MI_RXN0 MI_TXP MI_RXP_ MI_TXP_ MI_RXP MI_TXN MI_RXN_ MI_TXN_ J MI_RXN _PIE_N# _PIE_N PVT PVT PVT N N R0 R N0 N K J M EXP_KINN EXP_KINP EXP_TKINN EXP_TKINP SV RSV RSV RSV RSV RSV0 MIRO-F- N/ EXP_ROMPO EXP_IOMPI EXP_RIS RSV_TP RSV_TP RSV RSV RSV RSV 0 N P K M N IROMP RIS PVR 0OM % PVR.Ohm % S_SMK S_SMT 0PF/0V 0PF/0V c00 _TERM_PU+ _ERT# T U 000PF/0V SMK SMT ERT# PF V XP XN TERM# +V_TRM _TERM_PU- _TERM_PU+ _TERM_PU- _TERM# /00Mhz 0.UF/.V c00 T +VS +VP <ore esign> Place Near PU PVRN _TO Ohm PVRN Ohm PVRN _TK Ohm PVRN _TRST# Ohm PineView_ SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

5 +.V, _M[:0] +.V, _WE#, _S#, _RS#, _0, _, _, _S_#0, _S_#, _KE_0, _KE_, _OT_0, _OT M_K0 _M_K#0 _M_K _M_K# TPR r00_h 0KOhm PVR r00 c00 0.UF/.V c00 PVR 0.Ohm 0.Ohm PVR PVR KOhm % +.V PVR KOhm % PV 0.UF/V Near M Pin NU _M0 _M R M_0 J _M R M_ K _M R M_ K _M R M_ J _M R M M R M_ K _M R M_ J _M R M M R M_ K _M0 R M_ K0 _M R M_0 _M R M_ J _M R M_ J _M R M_ J0 R M RSV_R RVREF RRP RRPU K J K J0 0 K K J J 0 K0 J K K F F K K J K PV 0.UF/V R WE# R S# R RS# R S_0 R S_ R S_ R S#_0 R S#_ R S#_ R S#_ R KE_0 R KE_ R KE_ R KE_ R OT_0 R OT_ R OT_ R OT_ R K_0 R K_0# R K_ R K_# R K_ R K_# R K_ R K_# RSV RSV RSV RSV RSV RSV RSV_TP RSV_TP R_VREF R_RP R_RPU RSV MIRO-F- N/ R QS_0 R QS#_0 R M_0 R Q_0 R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R QS_ R QS#_ R M_ R Q_ R Q_ R Q_0 R Q_ R Q_ R Q_ R Q_ R Q_ R QS_ R QS#_ R M_ R Q_ R Q_ R Q_ R Q_ R Q_0 R Q_ R Q_ R Q_ R QS_ R QS#_ R M_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_0 R Q_ R QS_ R QS#_ R M_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R QS_ R QS#_ R M_ R Q_0 R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R Q_ R QS_ R QS#_ R M_ R Q_ R Q_ R Q_0 R Q_ R Q_ R Q_ R Q_ R Q_ R QS_ R QS#_ R M_ R Q_ R Q_ R Q_ R Q_ R Q_0 R Q_ R Q_ R Q_ F E E E 0 E F0 F F E0 K K J J K J F J E F F E E J E E E0 F F0 0 0 J0 J E W W W _QS_0 _QS_#0 _M_0 _Q_0 _Q Q Q Q Q Q Q QS QS_# _M Q Q Q_0 _Q Q Q Q Q QS QS_# _M Q Q Q Q Q_0 _Q Q Q QS QS_# _M Q Q Q Q Q Q Q_0 _Q QS QS_# _M Q Q Q Q Q Q Q Q QS QS_# _M Q_0 _Q Q Q Q Q Q Q QS QS_# _M Q Q Q_0 _Q Q Q Q Q QS QS_# _M Q Q Q Q Q_0 _Q Q Q Q_[:0] _QS_[:0] _QS_#[:0] _M_[:0] PVR KOhm PVR KOhm PV KOhm PVR0 KOhm XP_RSV XP_RSV XP_RSV XP_RSV PU Sample SKU ES ES QS PRQ R R W T V NU XP_RSV[0] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[0] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] XP_RSV[] RSV RSV_TP RSV_TP RSV_TP0 RSV_TP RSV_TP RSV_TP RSV_TP RSV_TP MIRO-F- N/ SUS P/N RT_SYN RT_VSYN RT_RE RT_REEN RT_UE RT_IRTN RT T RT K REFKINP REFKINN REFSSKINP REFSSKINN RSV RSV PWROK RSTIN# P_KINN P_KINP M0 M N P0 P N0 0 Y0 Y 0 K J0 W W Intel confirm only RSV need stuff K resistor. K&T need.k Pull up to +VS(Or may we can use.k);connector side has pull-up resistor. V_SYN_R V_VSYN_R PVR PVR V_RE V_REEN V_UE _M_N _M_N# VS VS# PVR r00 PM_EXTTS PM_EXTTS0 Ohm Ohm V T V K P REFSET PVR OM % _IREF _FS_N# _FS_N MZ <ore esign> V_SYN V_VSYN PVR 0KOhm PVR0 0KOhm V_RE PVR % V_REEN PVR % V_UE PVR % PV 0PF/0V PM_PRSPVR, +VS PV0 0PF/0V PM_PWROK, S_PIRST#, PineView_ SUSTek omputer IN. Nicky_heng 0P.0 ate: Saturday, February 0, 00 Sheet of

6 Near,V as internal VRM for this! urrent for PineView V =. V =0.0 VFX =. VVS, VVS=0.0 V_MI =0. VSFR_MIMP =0.0 V_R and VK_R =. VSM and VK_R =. VRIN_EST, VRIN_EST_WEST, V_I, V P, V_MP =0. V_IO =0.00 VSFR P, VRT =0. V max 0.0 VVS&VVS max 0.0 V_MI max 0. VSF max 0.0 V_IO max 0.00 VSFR P & VRT max 0. V_R & VK_R max. VSM & VK_R max. VF : max. Saturday, February 0, 00 SUSTek omputer IN. PineView_. 0P Nicky_heng <ore esign> ate: Sheet of +.0_MP +._R_SENSE +V +VSFR_MIP +VP_MI +VRT_R +VSFR_MIP +V_MI +V_V VORE_VSS_SENSE VORE_V_SENSE +VORE +V_MI +VP +.0_V +VS +.0_V +.VS +0.VS +.VS +VP +.V +.VS +VP +V_VO +V_MI +.VS +VSFR_P +.VS +.V +.0_V_R +VP +.0_V +VP +.0_V_R +.VS PV UF/.V PV 0UF/.V PV 0.UF/.V PV UF/.V PVR r00_h PV UF/0V PV /00Mhz PV 0.UF/.V PV 0.UF/.V PV 0.UF/.V NUF MIRO-F- N/ E E E E E E E F F F F F 0 J J J K K K K0 K 0 0 E E0 E E E E F F F F F J J J J K K K K K K K0 K K M M N N N N N N N N N P P P P P P P P R R R T U U U U V V V V V W W W W W W W0 W W W W Y Y Y T VSS VSS VSS RSV_NTF RSV_NTF RSV_NTF RSV_NTF VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS RSV_NTF VSS RSV_NTF RSV_NTF RSV_NTF VSS RSV_NTF RSV_NTF0 VSS VSS0 RSV_NTF VSS RSV_NTF RSV_NTF RSV_NTF VSS VSS VSS VSS VSS RSV_NTF RSV_NTF VSS VSS RSV_NTF VSS VSS0 VSS VSS RSV_NTF VSS RSV_NTF VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS00 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS PV UF/.V PV UF/0V PV 0.UF/.V PVR r00_h PV 0.UF/.V PV 0UF/.V PV UF/.V PV 0.UF/.V PV UF/.V PV UF/.V PV 0.UF/.V PV 0.UF/.V PV 0.UF/.V TPT TPT PV 0.UF/V PVR PV 0UF/.V PV 0UF/.V N/ PV UF/.V PVR /00Mhz l00 PV 0.UF/.V PV 0UF/.V PV 0.UF/.V N/ PV UF/0V PV /00Mhz l00 PV UF/.V PV 0UF/.V PV UF/.V PV0 0.UF/V c00 PV 0.UF/.V PV UF/.V PV 0.UF/.V PV 0.UF/.V /PU PV0 0UF/.V PVR r00_h PV 0.UF/V PV 0.UF/.V PV UF/.V PV 0.UF/.V PV 0.UF/.V PV 0.UF/V N/ PV UF/.V NUE MIRO-F- T T T T T V V W W W W K K K K U0 U U U U U V V V W0 W 0 V T0 T J E E E F F F J J J J K K K N N N N Y V0 W T T T P E VFX VFX VFX VFX VFX VFX VFX VFX VFX VFX0 VFX VSM VSM VSM VSM VSM VSM VSM VK_R VK_R V_R V_R V_R V_R V_R V_R V_R V_R V_R V_R0 V_R VK_R VK_R V P V_MP VSFR P VRT V_IO VRIN_EST VRIN_WEST_ VRIN_WEST_ VRIN_WEST_ V_I V V V V V V V V V V0 V V V V V V V V V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V VSENSE VSSSENSE V V VP VP VVS VVS V_MI V_MI V_MI VP_MI VSF/R_MI/MP VP PV 0.UF/.V PV UF/.V PV 0.UF/.V PV 0.UF/.V PV /00Mhz N/ PV 0.UF/.V PV 0.UF/.V PVR /00Mhz l00 PV 0UF/.V PVR /00Mhz PV UF/.V PV 0.UF/.V PV 0.UF/.V PV 0.UF/.V PV UF/.V PV0 0.UF/.V PVR /00Mhz l00 PV 0.UF/V PV 0.UF/.V PV 0.UF/.V PV 0.UF/.V

7 +VP +VP, _PMN PMN PWR % P PVR KOhm XP_PWR PVR Ohm TESTIN# P, S_SMK_MIN, S_SMT_MIN _TK XP NP_N NP_N PM# PM# PWROO RESERVE VTT Kp Kn S S N TK TO_ON_P P PM# PM# PM# PM0# K0 K RESET# R# TO TRST# TI TMS _PMN_REQ# _PMN_RY# _PMN_REQ# _PMN_RY# _PMN PMN_0 PURST_ITP# PVR SYS_RESET#, _TO _TRST# _TI _TMS _ITP_K _ITP_K# KOhm P % PT_RST#,,, +VP hange evice and P footprint of XP to nomask footprint - nomask solution ayout XP onnector 00 (w/ through holes) 0.UF/V P <ore esign> SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of XP

8 +VS FOR SR.kOhm SR.kOhm RSV RSV US0 US US ONN US ONN.KOM SRN.KOM SRN.KOM SRN.KOM SRN SERR# PERR# TRY# POK# US US US ONN USIM.KOM SRN.KOM SRN.KOM SRN.KOM SRN PIRQ# PIRQ# FRME# EVSE# US US ard Reader amera.kom SRN.KOM SRN.KOM SRN.KOM SRN.KOM SRN.KOM SRN.KOM SRN.KOM SRN PIRQ# IRY# PIRQF# PIRQ# PIRQ# PIRQE# PIRQ# STOP# US US lue tooth Near Tigerpoint. SU +VSUS +VS SR For strapping as Top-block Swap override. r00 0KOhm Remain PIK. _PI_S, S_PIRST# TPT SR r00 KOhm SR KOhm r00 PME# EVSE# TPT IRY# PME# SERR# STOP# POK# TRY# PERR# FRME# NT# REQ# REQ# OOTSE OOTSE MER_EN PIO PIRQ# PIRQ# PIRQ# PIRQ# PIRQE# PIRQF# PIRQ# PIRQ# TOPOK_SWP RSV RSV PIO MER_EN REQ# REQ# J F 0 0 E 0 0 E F K M SU PR EVSE# PIK PIRST# IRY# PME# SERR# STOP# POK# TRY# PERR# FRME# NT# NT# REQ# REQ# PIO/STRP# STRP#/PIO PIO PIO PIRQ# PIRQ# PIRQ# PIRQ# PIRQE#/PIO PIRQF#/PIO PIRQ#/PIO PIRQ#/PIO STRP0# RSV RSV MMP /E0# /E# /E# /E# 0KOM SRN 0KOM SRN 0KOM SRN 0KOM SRN E J E0 E M +VS MI_RXN0 MI_RXP0 MI_TXN0 MI_TXP0 MI_RXN MI_RXP MI_TXN MI_TXP X_PIE_WN_RXN X_PIE_WN_RXP X_PIE_WN_TXN X_PIE_WN_TXP X_PIE_WIMX_RXN X_PIE_WIMX_RXP X_PIE_WIMX_TXN X_PIE_WIMX_TXP X_PIE_N_RXN X_PIE_N_RXP X_PIE_N_TXN X_PIE_N_TXP OOTSE OOTSE +VMI_P_I SR0 SR S S S S S 0.UF/.V c00 0.UF/V 0.UF/V 0.UF/V 0.UF/V S 0.UF/V S 0.UF/V /WIMX S0 0.UF/V S 0.UF/V /WIMX S 0.UF/V S 0.UF/V KOhm SR KOhm KOhm SR KOhm STRP#/PIO STRP#/PIO Routing 0 : Flash ycles Routed to SPI 0: Flash ycles Routed to PI : Flash ycles Routed to P PIE_TXN PIE_TXP PIE_TXN PIE_TXP PIE_TXN PIE_TXP MI_TXN0_R MI_TXP0_R MI_TXN_R MI_TXP_R TPT TPT TPT TPT0 TPT TPT TPT TPT TPR.Ohm MI_OMP _PIE_S# _PIE_S +VS R R P P0 T T0 T T T T U U V V0 V V K K J J M M K K M P P N N J W W MI0RXN MI0RXP MI0TXN MI0TXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP PERN PERP PETN PETP MI_ZOMP MI_IROMP MI_KN MI_KP MMP-0 USP0N USP0P USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP USPN USPP O0# O# O# O# O# O#/PIO O#/PIO0 O#/PIO USRIS USRIS# K J J K K K K M M N N E E F USRIS U_USO#0 U_USO#0 O# R_O# M_O# T_O# _O# <ore esign> U_US0- U_US0+ U_US- U_US+ U_US- U_US+ U_SIM- U_SIM+ U_R- U_R+ U_M- U_M+ U_T- U_T+ U_- U_+ U_USO# SR.Ohm _M_US M_O# SR O# T_O# R_O# _O# 0KOhm r00 SRN 0KOhm SRN 0KOhm SRN 0KOhm SRN 0KOhm MI&US SUSTek omputer IN. Nicky_heng. 0P +VSUS ate: Saturday, February 0, 00 Sheet of

9 +VS R E0 Y 0 Y0 W0 V E E U Y E E V 0 P_I0 S Sample SKU QS PRQ SU RSV ST0RXN RSV ST0RXP RSV ST0TXN RSV ST0TXP RSV STRXN RSV STRXP RSV0 STTXN RSV STTXP RSV RSV RSV RSV RSV RSV RSV RSV ST_KN RSV0 ST_KP RSV RSV STRIS# RSV STRIS RSV STE# RSV RSV RSV RSV 0TE RSV 0M# PUSP# INNE# RSV0 INIT_V# RSV INIT# RSV INTR PIO FERR# NMI RIN# SERIRQ SMI# STPK# TERMTRIP# MMP-0 SUS P/N E E U Y0 Y Y Y T V 0 K MZ has a ohm resistor near clk en. ST0_TXN_I ST0_TXP_I _PUSP# SMI# TEMTRIP# _FERR# S S T_STE# 0TE _0M# _INNE# _INIT# _INITR _FERR# _NMI O_KRST# F_SERIRQ _STPK 0.0UF/V 0.0UF/V _ST_S# _ST_S TPR.Ohm STRIS# TPT TPT TPR Ohm N/ RQ0/ P M/master request,im has internal PU, but we need TPT datasheet T_ST0_RXN 0 T_ST0_RXP 0 T_ST0_TXN 0 T_ST0_TXP 0 +VP [0:] INT PU 0K _Z_ITK _Z_RST# _Z_SIN0 _Z_SOUT _Z_SYN ST RX,TX all need couple and place near onnector side for signal quality.nd Traces to them should match length. IM need pull down RX, if no use. TPT RQ#, F_0, F_, F_, F_ TPT, F_FRME# SR Ohm Z_K SR Ohm Z_RST# SR SR TPR r00 TPT0 Ohm TPT Ohm _M_S S_SMK S_SMT TPT TPT TPT0 TPT TPT Z_SOUT Z_SYN I_NRST X_RT X_RT RTRST# SMERT# SMERT# SMINK0 SMINK V Y W Y Y P U W V P Y U E T V T P W T U W V T E0 E F F R T M P R SU RQ#/PIO M_USY#/PIO0 0/FW0 PIO /FW PIO /FW PIO /FW PIO RQ0# PIO0 FW/FRME# PIO PIO _IT_K PIO _RST# PIO _SI0 PRSPVR _SIN STP_PI# _SIN STP_PU# _SOUT PIO _SYN PIO K PIO PIO EE_S PIO EE_IN KRUN# EE_OUT PIO EE_SK PIO PIO N_K PIO NR_STSYN N_RST# PUPWR/PIO N_RX0 N_RX TRM# N_RX VRMPWR N_TX0 M_SYN# N_TX PWRTN# N_TX RI# SUS_STT#/PP# RTX SUSK RTX SYS_RESET# RTRST# PTRST# WKE# SMERT#/PIO INTRUER# SMK PWROK SMT RSMRST# INKERT# INTVRMEN SMINK0 SPKR SMINK SP_S# SPI_MISO SP_S# SPI_MOSI SP_S# SPI_S# SPI_K TOW# SPI_R PRSTP# PSP# RSV MMP-0 T W W K M P E 0 Y R 0 F U SIMR_IN# PIO PIO EXTSMI# PIO WN_ON# O_K_SI# _OFF _ON PIO PIK Run,if no use must PU! PM_PRSPVR, STP_PI# STP_PU# R_REER_EN# R_REER_EN# MI_STRP F_I0 F_I F_I KRUN# T_IS# T_IS# WN_E WN_E P_I P_I PRSTP# PSP# STP_PI# STP_PU# T_IS# WN_E 0TE F_SERIRQ MSYN KRUN# PIO PIO _PWR, TERM_ERT# V VRM_PWR, MSYN E PM_PWRTN# I_RI_PU TPT TPT SYS_RESET#, PT_RST#,,, PIE_WKE#, T INTRUER# U0 PM_PWROK, RSMRST# INTVRMEN J SPKR 0 E F F0 TPT PM_SUS# PM_SUS# PM_TOW# 0KOM 0KOM 0KOM 0KOM 0KOM 0KOM 0KOM 0KOM SIMR_IN# EXTSMI# WN_ON# O_K_SI# _OFF EXTSMI# PIO WN_ON# SMERT# O_K_SI# _OFF _ON PIO SRN SRN SRN SRN SRN SRN SRN SRN SR 0KOhm N/ SR 0KOhm N/ PT_RST# lready 0K pull up to +VS in clk gen section. TPR 00KOhm 0KOM 0KOM 0KOM 0KOM 0KOM 0KOM 0KOM 0KOM SRN0 SRN0 SRN0 SRN0 SRN SRN SRN SRN _PWR PRSTP# PSP# Reserved as intel demo sck. +VSUS +VP To PU and Vcore controller To PU. RSMRST# PM_RSMRST# TPR 0 ohm for debugging later. SYS_RESET# +VP +VP TPR Ohm N/ TEMTRIP# SMI# TPR TP 0PF/0V c00 TPR r00 TPR r00 TPR Ohm TPR Ohm TP 0PF/0V c00 TPR VRM_PWR PM_PRSTP# PM_PSP# _TEMTRIP# _SMI# Z_K TP 0PF/0V c00 TP 0PF/0V c00 /EMI +VS SPKR r00 SR KOhm +VSUS +VS TERM_ERT# O_KRST# T_STE# SIMR_IN# TPRN 0KOhm TPRN 0KOhm TPRN 0KOhm TPRN 0KOhm +VSUS hange from 0K to.k.kohm S_SMK S_SMT SQ UMKN SQ UMKN Main system SMUS..KOhm TPRN +VS S_SMK_MIN, +VSUS +VS +VS.KOhm TPRN TPRN.KOhm TPRN S_SMT_MIN, F_I F_I F_I0 SR SR SR 00KOhm 00KOhm 00KOhm SR0 SR SR 00KOhm 00KOhm 00KOhm SR SR SR 0KOhm 0KOhm 0KOhm P_I P_I P_I0 SR SR0 SR 0KOhm 0KOhm 0KOhm N/ N/ N/ +VSUS SMERT# TPRN 0KOhm SMINK0 TPRN 0KOhm SMINK TPRN 0KOhm I_RI_PU TPRN 0KOhm PM_PWRTN# TPR r00 0KOhm PM_TOW# TPR0 r00 0KOhm SYS_RESET# TPR r00 0KOhm PIE_WKE# TPR r00 0KOhm R_REER_EN# TPR r00 0KOhm +V_RT P I. P I. INTVRMEN TPR r00 MOhm INTRUER# TPR r00 MOhm TPT S0 PF/0V S PF/0V NPO NPO SX.Khz 000 /NM0 SR SR 0MOhm X_RT X_RT S_TT SIE SIE WTO_ON_P SM RTT +V_T_R SR KOhm TPT TPT TPT +V S TW TPR S UF/.V +V_RT RT power. TPT TPT S 0.UF/.V c00 SR 0KOhm S UF/.V RTRST# SRT S_JUMP Place Near back oor PM_PWROK S 0PF/0V c00 SR MOhm r00_h RSMRST# SR MOhm r00_h S 0PF/0V c00 RT well input requires pull down to reduce leakage from coin cell battery in. ann't float in. MI_STRP SR SR % 0KOhm KOhm MI strap. +VSUS =MI interface is strapped to operate in coupled mode. 0=MI interface is straped to operate in coupled mode. For Rechargeable solution: Mount TPR For NON-Rechargeable solution: Unmount TPR <ore esign> S system SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

10 New part Near F,K N,F V_0=0. V_ =. V_ =0. VccSUS_ =0.0 VccRT =u VREF =m VREF_SUS =0m V_PU_IO =m VUSP =0m VccMIP =m VccSTP=m 0 Saturday, February 0, 00 SUSTek omputer IN. over Page. 0P Nicky_heng <ore esign> ate: Sheet of I_VREF I_VREF_SUS +VS +VS +VSUS +VSUS +VP +VSUS +VS +V.SUS +V.SUS +V. +V. +VP +V_RT +VMI_P_I +.VS +.VUSP +.V_ST_P +VP +V_RT +VMI_P_I +.VS +.VS +.V_ST_P +.VS +.VUSP +.VS TP TW TP UF/.V N/ TP UF/.V SUF MMP E F K K K K K0 M M N N N N N P P P R R T T V V V V V V W W Y Y 0 0 E E0 E E F E VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS RSV TPR TP TW TP 0UF/.V TP 0.UF/.V c00 TP UF/.V TP 0.UF/.V c00 TPT0 TPT TP UF/.V TP /00Mhz l00 /NM0 TP 0.UF/.V c00 TP 0.UF/.V c00 TPR0 r00_h /NM0 TP0 0.UF/.V c00 TP0 UF/.V TPR r00_h /NM0 TP UF/0V TP.UF/.V N/ TP0 0.UF/.V c00 TP.UF/.V N/ TP /00Mhz l00 /NM0 TP 0.UF/.V c00 TP 0.UF/.V c00 TP.UF/.V N/ TP 0UF/.V TP 0UF/.V TP UF/.V TP /00Mhz l00 /NM0 SUE MMP-0 F F Y E Y F W M M0 N J0 K P V0 F0 0 R0 T F N K F VREF VREF_SUS VSTP VRT VMIP VUSP V_PU_IO V V V V V_0_ V_0_ V_0_ V_0_ V V V V V V VSUS VSUS VSUS VSUS TP 0.UF/.V c00 TP 0UF/.V N/ TP 0.UF/.V c00 TP 0.UF/.V c00 TP 0.UF/.V c00 TP UF/.V TPR 0 TP 0.UF/V TP 0.UF/.V c00 TP 0UF/.V TP0 0.UF/.V c00 TP UF/0V TP.UF/.V N/

11 " ayout nd source / 000X P footprint, nd IMM - nd source P footprint main source size IMM " Saturday, February 0, 00 SUSTek omputer IN. R-SO-IMM.0 0P Nicky_heng <ore esign> ate: Sheet of _VREF S_SMK_MIN S_SMT_MIN _QS_ S_SMT_MIN S_SMK_MIN _Q_0 _Q Q Q Q QS QS M _Q Q Q Q Q Q Q M _Q Q Q Q Q M _Q Q Q Q Q Q Q QS_# _Q Q Q_0 _Q Q Q_0 _QS M_0 _M0 _M _Q Q Q M M _Q Q_0 _QS_# _M Q Q Q_0 _Q QS M _Q Q Q QS_# _QS_# _QS_0 _M M _M _M _Q QS_# _M _Q Q Q Q QS_# _QS QS M Q Q Q Q Q Q M M _M _M0 _Q Q Q Q_0 _Q QS_#0 _M M M _Q Q QS_# _Q Q Q Q_0 _S_#, _Q_[:0] _M_K#0 _QS_[:0] _WE#, S_SMK_MIN, _M_K# _OT_0, _RS#, _QS_#[:0] _S_#0, _M[:0], _M_K _KE_0, _, _0, S_SMT_MIN, _KE_, _S#, _OT_, _, _M_K0 _M_[:0] +.V +VS +.V +.V 0.UF/V 0UF/.V c00 0.UF/V UF/0V c00 0.UF/V 0.UF/V 0PF/0V R KOhm % 0.UF/V 0.UF/V 0.UF/V 0UF/.V c00 IMM R_IMM_00P V V V V V V V V V V0 V V VSP N N N N NTEST VREF 0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS0 VSS VSS VSS VSS VSS VSS VSS NP_N NP_N 0.UF/V 0UF/.V c UF/V R KOhm % IMM R_IMM_00P /P 0 S0# S# K0 K0# K K# KE0 KE S# RS# WE# S0 S S S OT0 OT M0 M M M M M M M QS0 QS QS QS QS QS QS QS QS#0 QS# QS# QS# QS# QS# QS# QS# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q _ Q 0 0PF/0V + E 00UF/.V

12 _M[:0], +VTTR _M0 _M _M _M _M _M _M _M Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm RN RN RN RN RNF RN RNE RN, _, _S#, _RS#, _WE#, _S_#0, _OT_0, _KE_0, _KE M _M _M0 _M _M _M _M Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm 0 Ohm Ohm Ohm Ohm Ohm 0 Ohm Ohm RN RNE RN RN RNF RN RN RNE RN RN RN RNF RN RN RN RN +VTTR 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V, _0, _, _S_#, _OT_ Ohm 0 Ohm Ohm Ohm RN RN RN RN +VTTR 0.UF/V 0 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V Ohm Ohm Ohm 0 Ohm RN RNF RN RNE <ore esign> SUSTek omputer IN. 0P R-Termination Nicky_heng ate: Saturday, February 0, 00 Sheet of.0

13 NPO NPO NPO NPO NPO NPO Place Near VU Pin For EMI NPO NPO For EMI Place close to V connector NPO NPO Saturday, February 0, 00 SUSTek omputer IN. Onboard-V. 0P Nicky_heng <ore esign> ate: Sheet of RT_REEN_ON _T_R _T_ON RT_VSYN_ON RT_SYN_ON _T_ON _K_ON RT_UE_ON _K_ON _T_ON RT_VSYN_ON RT_SYN_ON RT_SYN_S RT_SYN_ON RT_VSYN_ON RT_VSYN_S RT_RE_ON _K_R _K_ON V_REEN V_UE V_RE V T V K V_VSYN V_SYN +VS +VS +VS +VS +V_RT_F +V_RT +V_RT_R +VS +VS +V_RT +VS +VS +V_RT +VS +VS +VS +V_RT +V_RT +VS VR VR % VR % RT PIN V _SU_P 0 RE N REEN T UE SYN V N VSYN K SIE_ SIE_ VRN.KOM V PF/0V VR0 Ohm V VW_ V PF/0V VRN.KOM V 0.0u l00 VF./V V PF/0V V PF/0V V PF/0V VU VUR N/ OE# OE# V VRN.KOM V PF/0V VRN.KOM V VW_ V VW_ V VW_ V VW_ VR Ohm V FSJTP V 0.0u l00 VR V PF/0V V PF/0V V 0.UF/V V0 PF/0V VQ UMKN VR % V 0.UF/V V 0.0u l00 V PF/0V V VW_ VQ UMKN V 0.UF/V V VW_

14 +VS +V_ +VS +_EIN _N_TR _KP _KN _TP _TN _TP _TN _TP0 _TN0 _V_EN T K _N_TR _EN /larer /larer +VS P 0.UF/V E PF/0V /EMI +_EIN _EN_R _V_EN_R T K 0 0 VS_ON SIE 0 SIE 0 WTO_ON_0P 000R SM +V_ 0 0UF/.V c00 +VS _V_EN PR r00_h /lare S PQ UMKN /nti-glare PQ SI0S /nti-glare PR MOhm /nti-glare P 0.UF/V /nti-glare PR 00KOhm /nti-glare +V_ P 0.UF/V +VS PR r00_h /lare P S 0.UF/V /nti-glare PQ UMKN _EN /nti-glare PQ SI0S /nti-glare PR MOhm /nti-glare PR 00KOhm /nti-glare UF/0V c00 +_EIN P 0.UF/V 0PF/0V 0 UF/0V c00 _T_SYS +_EIN +V PR0 r00_h / +V SE UF/0V c00 +V SE VW_ SE 0.UF/V U V Output E--F SER 00KOhm SE 0PF/0V O_I_E#, _N_EN _KOFF# _EN TW R 0KOhm +VS K 0PF/0V T 0PF/0V _KP 0PF/0V N/ _KN 0PF/0V N/ _TP 0PF/0V N/ _TN 0PF/0V N/ _TP _TN _TP0 _TN0 _N_TR _EN _V_EN 0PF/0V N/ 0PF/0V N/ 0PF/0V N/ 0 0PF/0V N/ 0PF/0V E 0PF/0V /EMI E 0PF/0V /EMI <ore esign> VS onn_i SUSTek omputer IN. Nicky_heng ustom 0P. ate: Saturday, February 0, 00 Sheet of

15 SMRT# SMRT# 0 OTKEY_WIFI_SW# OTKEY_WIFI_SW# SMRT NP_N NP_N SW_P E PF/0V /EMI WIFI_SW NP_N NP_N SW_P E PF/0V /EMI <ore esign> WIFI_SMRT SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

16 +.VSUS_N Normal R N/ N RM Symbol OM 0000 XR XR +VSUS UF/0V c00 XR 0.UF/V XR close to Pin 0UF/.V UF/0V c00_h c00 XR XR N/ N/ close to Pin +.VSUS_N 0 UF/0V c00 XR +.VSUS_N 0.UF/V XR 0.UF/V XR 0 close to Pin R r00_h R0 r00_h 0.UF/V XR 0 0.UF/V XR N/ 0.UF/V XR _VRE 0.UF/V 0 0.UF/V To pin +.V_N 0.UF/V XR Overclocking close to pin 0.UF/V,,, PT_RST#, PIE_WKE# 0.UF/V 0 U +VSUS R_E /R VSUS_N close to Pin +.V_N R.KOhm % 0.UF/V +VSUS +.V_N R.KOhm % Input M,unmount R. Input M,mount R. 0UF/.V c00_h _SE_K _XTO _XTI _VRE _RIS +.VSUS_N UF/0V c00 XR.U R.KOhm % +.V_N_X N_MI_0+ N_MI_0- N_MI_+ N_MI_- 0 U 0.UF/V XR R % N/.KOhm X VV PERSTn WKEn VV V SE_Mz V_RE XTO XTI V_RE RIS R_E /R T E_0_00 E_T _V _V 0 E_0_00n E_Tn V_RE_ V_RE_ RX_N RX_P V REFKP REFKN V_ TX_P TX_N TRXP0 TRXN0 VO V_ TRXP TRXN V_ N N V_ N N 0 X_X_RXP_ X_X_RXN_ V_ N TESTMOE SMT V_ SMK TWSI_T TWSI_K V_ KREQn N V_ +.VSUS_N 0 +.VSUS_N R N_EET R N_EEK _V _REQ#_N 0.UF/V +.VSUS_N XR R RM _VRE 0.UF/V 0.UF/V _V U X_PIE_N_TXN X_PIE_N_TXP _PIE_N _PIE_N# X_PIE_N_RXP X_PIE_N_RXN UF/V XR R.K 0 ohm R.KOhm +VSUS % _REQ#_N R U N/ N/ N/ _REQ#_N +VSUS N_EEK N_EET 0 0.UF/V /RM XR 0 N/ Normal 0.UF/V XR _VRE R N/ 0.UF/V To pin R0 +.V_N 0.UF/V 0.UF/V N_MI_0+ N_MI_0-0UF/.V c00 N_MI_+ N_MI_- U R+ RX+ R- RX- RT RXT PTT/TTXT T+ TX+ T- TX- N N N N FE N_RXP_ N_RXN_ N_RXT N_TXT N_TXP_ N_TXN_ R Ohm R Ohm 000PF/KV c0_h F 000PF/0V R F N_RXP_ N_RXN_ N_TXP_ N_TXN_ N_RXP_ N_RXN_ N_TXP_ N_TXN_ Overclocking N/ +VSUS _N_M R Ohm /N_K R 0KOhm /N_K _XTI 0PF/0V /N_K PF/0V /NXT R 0MOhm X Mhz /NXT _XTO PF/0V /NXT 0.UF/V R.Ohm % N_MI R R.Ohm % 0.UF/V R.Ohm % N_MI_0_R R.Ohm % lose to U N_MI_0+ N_MI_0- N_MI_+ N_MI_- <ore esign> SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of N_R

17 WIFI use PIE. Spec +VS =.0 peak / 0. Normal +.VS = 0. peak / 0. Normal +VSUS = 0. peak / 0. Normal W UF/.V +VSUS W 0.UF/V W 0.UF/V WT +VS_PE, PIE_WKE# WR WT _PIE_WN# _PIE_WN X_PIE_WN_RXN X_PIE_WN_RXP X_PIE_WN_TXN X_PIE_WN_TXP W_PIE_WKE# W_KREQ# WN WKE# Reserved Reserved KREQ# REFK- REFK+ Reserved/UIM_ Reserved/UIM_W_ISE# PERST# PERn0 +.Vaux PERp0.V_ SM_K PETn0 SM_T PETp0 0 US_- Reserved US_+ Reserved Reserved E_WWN# Reserved E_WN# Reserved E_WPN# Reserved.V_ Reserved Reserved0.V_ MINI_PI_T_P /WN.V_.V_ UIM_PWR UIM_T UIM_K UIM_RESET UIM_VPP NP_N NP_N VS +VSUS WN_ON WN_RST# W 0.UF/V PT_RST#,,, +VS +.VS /WN WR r00_h W 0.UF/V W0 0UF/.V c00 W 0.UF/V +VS_PE W 0UF/.V c00 W 0.UF/V W 0.UF/V W 0.UF/V W 0.UF/V W 0.UF/V WT X_PIE_WN_RXN E 0PF/0V /EMI X_PIE_WN_RXP E 0PF/0V /EMI WN_ON WN_ON# S WQ N00 /WN W 0UF/.V c00 <ore esign> SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of WN

18 Saturday, February 0, 00 SUSTek omputer IN. ON. 0P Nicky_heng <ore esign> ate: Sheet of USIM_RESET _PIE_WIMX# USIM_RESET USIM_T X_X_TXN PT_RST# X_X_RXN USIM_K X_X_TXP _PIE_WIMX U_+_R _OFF U_-_R X_X_RXP PT_RST# USIM_T USIM_T USIM_K USIM_K USIM_RESET U_+_R U_-_R X_X_RXP X_X_RXN SIMR_IN# PT_RST#,,, _OFF U_SIM+ U_SIM- X_PIE_WIMX_RXN X_PIE_WIMX_RXP X_PIE_WIMX_TXP _PIE_WIMX X_PIE_WIMX_TXN _PIE_WIMX# U_- U_+ USIM_PWR USIM_PWR +V_ +V_ +VS +V_ +VSUS +V_ W 0PF/0V /RF WR 0KOhm % / WR r00_h //PIE. W PF/0V / WRN 0OM / E 0PF/0V /EMI W PF/0V /RF W /00Mhz USIM SIM_ON_P / 0 V 0 RST VPP K I/O T0 MM R_ETET_SWIT E 0PF/0V /EMI E 0.UF/V /EMI _ON FP_ON_P / SIE SIE W PF/0V /RF W 0UF/.V c00 /RF W PF/0V / W 0.UF/V /RF W PF/0V / W PF/0V /RF W PF/0V /RF W UF/0V c00 / W0 PF/0V / WR r00_h //PIE. W UF/0V c00 / WRN 0OM /

19 U_T+ U_T- 0OM TRN /T USP T /00Mhz 0OM TRN /T USN +VS +VS TR 0KOhm T T UF/0V /T T_IS# USN USP T_ON SIE SIE WTO_ON_P /T <ore esign> SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of luetooth

20 0. eta ST onnector +VS_ NP_N NP_N T_ST0_TXP T_ST0_TXN T_ST0_RXN_R T_ST0_RXP_R T_ST0_RXN_R T_ST0_RXP_R I 0.0UF/V I 0.0UF/V T_ST0_RXN T_ST0_RXP NP_N NP_N TPT T +VS /00Mhz N/ +VS_ I0 I UF/.V 0UF/.V N/ I 0.UF/V N/ ST_ON_P <ore esign> _ON SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet 0 of

21 <ore esign> US.0 SUSTek omputer IN. 0P. Saturday, February 0, 00 ate: Sheet of

22 <ore esign> US.0 SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

23 U_US0- U_US0+ 0OM URN USPN0 U /00Mhz URN 0OM USPP0 +V_US R /US R +V_US U U 0UF/.V VIN VOUT EN/EN# N RTP /US +V_US +V_US +V_US_ON US_PORT UF./V U_USO#0 U /00Mhz l00_h UR.KOhm % N/ + U UF/.V + U UF/.V USPN0 USPP0 U 0.UF/V US VUS SIE - P_ + P_ SIE US_ON_XP UR.kOhm FOR +V_US_ON For ES U VW_ U VW_ USPP0 USPN0 <ore esign> SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of US Port

24 +V OU_P %.KOhm OR0 O 0UF/.V c00 O 0.UF/V O 0.UF/V O0 0.UF/V +V O 0.UF/V O 0.UF/V O 0.UF/V OR 00KOhm, N/ F_SERIRQ, F_FRME# _P_E O E_REEN#, F_0, F_, F_, F_ O_KRST# O_K_SI# 0TE S_PIRST# O_E_RST# OU SERIRQ FRME# PIK PIO/KRUN# 0 0 P I/F PIO0/KRST# 0 PIO0E/SI# PIO00/0 PIO0/PIRST# ERST# V V V V V V V V/ V +V O 0.UF/V +V_E +V F_SERIRQ, F_FRME# _P_E O_KRST# O_K_SI# 0TE, S_PIRST#, S_SMK, S_SMT EXTSMI#, O_I_E# _OK T_IN O E_ORNE# O_PWR_E_UP O OR O_KSO0 O 0.UF/V O_KSO PIO0/KSO0/TP_TEST 0 +VSUS UF/0V 0KOhm O_KSO PIO/KSO/TP_P PI/0 c00 N/ O_KSO PIO/KSO PI/ O_KSO PIO/KSO/TP_ISP PI/ O_KSO PIO/KSO PI/ O_KSO PIO/KSO OR O_KSO PIO/KSO Key Matrix O_KSO PIO/KSO PIO0F/PWM0 Scan.KOhm O_KSO PIO/KSO PWM PIO0/PWM O % O_KSO0 PIO/KSO / PIO/PWM N/ O_KSO PIO/KSO0 FN PIO/PWM VSUS_PWR 0 O_KSO PIO/KSO E_RSMRST# PM_RSMRST# O_KSO PIO/KSO PIO/FNPWM O_KSO PIO/KSO PIO/FNPWM O_KSO[0..] TW O_KSO PIOE/KSO PIO/FNF PIOF/KSO/E_RX(ISP) PIO/FNF PIO/KSO OR O_KSI0 PIO/KSO PO O_KSI PIO0/KSI0/E_TX(ISP) PO PO O_KSI PIO/KSI POE O_KSI PIO/KSI POF O_KSI PIO/KSI O_KSI PIO/KSI PXIO00/SIS# 0 +VS O_KSI PIO/KSI PXIO0/SIK O_KSI PIO/KSI PXIO0/SIO PIO/KSI XIOPXIO0 O_KSI[0..] PXIO0 PXIO0 OR0 PIO/NUME# E PXIO0 PIO/ETMR/PSE# PXIO0.KOhm PIO/EINT0/SRE# PXIO0 O % PXIO0 N/ PXIO0 VSUS_PWR PIO/PSK/P0_K PXIO E_PWROK PM_PWROK, PIO/PST/P0_T PIO/PSK PS TW PIO/PST PXIO0/SII O_TP_K I/F PIOE/PSK PXIO O_TP_T PIOF/PST PXIO XIO PXIO PXIO OR PXIO, S_SMK PIO/S PXIO, S_SMT PIO/S SM US PXIO S_SMK PIO/S S_SMT 0 PIO/S OR Ohm OTKEY_SW# 0 EXPRESS_TE_E# SPI R#/SPII OR Ohm OTKEY_SW# PIO0 WR#/SPIO OTKEY_WIFI_SW# I/F PIO0/PWU PIO/SPIK EXTSMI# PIO0 SEMEM#/SPIS#, O_I_E# PIO0/PWU PIO0/ES_K PIO0/ES_T PIO0 PIO URT PIO/E_TX 0 PWR_SW_E# PIO PIO/E_RX +V _OK E_RSMRST# PIO0 % N/.KOhm PIO PIO/SPIKI/TEST_K S_SMK T_IN OR RT_E PI OR.KOhm S_SMT PI % N/ PIO0/SEIO# XK XKI +VS XKO O E_ORNE# 0 PIO/ES# O_PWR_E_UP 0KOhm S_SMK PIO/ETMR0/WT_E# ORN 0KOhm ORN S_SMT 0KOhm PIO/EINT VR O_TP_K PIOKK ORN 0KOhm ORN O_TP_T K0QF +V N/ Version: KOhm ORN T_IN 00KOhm ORN _OK Symbol KOhm ORN PM_SUS# +V 00KOhm ORN PM_SUS# 0KOhm O 0PF/0V S_SMK OTKEY_SW# OR O 0PF/0V S_SMK O OQ O and O lose to OU UMKN 0.UF/V TRO_PU +V N/ T_TS O_SPI_O O_SPI_I O_SPI_K_R O_SPI_S# O_E_TX O_E_RX O_K_XKI O_K_XKO O_K_VR OU_P O_SPI_WP# T_ERN E_PWROK _PROOT# PU_EVEOWN# TRO_PU PM_PWRTN# O_FN0_PWM O_FN0_T O _KOFF# O PM_TOW# SUS_ON 0, VSUS_ON PU_VRON, SUS_ON 0,, PM_EVEOWN#,,,,, _EN# PS-ON 0 SPI_WP# _OP_S# OT OT PM_SUS# PM_SUS# VRM_PWR, VSUS_PWR SPI_K SPI_WP# O_SPI_O SPI_I SPI_K SPI_S#,,,,,,,,, O_SPI_I O_SPI_K_R O_SPI_S# SPI_WP# OQ UMKN PU_EVEOWN# PM_PWRTN# _KOFF# PM_TOW# 0, SUS_ON VSUS_ON, PU_VRON 0,, SUS_ON PM_EVEOWN# _EN# _OP_S# PU_EVEOWN PM_SUS# PM_SUS#, VRM_PWR VSUS_PWR O E_REEN# +V PU_EVEOWN,,,, RT_E 0KOhm OR O 0UF/.V c00 O /00Mhz OR OR O0.UF/.V N/ c00 OT0 OR 0MOhm OKX.Khz 000 O PF/V O PF/V N/ O 0PF/0V O 0PF/0V O 0PF/0V O0 0PF/0V OR KOhm % N/ +V OTKEY_SW# +V 0KOhm OR OT T_TS T_ERN _EN# VSUS_ON 0KOhm 0KOhm 0KOhm 0KOhm OR OR OR OR0 O 0.UF/V <ore esign> E_ENE K0 SUSTek omputer IN. Nicky_heng ustom 0P. Saturday, February 0, 00 ate: Sheet of

25 For Keyboard onnector For Touch-Pad Saturday, February 0, 00 SUSTek omputer IN. K_TP. 0P Nicky_heng <ore esign> ate: Sheet of O_KSO O_KSO0 O_KSO O_KSO O_KSO O_KSO O_KSO O_KSO0 O_KSO O_KSI O_KSO O_KSO O_KSI O_KSI O_KSI0 O_KSI O_KSI O_KSO O_KSI O_KSI O_KSO O_KSO O_KSO O_KSO O_KSO0 O_KSI O_KSI O_KSO O_KSO O_KSO O_KSO O_KSO O_KSO0 O_KSI0 O_KSO O_KSO O_KSO O_KSO O_KSO O_KSO O_KSI O_KSI O_KSI O_KSI O_KSI O_KSO O_KSO O_KSO O_TP_T O_TP_K O_KSI[0..] O_KSO[0..] +V_TP +VS +V_TP PN0Y E 0.UF/V /EMI UF/V 0.UF/V E 0.UF/V /EMI PN0Y PN0Y TOU_P FP_ON_P SM SIE SIE PN0Y /00Mhz K FP_ON_P 00 SM SIE SIE PN0Y E 0.UF/V /EMI

26 +VS O_FN0_T +V ORN.KOM +V_R OR.KOhm % O 0UF/.V +VS ORN.KOM O 0.UF/V ORN.KOM OQ PMS0 E FN_PWM ORN.KOM FN_T O 00PF/0V +VS O 00PF/0V FN SIE SIE Wto_ON_P SM 000 O_FN0_PWM +VS 0.UF/V /EU EU_ON, F_0, F_, F_, F_, F_FRME# _PI_EU 0 SIE 0 SIE FP_ON_P /EU SM 0 <ore esign> Fan_ebug SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

27 +V OR0.KOhm % N/ OU SPI_S# % N/.KOhm SPI_O S# V SPI_O# OR O_SPI_O O O# SPI_WP# WP# K SPI_K IO SPI_I O 0PF/0V WX0VSSI V O 0.UF/V E PF/0V /EMI +V ; 00000F; 00000F <ore esign> SUSTek omputer IN. SPI_ROM Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

28 N_RXN_ N_RXP_ F F U_US- U_US+ U_US- U_US+ U_USO# _Z_SOUT _Z_ITK _Z_SIN0 _Z_SYN _Z_RST# U_M+ U_M- _OP_S# 0 PWR_SW# N_TXN_ N_TXP_ O_PWR_E_UP O E_REEN# O E_ORNE# WN_E T_STE# U_R- U_R+ R_REER_EN# _M_R_REER N_TXN_ N_TXP_ N_RXN_ N_RXP_ 0OM +V I 0.UF/V U_US+ U_US+ U_M+ U_R- U_M- U_US- U_US- U_R+ +VS I 0.UF/V _Z_ITK U_US_R+ URN 0OM 0OM URN MRN 0OM /MER/NO 0OM /MER/NO MRN RRN 0OM URN 0OM RRN U /00Mhz /US U_US_R+ U_M_R+ /00Mhz E PF/0V /EMI U_R-_R U_R+_R _Z_SOUT _Z_SIN0 _Z_SYN _Z_ITK _Z_RST# _M_R_REER _OP_S# R_REER_EN# +V +VS +VS +VSUS +VSUS +V_US 0 UIO_ON SIE 0 SIE U_R+_R U_R-_R O_PWR_E_UP O E_REEN# O E_ORNE# WN_E T_STE# F N_TXN_ N_TXP_ N_RXN_ N_RXP_ PWRTN_E PWR_SW# U_USO# U_M_R- U_M_R+ U /00Mhz /US URN 0OM U_US_R- U_US_R- M /00Mhz U_M_R- U_US_R- U_US_R+ U_US_R- U_US_R SIE SIE U_ON FP_ON_P E 0PF/0V /EMI FP_ON_P SM 0, O_I_E# O_PWR_E_UP YQ UMKN O_I_E# YQ UMKN O_PWR_E_UP PWRTN_E PWR_SW# R00 00KOhm R debug only Scenario Mode attery power is between 00% 0% attery power is between 0% 0% attery power is less than 0% dapater Mode Orange ON Orange linking Slowly Orange linking Quickly attery Mode reen ON reen linking Slowly reen linking Quickly S/S Mode <ore esign> Scenario the same as above OFF U_ON SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

29 0. eta IN _JK_IN T_IN# IN PWR P_ P_ P_ P_ NP_N _POWER_JK_P 0 T T T T T T T T 0.UF/V c00 /00Mhz /00Mhz /00Mhz /00Mhz FOR EMI PSMJ0 0UF/V c0_h UF/V c00_h UF/V c00 /_OK_IN 0.UF/V c00 S_SMK, S_SMT, IN_ T T IN TT_ON P_ P_ 0 TT_ON_P change from IP to SM TPT T TPT T TPT T TPT T R 0.UF/V c00 _SM_K _SM_T _T_IN# 00PF/0V 00PF/0V 0 00PF/0V /00Mhz /00Mhz /00Mhz S_SMK, S_SMT, T_IN# TPT TPT V00MS0 /T V00MS0 /T V00MS0 /T <ore esign> PWR Jack SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

30 +.V +V RN 0OM R 00KOhm +.V_ISR Q UMKN, SUS_ON Q UMKN +VS +VS +VP +.VS +VTTR +0.VS +.VS +V RN 0OM +VS_ISR +VS_ISR +VP_ISR +.VS_ISR Q UMKN +VTTR_ISR +0.VS_ISR Q0 UMKN +.VS_ISR Q UMKN,, SUS_ON RN 0OM RN 0OM RN 0OM RN 0OM RN 0OM Q UMKN Q UMKN Q0 UMKN Q UMKN +V_ +_EIN R00 % +V ISR +_EIN_ISR Q UMKN <ore esign> ischarge Nicky_heng SUSTek omputer IN. 0P. ate: Saturday, February 0, 00 Sheet 0 of RN 0OM R0 00KOhm Q UMKN S Q N00 R0 % Q UMKN

31 <ore esign> S_ON SUSTek omputer IN. Nicky_heng 0P. ate: Saturday, February 0, 00 Sheet of

32 PU Thermal O Saturday, February 0, 00 SUSTek omputer IN. SREW OE&EMI. 0P Nicky_heng <ore esign> ate: Sheet of +VS +VS +VSUS +VS +V_ USIM_PWR +VS _T_SYS +VSUS +VS E 0.UF/V /EMI RTXN NP_N I TN NP_N E 0.UF/V /EMI TN NP_N E 0.UF/V /EMI E 0.UF/V I TN NP_N E 0.UF/V /EMI E 0.UF/V /EMI N NP_N E 0.UF/V E 0.UF/V /EMI E 0.UF/V /EMI E0 0.UF/V /EMI E 0.UF/V /EMI E 0.UF/V /EMI N NP_N 00N E0 0.UF/V /EMI E 0.UF/V /EMI 0 TN NP_N E 0.UF/V /EMI E 0.UF/V /EMI E 0.UF/V /EMI E 0.UF/V /EMI E 0.UF/V /EMI RTXN NP_N E 0.UF/V /EMI 00N TN NP_N E 0.UF/V /EMI E 0.UF/V /EMI O0XO0XN

33 daptor /_OK_IN 0W(V/.) EM0 _T_SYS M :EM0N0V :EM0N0V T T SP/.V/ Switching P RP_U_0 _EN# S_SMK S_SMT _OK SWIT EM0P0 _T_SYS Switch inear _EN# S_SMK VSUS_ON RT0*/ :EM0N0V :EM0N0V +VSUS +VSUS (./0.) urrent flow S_SMT SUS_ON EM0N0V +VS (0./0.) Signal E VSUS_ON +V UP +V (0.0/0.00) evice SUS_ON SUS_ON +VSUS (./.) PU_VRON VSUS_PWR VRM_PWR VSUS_ON RT0*/ :EM0N0V :RJK0 +VSUS SUS_ON EM0N0V VP_PWR MP +0.V(./0. ) +VS&+VUS (.0/.) _OK NE VP VP_PWR +VP (./0. ) PU_VRON VI(...0) PM_PRSPVR NE +.V +.V (.0/.) SUS_ON PU PSI# VP_PWR EM0N0V +.VS (0./0.) K_EN# UP +VTT_R(0./0.) SUS_ON UP0 +.VS (./0.) PU_VRON RT :EM0N0V :EM0N0V K_EN# VRM_PWR +VORE (./.) ST version :.0(0//) VI(...0),PM_PRSVR,PSI# _VSS_SENSE,_V_SENSE 0.VS_PWR <ore esign> POWER_FOW SUSTek omputer IN 0P.0 Saturday, February 0, 00 ate: Sheet of

34 S S E P P P_IN_SNU_S PT PT PU TP_P_0 TP_P_0 PR /_OK_IN mohm _T_SYS M PQ P EM0 00PF/0V PR 0KOhm PQ P 0.UF/V Vmid P S TW T PR PJP PJP PR EM0P0V P 00KOhm SORT_PIN SORT_PIN 0KOhm PR 0.UF/V PR Ohm MOhm PQ N00 PR 00KOhm P OK#_0 S _OK# =, attetry Mode P VIN_S PQ _OK# = 0, daptor Mode N00 0 P PR_U_0 P S 0.UF/V P PSE_0 PQ P P 0UF/V 0UF/V EM0N0V P TW P 0.0UF/V P 0.0UF/V P PR PR P PSE_S P0 P 0 /_OK_IN M_VREF UF/0V.U mom P _V 000PF/0V _V PQ PJP EM0N0V SORT_PIN PR 0KOhm PR0 P VIN_0 M_VREF 00KOhm V VIN P T_T_0 P IRS+_ -IN T IN P IN_0 +IN PR P IRS-_ P OK#_0 IN VREF P RT_0 Ohm P INE-_0 OK RT 0 P S_0 P 0 P VTT_0 PR -INE S P JV_0 KOhm J J P VTT_0 OMP TT P PR 0.UF/V.KOhm P PR UF/V PU P KOhm P M 0.UF/V 0.UF/V P 0.UF/V P P IRS+_ 0.UF/V P IRS-_ PR +V 0KOhm PR P0 KOhm 0PF/0V +V PR 0KOhm PR P 00PF/0V P INE-_0 00KOhm P PR0 P 0PF/0V KOhm 0PF/0V P T_T_0 TP_P_0 P VTT_0 PR PT P PQ Vmid 0.UF/V UMKN 0KOhm P 000PF/0V S S P IRS+_ P IRS- OMPI_0 P ST_0 P 0 P PSE_0 P V_0 P 0 0 T OUT X V OUT P ES -INE OUT OUT +IN -IN J OMP OMP 0 P JI_0 P OMPI_0 P OMPV_0 P SNU_S P /00Mhz _T_SYS P /00Mhz PT TP_P_0 T _EN# _EN# = 0, harger Enable _EN# =, harger isable PJP PJP P P SORT_PIN SORT_PIN 0UF/V 0UF/V ontroller Power stage. Inductor Spec:. I/P urrent: I in = Vo*Io/( 0. * Vin) =.. Ripple urrent: I rip =. I spec= pcs I sat=0 I dc =. R=mohm. MOSFET Spec: -side MOSFET: SIN_T_E Rds(ON)= mohm (Vgs=. V) I cont =. (T = ) I peak = 0 (Pause 0 us) -side MOSFET: SIN_T_E Rds(ON)= mohm (Vgs=. V) I cont =. (T = ) I peak = 0 (Pause 0 us) /_OK_IN PR 00KOhm P 0.UF/V P PR_U_0 PQ N00 S PR 00KOhm PR 00KOhm PR 00KOhm _OK PQ N00 S, S_SMK, S_SMT PU V S OUT S OUT UPM +VSUS P V P JV_0 P JI_0 P 0.UF/V +V PR 00KOhm PQ UMKN T_IN# T_IN. Voltage & urrent: +.V@.. Frequency: PR=KOM, Fosc=Kz. OP:. POR: POR ysteresis =0.V V on =.V. Enable Voltage: V =. V. Soft start time: Tss=ms. Phase selection: N/.Inrush urrent: total =0uF I inrush= 0.0 /_OK_IN P0 0.UF/V PR 0KOhm PQ PMS0 PR 0KOhm _V attery harging urrent :.V > Vadj >= 0V ==> Ichg = (Vadj-0.0)/(*Rs) TSE_P# =, Ich=. TSE_P# = 0, Ich=. Input daptor Max. urrent imit : Ilimit_current = (Vadj-0.0) / (*Rs)=.0 Pre-harging Mode : Precharging current =.m Vadj = mv IN Threshold =.V daptor >.V, System Powered by daptor daptor <.V, System Powered by attery attery harging Voltage : Vadj :VREF ==> Vbat =.V /cell.v>vadj>.v ==> Vbat =.V/cell Vadj : ==> Vbat =.0V /cell.v>vadj>.v ==> Vbat = *Vadj attery /cell ell Selection : ES: VREF ==> ells; ES: OPEN ==> ells; ES: ==> ells; VREF =.0V fosc(kz) = 000 / RT (KOhm) Soft start: ts(s) = 0. * S (uf) <ore esign> harger Joy_Zhou SUSTek omputer IN 00P <Revode> Saturday, February 0, 00 ate: Sheet of

35 S S Power Info., PM_PRSPVR P_VORE_V_0 PR Ohm PU RTQW +VS P_VORE_PRSPVR_0 +VS PR PR Ohm.KOhm _VI[0..] PR 0KOhm +VS TP_P_0 TP_P_0 TP_P_0 TP_P_0 TP_P_0 TP_P_0 PT PT PT PT PT PT PT0 TP_P_0 PR.Ohm _VI _VI _VI _VI _VI _VI _VI0 P_VORE_OSET_0 P_VORE_PRSPVR_0 P_VORE_VRON_0 P_VORE_POO_0 P_VORE_KEN#_0 P_VORE_V_0 P_VORE_SOFT_0 P P 0.0UF/V UF/0V P_VORE_R_0 0 VRTT# VI0 VI VI VI VI VI VI NT OSET PRSPVR VRON PU POO KEN# RTQW V SOFT R M MSET VSEN F OMP ISEN_N ISEN 0 P_VORE_VSEN_0 P_VORE_F_0 P_VORE_OMP_0 P_VORE_ISEN_N_0 P_VORE_ISEN_0 OOT UTE PSE P TE PV 0 TON 0 P_VORE_OOT_0 P_VORE 0 P_VORE 0 P_VORE_TON_0 _VI0 _VI _VI _VI _VI _VI _VI P_VORE_IN_S PR P P_VORE_Phase_S U P P 000PF/0V 0.UF/V PJP PJP PQ SORT_PIN P_VORE_Phase_0 EM0N0V _T_SYS PR 00KOhm 0KOhm 0KOhm 0KOhm 0KOhm 0KOhm 0KOhm 0KOhm 0KOhm SORT_PIN +VS P UF/0V PRN PRN PRN PRN PRN PRN PRN PRN +VP PQ EM0N0V P_VORE_SNU_S PR Ohm P 0UF/V P 0UF/V PR KOhm P 0.UF/V PR KOhm P /00Mhz VORE(0.V--.V) MX:. RMS:. PJP SORT_PIN _T_SYS + PE 00UF/.V P 0UF/.V P 0UF/.V P 0UF/.V. I/P urrent: I in = Vo*Io/( 0. * Vin) =0.. Ripple urrent: Iripple=. I spec=. * pcs. ynamic: I peak=. ESR = mohm V =.mv. Frequency: Fsw=0Kz. OP:.. OVP&UVP OVP:V+00mV UVP:V-00mV.oadine: Rdroop=mohm PT0 TP_P_0 P 0UF/.V +VORE K_EN# PR 00KOhm P_VORE_KEN#_0 P PF/0V PR 00KOhm P 00PF/0V PR 0KOhm +VS PR 00KOhm P P P, VRM_PWR PS P_VORE_POO_ PF/0V 000PF/0V 000PF/0V, PU_VRON PR P_VORE_VRON_0 PR0 PJP +VORE +VORE 0.VS_PWR PR Ohm SORT_PIN PR PR Ohm PR +V PQ PMS0 VORE_VSS_SENSE PR VORE_V_SENSE PM_EVEOWN#,,,,, E E PR 0KOhm % P_VORE_F_0 PQ PMS0 PR PR 0KOhm KOhm P 0.UF/V +V KOhm P 0.UF/V PR 0KOhm S PQ N00 PR0 PU_EVEOWN,,,, KOhm P 0.UF/V PM_EVEOWN# PU_EVEOWN Voltage Status VI-0mV Power Saving VI Normal VI+0mV Performance N/ <ore esign> POWER_VORE SUSTeK OMPUTER IN. N Joy_zhou 0P.0 ate: Saturday, February 0, 00 Sheet of

36 PU Power Info. NE-F-Z PR P_.V_V_0 P_.V_M_0 00KOhm PR 0KOhm % PR P KOhm 0.UF/V P_.V_F_0 PR.KOhm PU IN SW SW V SW 0 M SW F ST F EN/SYN NE-F-Z _T_SYS P P_.V_IN_S Irat= /00Mh z P P0 0UF/V 0UF/V P_.V_PSE_S P P_.V_ST_0 P 0.UF/V 000PF/0V PR0 SUS_ON,0 P PR 0.UF/V MOhm PR.KOhm P0 PR 00PF/0V PR Ohm P U +.V=.V(.V--.V) MX:. RMS:. P P UF/.V UF/.V P FSJTP PJP SORT_PIN +.V P UF/.V. I/P urrent: I in = Vo*Io/( 0. * Vin) =.0. Ripple urrent: I rip =. Frequency: Fosc=00Kz. urrent imit: 0.VS@. ropout Voltage: V = 0.V ( Io = ). urrent imit: I limit =. ontinue urrent: I cont =. Power issipation: Rthjc = /W Pd =. W 00.. SUS_ON,0 PM_EVEOWN#,,,,, PU_EVEOWN,,,, PM_EVEOWN# PU_EVEOWN PU_EVEOWN# Voltage Status.0V Power Saving.00V Normal.V Performance +VTTR() +.V +VS +.V P_.V_F_0 PR KOhm P_.V_OV_0 PQ UMKN PR PM_EVEOWN#,,,,, +VTTR mil PU 0 PT PT0 TP_P_ 0 TP_P_0 P P 0UF/.V 0UF/.V UPU PU VIN N N REFIN VNT VOUT N UPU P UF/0V P 0.UF/V PR P_0.VO_VNT_0 0KOhm P0 0.UF/V PR 0KOhm PR P_.V_OV_0 0KOhm PQ UMKN P 0.UF/V P 0.UF/V 00KOhm PR PU_EVEOWN,,,, 00KOhm <ore esign> +.V&VTTR Joy_Zhou SUSTek omputer IN ustom.0 0P Saturday, February 0, 00 ate: Sheet of

37 NE-F-Z,, VP_PWR +VS PU PR 00KOhm r00 PR 0KOhm P_VP_V_0 P_VP_M_0 P_VP_PW_0 PR 0KOhm % P 0.UF/V PR.KOhm 0 PU V M F F IN SW SW SW SW ST EN/SYN NE-F-Z P0 0.UF/V P_VP_IN_S P_VP_PSE_S P_VP_ST_0 P0 0.UF/V PR P0 000PF/0V PU_VRON, PR0 Ohm P 0UF/V PR P 0UF/V P Irat= /00Mhz P FSJTP _T_SYS P U PJP +VP=.0V(0.V--.V) MX:. RMS:0. P UF/.V P 0UF/.V +VP P /00Mhz N/ +0.VS Power Info.. I/P urrent: I in = Vo*Io/( 0. * Vin) =0.. Ripple urrent: I rip =.0 I spec=. pcs. Frequency: Fosc=00Kz. urrent imit: SORT_PIN P_VP_F_ PU_VRON, PR.KOhm PM_EVEOWN#,,,,, PU_EVEOWN,,,, PM_EVEOWN# PU_EVEOWN PU_EVEOWN# Voltage Status 0.V Power Saving.0V Normal.V Performance N/ P_VP_F_0 PR P_VP_OV#_0 0KOhm PQ0 UMKN PR P_VP_OV_0 P 00KOhm 0.UF/V r00 PM_EVEOWN#,,,,, i : Vout =.0V ow : Vout = 0.V PR P_VP_OV#_0 00KOhm P UF/.V P0.KOhm PR 00PF/0V PQ0 UMKN P_VP_OV_0 P 0.UF/V PR0 00KOhm r00 PU_EVEOWN,,,, i : Vout =.V ow : Vout = 0.V <ore esign> +.VS & +.VS SUSTek omputer IN Joy_Zhou 0P.0 ate: Saturday, February 0, 00 Sheet of

38 +VSUS P P 0UF/V /00Mhz P 0.0UF/V P_0.VS_F_0 P 0UF/V P_0.VS_FJP_0 PR.KOhm PU PR P_0.VS_FO_0 F EN/SYN 0 P0 0.UF/V SW SW P_0.VS_S_0 IN IN S V MPQ P_0.VS_IN_S P_0.VS_EN_0 P_0.VS_PSE_S P_0.VS_V_0 +VS PR0.Ohm PR P UF/0V P FSJTP PJP SORT_PIN VP_PWR,, P.U P UF/.V PT TP_P_0 P UF/.V +0.V=0.V(0.V--0.V) MX:. RMS:0. P 0UF/.V +0.VS Power Info.. I/P urrent: I in = Vo*Io/( 0. * Vin) =0.. Ripple urrent: I rip =0. I spec=. * pcs. ynamic: I peak=. ESR= mohm V =.mv PR 0KOhm. Frequency: Fosc=00Kz. urrent imit: 00.. VP_PWR,, PM_EVEOWN#,,,,, PU_EVEOWN,,,, V +VS PR P_0.VS_F_0 PM_EVEOWN# PU_EVEOWN Voltage Status PR 00KOhm S PR0 00KOhm PQ N00 0.VS_PWR.KOhm PQ UMKN P 00KOhm 0.UF/V PR PM_EVEOWN#,,,,, 0.V 0.V 0.0V Power Saving Normal Performance N/ +0.VS PR 0KOhm P 0.UF/V PQ PMS0 E PR 0KOhm PQ UMKN PR0 P 00KOhm 0.UF/V PU_EVEOWN,,,, <ore esign> +.VS & +.VS SUSTek omputer IN Joy_Zhou 0P.0 ate: Saturday, February 0, 00 Sheet of

39 +VS +VS,0, SUS_ON PR 0KOhm PR MOhm P_.VS_EN_0 P_.VS_VIN_S P0 0.UF/V P0 P_.VS_NT_0 UP0U 0UF/.V P 0.UF/V PU POK EN F VIN VOUT NT N P_.VS_F_0 P.KOhm PR0 PR.KOhm 000PF/0V P_.VS_FJP_0 PJP +.VS=.V(.V--.V) MX:00m RMS:0m SORT_PIN P0 0UF/.V +.VS P0 0UF/.V. ropout Voltage: V= 00 mv (Io=). urrent imit: I limit=.. Pd: R thjc = /W Pd =.W PU UP0U 00.. PR P_.VS_OV#_0 P_.VS_F_0,0, SUS_ON,,,,, PM_EVEOWN# PR P_+.VS_OV_0.KOhm P 0.UF/V PQ UMKN 0KOhm,,,,,,,,, PM_EVEOWN# PU_EVEOWN 0 PR P_.VS_OV#_0,,,, PU_EVEOWN PR0 0KOhm P_+.VS_OV_0 P 0.UF/V PQ UMKN KOhm PM_EVEOWN# PU_EVEOWN Voltage.V Status Power Saving.V Normal.V Performance.0V <ore esign> SUSTek omputer IN +.VS & +.VS Joy_Zhou 0P.0 ate: Saturday, February 0, 00 Sheet of

40 _T_SYS athode node PR PU Ref P_VP_F_0 ZNTR_E +V_P PR 0KOM PR 00KOhm For Power atch +V_P +V +V_P +V_RT V. PR 00KOhm PR 00KOhm PR 00KOhm +V_P +V_P T 0 0 PQ UMKN Power atch table : /_OK_IN PR X 0 T P, T P RT0 P_+V_+V_EN_0 +V Mode atch Out atch PWR_SW_E# +V PR 00KOhm PWR_SW# P0 TW V. PR0 00KOhm PQ UMKN PS-ON PR MOhm E PS-ON atch EXPRESS_TE_E# SMRT# P TW /_OK_IN PR0 P_IN PR PR PQ UMKN PR 0-Ohm PQ UMKN V. T_IN PR P T PWR_SW# +V PS-ON? 0ms (min) 0ms (max) 0.UF/V 0.u P PR_U_0 V. 00KOhm PR PR 0KOhm For P power latch <ore esign> 00KOhm PR 0KOhm 0.UF/V V. Power atch River_su SUSTek omputer IN. 0P.0 ate: Saturday, February 0, 00 Sheet 0 of

41 S S S S Power Info. +VSUS. I/P urrent: I in = Vo*Io/( 0. * Vin) =.0 PU _T_SYS RT0QW +V P_+VSUS_+VSUS_IN_S PE P0 UF/0V PR c00 P_+V_+ V_EN_0 0 P 0UF/V P 00KOh m UF/V P_+V_+ V_EN_0 +V PQ EM0N0V P P_+VSUS_+VSUS_R EF_0 0UF/.V +VSUS=V(.V--V) P PR UF/0V MX:. RMS:. c00 PJP0 P SORT_PIN P PR PJP 00PF/V 00PF/0V 0KOhm PR SORT_PIN P_+VSUS_YP_ 0 P_+VSUS_F _0 PJP0 PR P_+VSUS _VO_0 YP F 0 P_+VSUS_IIM_ 0 P_+VSUS_F _0 VOUT PU IIM P_+VSUS _VO_0.KOhm PR P_+VSUS_IIM_ 0 F VOUT 0 P_+VSUS_+VSUS_SK IPSE_0 SORT_PIN.KO M P_+VSUS_+VSUS _P_0 IIM SKIP# P_+VSUS_+VSUS _P_0 P_+VSUS_E N_0 POO RT0QW POO P_+VSUS_E N_0 +VSUS P PJP KOhm P_+VSUS 0 EN EN P_+VSUS 0 KOhm PR P_+VSUS_PSE_ SPE P_+VSUS_P SE_0 UTE UTE P_+VSUS_P SE_0 PSE PSE.U SORT_PIN P0 P PR PR P 0.UF/V 0KOhm 0KOh m PR PR +V P + PE 000PF/0V P 0.UF/V 0.UF/V PQ 0KOh m 00UF/.V 0.UF/V c00 00KOhm RJK0P-00-J0 c00 P_+VSU S_OOT_0 P_+VSU S_OOT_0 VSUS_PWR PR Ohm P_+VSUS_SNU_S P_+VSUS 0 P_SUS_SEF_0 P_+VSUS_+VSUS_TON_0 N O VIN N ENO V TON REF OOT TE PV SEF P TE OOT 0 PR PJP SORT_PIN P 0.UF/V PQ P_+VSUS_+VSUS_IN_S PE EM0N 0V PJP PJP SORT_PIN SORT_PIN P P_+VSUS_PSE_S PE.U PQ EM0N0V P_+VSUS_SNU_S P0 0UF/V P 000PF/0V c00 PR Ohm r0_h P0 Irat= /0 0Mhz P _T_SYS Irat= /0 0Mhz +VSUS=.V(.V--.V) MX:. RMS:0. +VSUS P P P P P0 0.UF/V UF/.V c00 UF/.V c00 UF/.V c00 UF/.V c00. Ripple urrent: I rip =. I spec=. pcs. Frequency: fosc=00kz. OP: Iocp= Power Info. +VSUS. I/P urrent: I in = Vo*Io/( 0. * Vin) =.. Ripple urrent: I rip =. I spec=. pcs. Frequency: fosc=kz. OP: Iocp=. +VSUS +VSUS P 0.UF/V P 0.UF/V +V P P PR TSW 0.UF/V c00 P_+VSUS 0 P P0 TSW 0.UF/V c00 P PR 00KOh m PF/0V VSUS_ON PT TP_ P_0 P UF/0V c00 P 0.UF/V P_+VSUS 0 PR PT TP _P_0 VSUS_ON PR0 P 0.UF/V MOhm P_+VSU S_OOT_0 P_+VSU S_OOT_0 +VSUS P TW TP_ P_0 TP_ P_0 PT PT +VSUS TP_ P_0 TP_ P_0 PT PT +VSUS TP_ P_0 TP_ P_0 PT PT TP_ P_0 TP_ P_0 PT PT0 Power Info. +V. ropout Voltage: V= 0mV (Io=00m ). urrent imit: I limit= 0m. Pd: R thjc = /W Pd =0.W PR KOhm 00..,,,,, PM_EVE OWN# VSUS_PWR VSUS_ON 0 P_+V_+ V_EN_0 +V +V +V_E / 00m i : Vout =.V ow : Vout =.V PR0 00KOh m,,,,, PM_EVE OWN# P_VSUS_VSUS_ OV_0 P0 0.UF/V PR0.KOhm P_VSUS_O V#_0 P_+VSUS_F _0 PQ UMKN i : Vout =.0V ow : Vout =.V P_VSUS_VSUS_ OV_0 PR0 0KOh m P_VSUS_O V#_0 P_+VSUS_F _0 PQ UMKN P UF/0V PR0 00KOhm PU P_V-E_EN_ 0 EN N/SS/F VIN VOUT P0 UPM UF/V P 0PF/0V PR.KOhm PJP P_V-E_F_ 0 P_V-E_FJP_ 0 P_V-E _S SORT_PIN PR 0KOhm P 0UF/.V PT TP_ P_0 N/ +V +VSUS_EVEOWN +VSUS_EVEOWN <ore esign> Power_+SUS&+VSUS&+VSUS SUSTek omputer IN Joy_Zhou 0P.0 Saturday, February 0, 00 ate: Sheet of

42 +V PT TP_P_0 +.V Shape +VSUS PQ S Shape PT TP_P_0 +.VS PR 00KOhm PR0 00KOhm EM0N0V P.UF/.V N/ c00,0, SUS_ON PR P_.VS_ENR_0 PQ UMKN P_.VS_EN_0 P 0.0UF/V,, VP_PWR PR 0KOhm P 0.UF/V PQ UMKN PT TP_P_0 PT0 TP_P_0 PT TP_P_0 PT TP_P_0,0, SUS_ON PRN 00KOhm PRN 00KOhm P 0.UF/V +V +VSUS P_VSPWR_ENR_0 PRN 00KOhm PQ UMKN Shape +VSUS PR 00KOhm PQ UMKN PQ0 S EM0N0V P_VSPWR_EN_0 Shape P 0.0UF/V +VS P.UF/.V N/ c00,0, SUS_ON PR 0KOhm P 0.UF/V +V +VSUS P_VSPWR_ENR_0 PRN 00KOhm PQ UMKN PQ S Shape Shape +VSUS EM0N0V PR 00KOhm P_VSPWR_EN_0 PQ UMKN P 0.0UF/V P.UF/.V N/ c00 P /00Mhz +VS +V_US 00.. SUS_ON,0, VP_PWR,, <ore esign> load switch Joy_Zhou SUSTek omputer IN 0P.0 Saturday, February 0, 00 ate: Sheet of