Why op amps? Operational Amplifiers PREREQUISITES INTRODUCTION OUTLINE INTRODUCTION INTRODUCTION SIGNALS ENERGY DOMAINS (*)

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1 PEEQUIITE Operational mplifiers Christian Falconi, rnaldo D mico Uniersity of Tor ergata, ome, Italy This short course will be accessible to an interdisciplinary audience (engineers, physicists, material scientists, chemists, biologists, ). tudents are encouraged to reiew the following basic concepts BEFOE attending the course: - Kirchoff oltage law - Kirchoff current law -Ohm law OUTLINE INTODUCTION Introduction Nullor Why op amps? Operational amplifiers (negatie feedback) Op amp circuits Errors of op amp circuits Electronic interfaces for sensors and actuators INTODUCTION INTODUCTION IGNL ENEGY DOMIN (*) adiant Mechanical Thermal ensors transduce mechanical, thermal, magnetic, radiant, or chemical signals into electrical signals. ENO Chemical Magnetic Electrical Transducers conert energy from one energy domain to another. ENIONMENT ELECTONIC YTEM (*). Middelhoeck,.. udet, P. J. French, ilicon ensors

2 INTODUCTION INTODUCTION ENO ENO adiant adiant T ( ) Mechanical Thermal ( L) Mechanical Thermal Chemical Magnetic Chemical Magnetic Electrical Electrical In general, we need to accurately measure signals in the electrical domain INTODUCTION INTODUCTION ctuators transduce electrical signals into mechanical, thermal, magnetic, radiant, or chemical signals. CTUTO adiant CTUTO Mechanical Thermal Chemical Magnetic Electrical ENIONMENT ELECTONIC YTEM INTODUCTION INTODUCTION MT YTEM Temperature regulation ir bag B moke detectors, fire alarm systems, Intrusion alarm systems Telemedicine Electronic noses and electronic tongues ENO CTUTO ssuming that the transduction relation is known (CLIBTION ), we need to accurately measure or control signals in the electrical domain. Low frequency Op amps 2

3 INTODUCTION INTODUCTION ccuracy? x in y out, ideal xin Ideal ystem eal ystem yout [ ] y = T x E = y y out, ideal in out out, ideal ccuracy Errors depend on frequency, temperature, supply oltages, input signals, Howeer, for a gien application, we may compare the accuracy of two systems. INTODUCTION INTODUCTION Linear circuits? C C 2 0 Electronic deices are strongly non-linear! INTODUCTION INTODUCTION i i Linear approximation i i I 0 (, ) Q= I 0 0 Quiescent point 0 Circuit translation? 3

4 INTODUCTION INTODUCTION i ( i) TYLO POLYNOMIL (first order) ( I0 ) ( I0) ( i I0) = i ( I0) ( I0) = ( I0) I0 i= i i = i X i( ) TYLO POLYNOMIL (first order) i ( 0 ) i i( 0) ( 0) = i ( 0) i ( 0) = i ( 0) 0 = = I X i i X THEENIN circuit I X NOTON circuit INTODUCTION INTODUCTION C C 2 0 What must be done? imilarly, more complex networks may be linearized. Therefore, we will only consider linear circuits. oltage mplifiers INTODUCTION INTODUCTION oltage mplifiers Current mplifiers -i conerters i- conerters Current references Linear circuits ource i mplifier i 2 Load L oltage references Instrumentation amplifiers ource and load may be linearized. 4

5 INTODUCTION oltage mplifiers INTODUCTION oltage mplifiers i i 2 LOD L i i 2 LOD L Goal LOD = Theenin oltage is zero!!! independently on source and load resistors INTODUCTION INTODUCTION oltage mplifiers Linearized mplifier oltage mplifiers in out LOD Goal LOD = in in LOD = in LOD LOD in out LOD in LOD in =, LOD = in in out LOD in LOD LOD = in out LOD in out >> << LOD in = What about??? out = LOD INTODUCTION oltage mplifiers NULLO Goal LOD = = in LOD LOD in out LOD Nullor: the ideal component in out >> = << LOD ( = ) ( = ) Parameters of actie deices suffer for large spread and drift. 5

6 NULLO NULLO OLTGE MPLIFIE i i i =0 0 2 LOD = 0 NULL POT NULLO OLTGE MPLIFIE NULLO OLTGE MPLIFIE i =0 0 LOD i =0 0 LOD 2 2 NULLO OLTGE MPLIFIE NULLO OLTGE MPLIFIE 0 LOD 0 LOD 2 i = 2 i = 6

7 NULLO OLTGE MPLIFIE NULLO OLTGE MPLIFIE 0 LOD 0 LOD 2 i = 2 i = 2 LOD = 2 = NULLO OLTGE MPLIFIE NULLO OLTGE MPLIFIE 2 LOD = 2 LOD = Goal LOD = independently on source and load resistors Goal LOD 2 = = does not contain parameters of actie deices (which suffer for large spread and drift) NULLO OLTGE MPLIFIE NULLO -i CONETE 2 LOD = Goal LOD = i =0 0 LOD 2 = elatie error in ICs 0. % = 0 α( T T0), 2 = 20 α( T T0) [ ] ( T T ) α 2 = = = = 0 α ( T T0 )

8 NULLO -i CONETE NULLO -i CONETE i =0 0 LOD i =0 0 LOD i = NULLO -i CONETE NULLO -i CONETE i =0 0 LOD i =0 0 LOD i = i = i = i = G = LOD Output current does not depend on source and load resistors. G does not depend on parameters of actie deices. NULLO????? NULLO????? = 0 = 0 0 LOD i =0 0 LOD 8

9 NULLO????? NULLO????? = = 0 = = 0 =??? i =0 0 LOD i =0 0 LOD NULLO????? NULLO = i =0 = 0 0??? =??? LOD Practical implementations of nullor must comprise a path connecting the input and the output ports (FEEDBCK path). i i = 0-2 NULL POT Input terminals are interchangeable!!! GOUNDED NULLO OP MP (NEGTIE FEEDBCK) i i Mimicking nullors = 0 9

10 OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) i i i i i = 0 = 0 How can we implement a NULL POT? = 0 i??? OP MP (NEGTIE FEEDBCK) i 2 Practical implementations of nullor must comprise a path connecting the input and the output ports (FEEDBCK path). OP MP (NEGTIE FEEDBCK) X s - is the amplifier (spread, drift, ) X o is the feedback path (passie components) OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) X X s X i o - X f X = X = X f o i X = X = X ( ) X = X X = X X X = X i s f s i i s o i s Xo = Xs X s - X o Xo = Xs X s 0

11 OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) X s - Xo = Xs X s - X = X = X f s s Xo = Xs Xo = Xs X s Xo = Xs X s OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) Xe = Xs Xs = 0 - EO IGNL - IT I NULLO!!! X s - X = X = X f s s Xo = Xs X s - X o Xo = Xs X s Xo = Xs X o Xs OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) X s - X o CONCLUION ctie deices (and, therefore, amplifiers) suffer for large spread and drift. Circuit translation 2 o = 2 = = 2 o s s In a NEGTIE feedback system, if Xo Xs i.e. the closed loop accuracy only depends on accuracy of feedback elements, POIDED THT THE MPLIFIE GIN I EY LGE

12 OP MP (NEGTIE FEEDBCK) WHY NOT POITIE FEEDBCK??? X s - X o X s - X i X o X f Circuit translation o X = X = X f o i X = X = X ( ) X = X X = X X X = X i s f s i i s o i s 2 n (ideal) operational amplifier is a differential amplifier with ery high (infinite) differential gain and ery small (zero) input currents. se X = X X = X o s s s solution exists!!! WHY NOT POITIE FEEDBCK??? OP MP (NEGTIE FEEDBCK) D OUT = D Negatie feedback!!! Positie feedback!!! D s we hae seen, the differential gain,, must be ery high (e.g. 0 6 ) OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) CC = 5 CC = 5 D D OUT = D D D = 5 CC The output oltage MUT be included (at DC) between the two supply oltage rails. = 5 CC 2

13 OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) CC = 5 CC = 5 D D OUT = D OUT = D D D = 5 CC CC 5 = = 5µ 6 0 = 5 CC CC 5 = = 5µ 6 0 D OP MP (NEGTIE FEEDBCK) D OP MP (NEGTIE FEEDBCK) NULLO D D 5µ 0 NULLO NEGTIE TUTION D POITIE TUTION OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) Let us assume POITIE TUTION OUT = 5 Let us assume POITIE TUTION OUT = 5 = 00 m = 00 m = 9 2 = 9 2 ( =.5 ) ( > = 00 ) ( << 0) m d NEGTIE TUTION!!! 3

14 D OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) Let us assume NEGTIE TUTION OUT = 5 = 00 m = 9 2 D NEGTIE TUTION POITIE TUTION OP MP (NEGTIE FEEDBCK) Let us assume NEGTIE TUTION OUT = 5 D OP MP (NEGTIE FEEDBCK) = 00 m = 9 2 D NEGTIE TUTION POITIE TUTION ( =.5 ) ( < = 00 ) ( >> 0) m d POITIE TUTION!!! D OP MP (NEGTIE FEEDBCK) NULLO The only possible solution (negatie feedback) OP MP (NEGTIE FEEDBCK) = 00 m D ( 00m) = m i = = 4

15 OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) = 00 m = 00 m = m i = = 00 ( m) = m i = = 00 ( m) 00m OUT = ( 2) = 00 m*0 = OP MP (NEGTIE FEEDBCK) D OP MP (NEGTIE FEEDBCK) 5 5 NULLO OUT = 9 2 i = = ( ) OUT = ( 2) = *0 NEGTIE TUTION D POITIE TUTION ( = ) ( = = ) 4.2 0* 42??? OUT WHY NOT POITIE FEEDBCK??? WHY NOT POITIE FEEDBCK??? X s - X i X o X f Let us assume NEGTIE TUTION = 00 m o = 5 = 00 m = 9 2 = 9 2 5

16 WHY NOT POITIE FEEDBCK??? Let us assume NEGTIE TUTION = 00 m o = 5 D WHY NOT POITIE FEEDBCK??? = 9 2 D ( =.5 ) ( < = 00 ) ( << 0) m d NEGTIE TUTION NEGTIE TUTION WHY NOT POITIE FEEDBCK??? WHY NOT POITIE FEEDBCK??? X s - X i X o = 00 m X f Let us assume POITIE TUTION = 00 m = 9 2 o = 5 = 9 2 WHY NOT POITIE FEEDBCK??? Let us assume POITIE TUTION = 00 m o = 5 D WHY NOT POITIE FEEDBCK??? POITIE TUTION = 9 2 D ( =.5 ) ( > = 00 ) ( >> 0) m d POITIE TUTION 6

17 OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) UMMY Nullors would allow the design of ideal linear circuits (oltage amplifiers, ) Nullors may not exist. = 9 2 = 9 2 ny practical approximation of a nullor MUT contain a feedback path. Operational amplifiers permit to approximate a (grounded) nullor because: - the current at the input port is almost zero - the oltage at the input port is almost zero FEEDBCK MUT BE NEGTIE Input terminals are NOT interchangeable!!! WHY? Negatie feedback keeps the output oltage out of the saturation regions. The differential gain is so high that, if the output oltage is in the linear region, d 0 00m OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) 00m 200m CC = m 2 = 9 2 CC = 5 = 9 2 CC = 5 D OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) 00m 200m 2 00m 200m 3 = 9 2 = 9 2 TBLE YTEM 7

18 OP MP (NEGTIE FEEDBCK) OP MP (NEGTIE FEEDBCK) 00m 200m 3 00m 200m 3 CC = 9 2 = m 300m UNTBLE YTEM Oscillations are due to feedback!!! Feedback DOE NOT improe stability Feedback stabilizes the closed loop gain against parameter ariations, thermal drift, OP MP CICUIT nalysis and design of op amp circuits OP MP CICUIT. NON INETING OLTGE MPLIFIE 2. Make sure feedback is negatie 2. s a first approximation, replace the op amp with a grounded nullor D = 0 i = ( ) OUT = 2 OP MP CICUIT. NON INETING OLTGE MPLIFIE OP MP CICUIT. NON INETING OLTGE MPLIFIE i =0 LOD LOD 2 2 ( ) OUT = 2 Ideally the output oltage does not depend on source and load resistors. 8

19 2. OLTGE BUFFE OP MP CICUIT 2. OLTGE BUFFE OP MP CICUIT LOD 2 0 = OUT ( ) ( ) = 2 OUT LOD = Ideally the output oltage does not depend on source and load resistors. OP MP CICUIT OP MP CICUIT 3. INETING OLTGE MPLIFIE 3. INETING OLTGE MPLIFIE 2 2 LOD LOD OUT = 2 OP MP CICUIT 3. INETING OLTGE MPLIFIE OP MP CICUIT 4. DIFFEENTIL MPLIFIE 2 B 0 2 LOD 2 OUT = 2 B LOD The output oltage depends on the source resistor!!! For high accuracy, use this circuit only if >> 9

20 OP MP CICUIT 4. DIFFEENTIL MPLIFIE OP MP CICUIT 4. DIFFEENTIL MPLIFIE 2 = 0 B B B B B LOD B LOD B B B B OP MP CICUIT OP MP CICUIT 4. DIFFEENTIL MPLIFIE B B 4. DIFFEENTIL MPLIFIE B B B B B = B B B B B B B B LOD B LOD OP MP CICUIT 4. DIFFEENTIL MPLIFIE OP MP CICUIT 4. DIFFEENTIL MPLIFIE B 0 B 2 B LOD = 0 2 B LOD 0 20

21 OP MP CICUIT OP MP CICUIT 4. DIFFEENTIL MPLIFIE 4. DIFFEENTIL MPLIFIE = B B 2 2 B B LOD 2 B LOD 0 = = ( ) B B B OUT 2 2 OP MP CICUIT 4. DIFFEENTIL MPLIFIE OP MP CICUIT 4. DIFFEENTIL MPLIFIE ( ) = OUT 2 B 2 B 2 Why not a simple op amp? Op amp are natural differential amplifiers B LOD DNTGE OF NEGTIE FEEDBCK!!! The output oltage depends on the source resistors!!! For high accuracy, use this circuit only if,2 >> OP MP CICUIT 5. INTUMENTTION MPLIFIE n instrumentation amplifier is a differential amplifier with ery small input currents. OP MP CICUIT 5. INTUMENTTION MPLIFIE 2 2 independently on 2 B It is extremely useful in electronic interfaces; as an example, it is used in the measurement of ery small resistances (4-wires measurements, see later). 2 I Instrumentation amplifier B LOD = 0 independently on 2

22 OP MP CICUIT 5. INTUMENTTION MPLIFIE OP MP CICUIT 6. CUENT EFEENCE B EF EF M 0 B LOD 2 ( ) = OUT 2 B EF 2 2 LOD independently on, 2 OP MP CICUIT OP MP CICUIT 6. CUENT EFEENCE 6. CUENT EFEENCE EF EF M 0 EF EF M 0 2 EF 2 EF = EF = EF 2 EF 2 2 EF 2 2 EF 2 2 LOD EF 2 2 EF 2 2 LOD OP MP CICUIT EO OF OP MP CICUIT 6. CUENT EFEENCE EF EF M 0 EF EF 2 What about real op amps? 2 EF 2 2 EF 2 2 LOD / 2 must be accurate EF must be accurate 22

23 EO OF OP MP CICUIT EO OF OP MP CICUIT Input currents LOD CC DD 2 ( ) Ideally, OUT = 2 In practice, real op amps introduce errors. Q Q 2 I 0 M M 2 I 0 EO OF OP MP CICUIT Input currents EO OF OP MP CICUIT Input currents i 0 LOD i 0 2 LOD 2 EO OF OP MP CICUIT Input currents (model) Op amp with non zero (constant) input currents EO OF OP MP CICUIT Offset oltages I P CC DD Q Q 2 M M 2 Op amp with zero input currents I 0 I 0 I N 23

24 EO OF OP MP CICUIT EO OF OP MP CICUIT Offset oltages NULLO 5 Offset oltages NULLO 5 2 LOD 2 LOD 5 D = OFF, OUT OFF, IN Output offset oltage OFF, OUT 5 Input offset oltage OFF, IN D EO OF OP MP CICUIT EO OF OP MP CICUIT Offset oltages NULLO 5 Offset oltages (model) NULLO 5 2 LOD In the nullor region, (, ) = OUT d OFF IN Often, the op amp is in saturation for = 0. Furthermore, the gain is not accurate It is therefore better to use the input offset oltage. 5 d D Input offset oltage OFF, IN 5 OFF, IN D EO OF OP MP CICUIT EO OF OP MP CICUIT Offset oltages (model) In the nullor region, = (, ) = OUT d OFF IN (, ) OUT d OFF IN d Op amp with gain, input offset oltage OFF,IN Offset oltages (model) For simplicity we ignore all op amp non idealities BUT the input offset oltage. OFF, IN (, ) = OUT d OFF IN 2 d OFF, IN (Offset-free) Op amp with gain and zero offset oltage 24

25 EO OF OP MP CICUIT Offset oltages (model) Let us consider an infinite differential gain,. EO OF OP MP CICUIT Offset oltages (model) Let us consider an infinite differential gain,. OFF, IN OFF, IN 2 OFF, IN 2 OFF, IN OFF, IN EO OF OP MP CICUIT Offset oltages (model) Let us consider an infinite differential gain,. EO OF OP MP CICUIT Offset oltages (model) Let us consider an infinite differential gain,. OFF, IN ( 2) = ( 2) OFF, IN OUT OUT, ideal = 2 ( ) OFF, IN OFF, IN OFF, IN 2 OFF, IN E = OUT OUT, ideal = 2 ( ) EO OF OP MP CICUIT EO OF OP MP CICUIT Offset oltages (model) (bad) idea for offset-free amplification Offset oltages (model) (, ) = OUT d OFF IN d OFF, IN (Offset-free) Op amp with gain and zero offset oltage OFF, IN 2 This terminal does not exist (model)!!! 25

26 EO OF OP MP CICUIT EO OF OP MP CICUIT Finite gain Finite gain NULLO 5 2 LOD 6 = 0 5µ 5µ D 5 EO OF OP MP CICUIT EO OF OP MP CICUIT Finite gain NULLO 5 CM (Common Mode ejection atio) P (Power upply ejection atio) 2 LOD 5 = 0 Output impedance 50µ 50µ D Input differential mode impedance Input common mode impedance Input oltage noise Input current noise 5 ELECTONIC INTEFCE Electronic interfaces for sensors, actuators, and microsystems 26

27 ELECTONIC INTEFCE ELECTONIC INTEFCE Measurement of low resistances Measurement of low resistances simple circuit for measuring the resistance X. DD I 0 Measurement of low resistances DC X 2 nalog to Digital Conerter ELECTONIC INTEFCE Measurement of low resistances If the resistance X is ery small, the (parasitic) resistances of the wires may not be neglected. ELECTONIC INTEFCE Measurement of low resistances olution: 4-wires measurement (or Kelin measurement) DD I 0 2 ( P X ) I0 DD I 0 P2 P3 DC P P2 I P X DC X 2 P4 P3 ELECTONIC INTEFCE Measurement of low resistances olution: 4-wires measurement (or Kelin measurement) ELECTONIC INTEFCE Measurement of low resistances olution: 4-wires measurement (or Kelin measurement) DD DD I 0 I 0 P X I 0 P2 I DC ( P X ) I 4 0 P4I0 P X I 0 P2 I DC P4 P3 P4 P3 27

28 ELECTONIC INTEFCE Measurement of low resistances olution: 4-wires measurement (or Kelin measurement) ELECTONIC INTEFCE Measurement of low resistances olution: 4-wires measurement (or Kelin measurement) DD I 0 ( P X ) I 4 0 DD I 0 ( P X ) I 4 0 I X 0 ( P X ) I 4 0 P I 0 P2 I ( P X ) I 4 0 P I 0 P2 I P4I0 X DC P4I0 X DC P4 P3 P4 P3 P4I0 P4I0 ELECTONIC INTEFCE ELECTONIC INTEFCE Measurement of high resistances Measurement of high resistances simple circuit for measuring the resistance X. DD I 0 X DC 2 nalog to Digital Conerter ELECTONIC INTEFCE Measurement of high resistances If the resistance X is ery high, the (parasitic) resistances to ground may not be neglected. ELECTONIC INTEFCE Measurement of high resistances olution DD I 0 2 ( P // X ) I0 0 0 F X P DC 0 P P2 DC X 2 28

29 ELECTONIC INTEFCE Measurement of high resistances ELECTONIC INTEFCE Measurement of high resistances olution olution 0 0 F 0 0 F X X 0 P P2 DC 0 P 0 X P2 DC ELECTONIC INTEFCE ELECTONIC INTEFCE Measurement of high resistances olution 0 0 F F 0 X Electronic interfaces for smart sensors and microsystems X 0 P 0 X P2 DC ELECTONIC INTEFCE ELECTONIC INTEFCE utomatic compensation techniques Integrated MT ENO High performance (accuracy) User friendly (analog digital) Low cost (CMO, no trimming, ) Low oltage low power - Chopper circuits (CHCs) = Dynamic element matching (DEMCs) - utozero circuits (ZCs) Design guidelines for high accuracy Input offset and /f noise oltages Finite gain of the op amp ZCs Compensation of the input offset and /f noise oltages. Compensation of the finite op amp gain (deep sub-micron CMO processes). Input offset and /f noise oltages CHCs = DEMCs C. C. Enz, G. C. Temes, Proceedings of the IEEE, ol. 84, no., pp , 996. Bakker, J. Huijsing, High-ccuracy CMO smart temperature sensors, Kluwer,

30 ELECTONIC INTEFCE utomatic compensation techniques - Chopper circuits (CHCs) - Dynamic element matching circuits (DEMCs) - utozero circuits (ZCs) Phase I (MPLING) IN ELECTONIC INTEFCE: UTOZEO ( t) off noise ( t) ZCs Phase II (COMPENTION) noise ( t) off CHCs DEMCs IN ( t) C. Falconi, Ph. D. Thesis, Uniersity of Tor ergata, ome, Italy, December 200 C. Falconi, C. Di Natale,. D mico, M. Faccio, Electronic interface for the accurate read-out of resistie sensors in low oltage-low power integrated systems, ensors and ctuators, 7 (2005) pp C. Falconi,. D'mico, M. Faccio, "Design of accurate analog circuits for low oltage low power CMO systems", IEEE IC 2003 ( ) out, I = off noise tx t = ( ) ( ) ( ) ( ),, ( ) t t out, II IN x off noise x t t t t noise x noise x out II out I IN x IN ELECTONIC INTEFCE: UTOZEO (3 IGNL) () t () t off noise ELECTONIC INTEFCE: UTOZEO UTOZEO = (MPLING COMPENTION) The gain error may be sampled and compensated EF EF ( ) ( ) out, I = IN tx off noise t x ( ) out, II = off noise tx t = ( 2 ) ( 2 ) ( ) ( ) t t out, III EF off noise x t t t t t noise x noise x noise x ( t ) out, III out, II out, I out, II IN x EF Thermal noise is undersampled ELECTONIC INTEFCE: CHOPPE ELECTONIC INTEFCE: CHOPPE off off in out in out = in = = 2 in = 3 in off ( ) ( ) = 4 in off = = 5 4 in off = in = = 2 in = 3 in off ( ) ( ) = 4 in off = = 5 4 in off = ( ) ( ) = 2 out in off in off in 30

31 ELECTONIC INTEFCE: CHOPPE ELECTONIC INTEFCE: CHOPPE off in out CMO CMO ELECTONIC INTEFCE: CHOPPE ELECTONIC INTEFCE: CHOPPE Taken from: nton Bakker, High-ccuracy CMO mart Temperature ensors, Ph.D. Thesis, Delft Uniersity, pril 2000 Taken from: nton Bakker, High-ccuracy CMO mart Temperature ensors, Ph.D. Thesis, Delft Uniersity, pril 2000 ELECTONIC INTEFCE: DYNMIC ELEMENT MTCHING ELECTONIC INTEFCE: DYNMIC ELEMENT MTCHING EF EF Errors due to mismatch among two or more deices (, B, C, ) may be reduced by dynamically interchanging those deices (, B, C, ) and considering the time aeraged output alue. 2 OUT, OUT, B 2 B ( ) = δ 2 Interchange deices switch CMO ( δ ) ( δ ) δ = = = 2 2 δ 2 OUT, EF EF EF 2 = = = 2 2 δ OUT, B EF EF EF 2 ( δ ) EF δ OUT = ( OUT, OUT, B ) = = δ 2 EF 3

32 ELECTONIC INTEFCE: DYNMIC ELEMENT MTCHING BNDGP OLTGE EFEENCE CMO DEM = Chopper??? Folded cascode op amp DEM BNDGP OLTGE EFEENCE BNDGP OLTGE EFEENCE Folded cascode op amp Dynamic matching of the input transistors BNDGP OLTGE EFEENCE ELECTONIC INTEFCE - Chopper circuits (CHCs) - Dynamic element matching (DEMCs) - utozero circuits (ZCs) ZCs ZCs CHCs = DEMCs CHCs DEMCs Dynamic matching of all critical transistor pairs 32

33 ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) If we assume to hae two indentical op amps, the errors introduced by one op amp may be cancelled by the matched errors introduced by the other op amp. IDENTICL OP MP??? MIMTCH IN E DYNMIC OP MP MTCHING ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) IN E E IN E IN 2E IN 2E ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) IN IN IN E E IN E IN 2E Finite gain errors IN 2E 33

34 ELECTONIC INTEFCE (DYNMIC OP MP MTCHING) ELECTONIC INTEFCE (OP MP TUNING) IN IN IN E IN E IN 2E IN 2E Finite gain errors Matched input offset oltages Matched ariations of the input offset oltages DD off, in = P Finite gain errors Matched input offset oltages Matched ariations of the input offset oltages DD off, in = P ELECTONIC INTEFCE utomatic compensation techniques - Chopper circuits (CHCs) - Dynamic element matching circuits (DEMCs) - utozero circuits (ZCs) Design guidelines for high accuracy Temperature control system for Lab on Chip applications ZCs CHCs DEMCs DOMCs F. Lo Castro, C. Falconi,. D mico Input offset and /f noise oltages Input offset and /f noise oltages Finite op amp gain bstract Lab-on-Chip is a disposable, standalone, single-chip deice for DN amplification and detection. For correct operations the temperature of the chip must be properly controlled. Here we present a low cost user-friendly system for the temperature control of a Lab-on-Chip deeloped by T Microelectronics. The method for DN amplification (Polymerase Chain eaction, PC) requires that a gien DN sequence is passed through proper thermal cycles. T Microelectronics has deeloped a Lab-on-Chip which comprises integrated microchannels, temperature sensors (made by alluminum resistors), heaters (made by polysilicon resistors) and electrodes (required for the DN detection). lthough in principle the electronic circuitry for the temperature control could be integrated in the Lab-on-Chip, this would significantly increase the costs of the special process used to fabricate the microchannels. It is therefore necessary an external temperature control system which reads out the temperature sensors and dries the heating and the cooling; the maximum allowed temperature error is ±0.5 C; both the cooling and the heating rates must be larger than 0 C/s. 34

35 Thermal Σ modulation is used for temperature control. In order to obtain the required accuracy, the sensors resistances are read out using a 4 wires measurements. The inaccuracies of the current and oltage references used for the temperature measurement are compensated by comparing the sensors resistances and an high-accuracy resistor; this comparison automatically implements an autozero technique. EF 2 EF EF EF 2 M 0 EN differential analog to digital conerter (DC) is used to reject as much as possible common mode disturbances. Careful layout of the control board is necessary for keeping low the temperature measurement errors originated by the large currents which drie the heaters and the cooling deice. 4 wires sensor resistance measurement EF must be accurate LOW COT!!! / 2 must be accurate EF EF M 0 2 P EN P 3 I DC P 2 P 4 utozero (sampling compensation) cancels the low frequency errors of the current reference source circuit (input offset and /f noise oltage, errors in EF, / 2, ). Thermal cycles. Temperature, [ C] Time, [ s ] 35

36 Temperature, [ C] Temperature, [ C] Time, [ s ] Time, [ s ] Temperatures measured in two different points of the Lab-on-Chip with a nominal temperature equal to 94 C; the temperature error is within the specs. Heating. Using a supply oltage equal to 2 a heating rate aboe 0 C/s may be easily obtained. Temperature, [ C] ELECTONIC INTEFCE FO THE T DN-CHIP Time, [ s ] Cooling. High cooling rates (up to 20 C/s) may be obtained using an air compressor; a fan allows to achiee cooling rates in the order of 0 C/s. Thermal Σ modulation for QMB C. Falconi, E. Zampetti,. D mico Department of Electronic Engineering Uniersity of Tor ergata, ome, Italy 36

37 TH = 270 C/ W C TH = 58,3 mj / C Electrode for the quartz Temperature sensor Heater Flow sensor 37

38 4 wires autozero 38