Active Circuits: Life gets interesting

Transcription

1 Actie Circuits: Life gets interesting Actie cct elements operational amplifiers (P AMPS) and transistors Deices which can inject power into the cct External power supply normally comes from connection to the oltage supply rails Capable of linear operation amplifiers and nonlinear operation typically switches Triodes, pentodes, transistors MAE0 Linear Circuits 67

2 Actie Cct Elements Amplifiers linear & actie Signal processors Stymied until 97 and Harold Black Negatie Feedback Amplifier Linearity Control rescues communications Telephone relay stations manageable against manufacturing ariability utput signal is proportional to the input signal Note distinction between signals and systems which transform them Yes! Just like your stereo amplifier Idea controlled current and oltage sources MAE0 Linear Circuits 68

3 Linear Dependent Sources Actie deice models in linear mode Transistor takes an input oltage i and produces an output current i 0 g i where g is the gain This is a linear oltagecontrolled current source VCCS i ri i βi CCVS r transresistance CCCS β current gain µ VCVS µ oltage gain g VCCS g transconductance MAE0 Linear Circuits 69

4 Linear dependent source (contd) Linear dependent sources are parts of actie cct models they are not separate components But they allow us to extend our cct analysis techniques to really useful applications This will become more critical as we get into dynamic ccts Dependent elements change properties according to the alues of other cct ariables i i S ri ri S 0 Source on i S 0 i ri 0 0 Source off MAE0 Linear Circuits 70

5 Cct Analysis with Dependent Sources Golden rule do not lose track of control ariables Find i, and P for the 500Ω load 5Ω i x A i S 8i x 500Ω i y 300Ω i 50Ω Current diider on LHS i x i 3 S 3 Current diider on HS i (! 8) i x! i 8 S hm s law Power i 500! 6000i S p i 7,000i S MAE0 Linear Circuits 7

6 Analysis with dependent sources 5Ω i x A i S 8i x 500Ω i y 300Ω i 50Ω Power proided by ICS 50 p (50 5) S i S i 3 S Power deliered to load 700i S Power gain G p p S 700i S 50 i 3 S 30 Where did the energy come from? MAE0 Linear Circuits 7

7 A Nodal Analysis with Dependent Source S _ S B _ C B P i B D βi B E KCL at node C KCL at node D CCCS element description G ( C! S ) G ( C! S ) G B C G P ( C! D ) 0 G P ( D! C ) G E D!" i B 0 i B G P ( C! D ) Substitute and sole ( G G GB GP ) C! GPD G S GS! (" ) G P C [( " ) G G ] 0 P E D MAE0 Linear Circuits 73

8 T& Example 3 p 8 _ S x 3 µ x i Find in terms of S What happens as µ? S 3 A B Node A: i ( G G G3 ) A! G3 B G S x µ x Node B: B! µ x! µ A Solution: & ' µ G # B ' µ A $! G G G S % ( µ ) 3 " For large gains µ: (µ)g 3 >>G G (! µ G % " 3 S "! ( µ ) G S 3 MAE0 Linear Circuits &' This is a model of an inerting opamp #$ 7

9 Mesh Current Analysis with Dependent Sources Dual of Nodal Analysis with dependent sources Treat the dependent sources as independent and sort out during the solution x S _ 3 g x i in ( 3 g3 ) i A! 3i B S! ( 3 g3 ) i A ( 3 ) i B 0 i x 3 S _ i B i A g 3 x in MAE0 Linear Circuits 75

10 B i B B C C Example 5 BJTransistor _ Needs a supermesh Current source in two loops without in parallel Supermesh entire outer loop i i Supermesh equation βi B V i V 0 V γ i E i C E V CC i E! " B CC Current source constraint E Solution i B i i!! i " B V i B CC! V # (" ) E MAE0 Linear Circuits 76

11 Example 6 Field Effect Transistor x y g x r ds r ds g y S _ 3 _ S Since cct is linear Sole ia superposition K S S First S and S 0 then S 0 and S This gies K and K K MAE0 Linear Circuits 77

12 A Brief Aside Transistors Bipolar Junction Transistors Semiconductors doped silicon ndoping: mobile electrons Si doped with Sb, P or As pdoping: mobile holes Si doped with B, Ga, In Two types npn and pnp Heaily doped Collector and Emitter Lightly doped Base and ery thin Collector and Emitter thick and dopey Need to bias the two junctions properly Then the base current modulates a strong C E current E E p n p B n p n B C C B B C E C E Amplification i C βi B MAE0 Linear Circuits 78

13 Transistors V CC C Common Emitter Amplifier Stage C B C C B Biasing resistors and Keep transistor junctions biased in amplifying range Blocking capacitors C B and C B Keep dc currents out in B E E C E L out Feedback capacitor C E Grounds emitter at high frequencies MAE0 Linear Circuits 79

14 perational Amplifiers pamps Basic building block of linear analog cicruits Package of transistors, capacitors, resistors, diodes in a chip Fie terminals Positie power supply V CC Negatie power supply V CC Inerting input p Noninerting input n Linear region of operation A(! n ) Ideal behaior 5 p 0 < A <0 8 n p V CC 3 Slope A V CC V V CC p n Saturation at V CC /V CC limits range MAE0 Linear Circuits V CC 80

15 eal pamp (u7) MAE0 Linear Circuits 8

16 Equialent linear circuit " V Dependent source model 6 < < 0! Ω 5 < < < 00! A < 0 8 Need to stay in linear range CC V " A CC Ideal conditions p n i!! p p i " n! V n 0 CC V! A MAE0 Linear Circuits CC Ideal pamp 0Ω p n i p i n Slope A V CC A( p n ) V CC p n i 8

17 Noninerting pamp Feedback What happens now? Voltage diider feedback n perating condition p S Linear noninerting amplifier Gain K S S _ p n MAE0 Linear Circuits 83

18 Example 3 Analyze this i 0 p K p S S pamp has zero output resistance _ S p n 3 L L does not affect K AMP p K Total 3 K S K AMP S 3 MAE0 Linear Circuits 8

19 Voltage Follower Buffer Feedback path n i p i n p n i Infinite input resistance _ S L i 0, p p S Ideal pamp p n Loop gain is S Power is supplied from the Vcc/Vcc rails i L MAE0 Linear Circuits 85

20 pamp Ccts inerting amplifier Input and feedback applied at same terminal of pamp is the feedback resistor N! i So how does it work? N S KCL at node A! N in 0 0, N p S 0 S _ S _ i p n i N A N p i Inerting amp K S hence the name MAE0 Linear Circuits Noninerting amp 86

21 Inerting Amplifier (contd) Current flows in the inerting amp i S, in S _ i A i N N p i i L L i! S! i i L "!! L L S MAE0 Linear Circuits 87

22 pamp Analysis Example Compute the inputoutput relationship of this cct Conert the cct left of the node A to its Théenin equialent T C S T in 3 Note that this is not the inerting amp gain times the oltage diider gain There is interaction between the two parts of the cct ( 3 ) This is a feature of the inerting amplifier configuration MAE0 Linear Circuits S 3 3 _ T! T T ' B A _ T 3 A (! ) %& 3 3 "# %&! S 3 3 $ ' $ "# L S 88 L

23 Summing Amplifier Adder So what happens? Node A is effectiely grounded n p 0 _ i _ i i N A N p F if Also i N 0 because of in i i So if F 0 0 This is an inerting summing amplifier K F K F Eer wondered about audio mixers? How do they work? MAE0 Linear Circuits 89

24 Mixing desk Linear ccts _ i i m i m m A N p F if Virtual ground at n Currents add Summing junction & F # $ '! % " K K & F # $ '! % " L K Permits adding signals to create a composite Stringsbrasswoodwindpercussion Guitarsbassdrumsocalkeyboards m K m & $ ' % F m #! " m MAE0 Linear Circuits 90

25 Design Example 5 Design an inerting summer to realize Inerting summer with 3KΩ 65KΩ 5KΩ F 5, F 3 KΩ.3KΩ ( ) KΩ Nominal alues Standard alues If 00mV and V CC ±5V what is max of for linear op n? Need to keep >5V MAE0 Linear Circuits " 5 < "(5 5 > " 5! 0. < 3 ) V 9

26 pamp Circuits Differential Amplifier _ i 3 _ i n n i p p i Use superposition to analyze 0: inerting amplifier! 0: noninerting amplifier plus oltage diider 3 K K & #& #! % " " $ 3! $ % K inerting gain K noninerting gain MAE0 Linear Circuits 9

27 Exercise 3 What is? This is a differential amp is 0V, is 0V KΩ KΩ500Ω 3 KW 0V _ KΩ KΩ KΩ KΩ K K V 3 KΩ MAE0 Linear Circuits 93

28 Lego Circuits K K Noninerting amplifier K K Inerting amplifier MAE0 Linear Circuits 9

29 Lego Circuits (contd) F K K Inerting summer K K F F 3 K K K K 3 Differential amplifier MAE0 Linear Circuits 95

30 Example 6: pamp Lego 9.7V 0KΩ F 0KΩ 3.3KΩ 0KΩ 0KΩ 9KΩ 5KΩ >> >> C V CC ±5V So what does this circuit do? F 9.7V 3.V F!5 9 C It conerts tens of ºF to tens of ºC Max current drawn by each stage is.5ma MAE0 Linear Circuits 96

31 pamp Nodal Analysis pamp Cct Analysis Use dependent oltage source model Identify node oltages Formulate input node equations Sole using ideal characteristic p n est of circuit est of circuit p i p i n i n A( p n ) est of circuit MAE0 Linear Circuits 97

32 A _ B _ pamp Analysis Example 8 C D E 3 F MAE0 Linear Circuits < < Seemingly six nonreference nodes: AE Nodes A, B: connect to reference oltages and Node C, E: connected to pamp outputs (forget for the moment) Node D: ( G G ) D G C GE Node F: ( G 3 G) F G3 E 0 pamp constraints A D B, F C G C G G G G 3 E E G ( G ( G 3 G G G G ) ) 3 G G G3 98 0

33 pamp Analysis Exercise C Node A: A S Node B: (G G ) B G A G C 0 Node C: (G G 3 G ) C G B G D 0 Constraints B p n 0 Sole G C! G D S S A _ ( ) G B ( ) G G 3 3 G 3 G G 3 S S 3 D MAE0 Linear Circuits 99

34 Comparators A Nonlinear pamp Circuit We hae used the ideal pamp conditions for the analysis of pamps in the linear regime, i i 0 if A "! V n p What about if we operate with p n? That is, we operate outside the linear regime. We saturate!! n Without feedback, pamp acts as a comparator There is one of these in eery FM radio! p V V CC CC if if p p p > < n n n CC MAE0 Linear Circuits 00

35 Analogtodigital conerter comparators 8V 3 3 Current laws still work i p i n 0 Parallel comparison Flash conerter 3bit output Not really how it is done Voltage diider switched S _ V CC 5V V CC 0V MAE0 Linear Circuits Input 3 > S > S > 5> S >3 S >

36 pamp Circuit Design the whole point Gien an inputoutput relationship design a cct to implement it _ Build a cct to implement Inerting summer followed by an inerter _ 3 _ 0KΩ 0KΩ 5KΩ 00KΩ 00KΩ 00KΩ > Summer Inerter MAE0 Linear Circuits 0

37 3 m _ K 0KΩ 0KΩ 5KΩ.9KΩ m MAE0 Linear Circuits 00KΩ Example (K) eq eq eq L m m How about this one? Noninerting amp p K 0 p p 35 3 p.9 0 KCL at pnode with i p 0 p 3 p p p eq Noninerting summer Fewer elements than inerting summer 3 L m 0 03

38 Digitaltoanalog conerter MSB /8 / 3 LSB / F 3 8! F Parallel Digital Inputs MSB LSB DAC Single Analog Voltage Conersion of digital data to analog oltage alue Bit inputs 0 or 5V Analog output aries between min and max in 6 steps MAE0 Linear Circuits 0

39 Signal Conditioning Your most likely brush with pamps in practice Signal typically a oltage representing a physical ariable Temperature, strain, speed, pressure Digital analysis done on a computer after Antialiasing filtering data interpretation Adding/subtracting an offset zeroing Normally zero of ADC is 0V Scaling for full scale ariation quantization Normally full scale of ADC is 5V Analogtodigital conersion ADC Maybe after a few more tricks like track and hold ffset correction: use a summing pamp Scaling: use an pamp amplifier Antialiasing filter: use a dynamic pamp cct MAE0 Linear Circuits 05

40 Théenin and Norton for dependent sources Cannot turn off the ICSs and IVSs to do the analysis This would turn off the DCSs and DVSs Connect an independent CS or VS to the terminal and compute the resulting oltage or current and its dependence on the source T _ T S i S Compute S in response to i S : i S T S T MAE0 Linear Circuits 06

41 Where hae we been? Where to now? Nodal and mesh analysis Théenin and Norton equialence Dependent sources and actie cct models pamps and resistie linear actie cct design Where to now? Laplace Transforms and their use for DEs and ccts (Ch.9) Capacitors, inductors and dynamic pamp ccts (Ch.6) sdomain cct design and analysis (Ch.0) Frequency response (Ch.) and filter design (Ch.) We will depart from the book more during this phase MAE0 Linear Circuits 07