1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS

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1 1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74AC138 is identical in pinout to the LS/ALS138, HC/HCT138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. The IN74AC138 decodes a three-bit Address to one-of-eight active-low outputs. This device features three Chip Select inputs, two active-low and one active-high to facilitate the demultiplexing, cascading, and chip-selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states. Outputs Directly Interface to CMOS, NMOS, and TTL Operating oltage Range: 2. to 6. Low Input : 1. µa; 25 C High Noise Immunity Characteristic of CMOS Devices Outputs Source/Sink 24 ma ORDERING INFORMATION IN74AC138N Plastic IN74AC138D SOIC T A = -4 to 85 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM PIN 16 = CC PIN 8 = GND FUNCTION TABLE Inputs Outputs CS1 CS2 CS3 A2 A1 A Y Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X H X H X L X X L L L L L H L H L L H H H L H H H L H H H H = high level (steady state) L = low level (steady state) X = don t care L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L 1

2 MAXIMUM RATINGS Symbol Parameter alue Unit CC DC Supply oltage (Referenced to GND) -.5 to +7. IN DC Input oltage (Referenced to GND) -.5 to CC +.5 OUT DC Output oltage (Referenced to GND) -.5 to CC +.5 I IN DC Input, per Pin ±2 ma I OUT DC Output Sink/Source, per Pin ±5 ma I CC DC Supply, CC and GND Pins ±5 ma P D Power Dissipation in Still Air, Plastic DIP+ 75 mw SOIC Package+ 5 Tstg Storage Temperature -65 to +15 C T L Lead Temperature, 1 mm from Case for 1 Seconds (Plastic DIP or SOIC Package) 26 C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 1 mw/ C from 65 to 125 C SOIC Package: : - 7 mw/ C from 65 to 125 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit CC DC Supply oltage (Referenced to GND) IN, OUT DC Input oltage, Output oltage (Referenced to CC GND) T J Junction Temperature (PDIP) 14 C T A Operating Temperature, All Package Types C I OH Output - High -24 ma I OL Output - Low 24 ma t r, t f Input Rise and Fall Time (except Schmitt Inputs) IN from 3% to 7% CC CC =3. CC = CC = ns/ This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, IN and OUT should be constrained to the range GND ( IN or OUT ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or CC ). Unused outputs must be left open. 2

3 DC ELECTRICAL CHARACTERISTICS(oltages Referenced to GND) CC Guaranteed Limits Symbol Parameter Test Conditions 25 C -4 C to 85 C IH Minimum High- Level Input oltage IL Maximum Low - Level Input oltage OH Minimum High- Level Output oltage OL Maximum Low- Level Output oltage OUT = or CC - 3. OUT = or CC - 3. I OUT -5 µa 3. IN = IH or IL I OH =-12 ma 3. I OH =-24 ma I OH =-24 ma I OUT 5 µa Unit IN = IH or IL I OL =12 ma I OL =24 ma I OL =24 ma IN = CC or GND ± ±1. µa I IN Maximum Input Leakage I OLD +Minimum OLD =1.65 Max 75 ma Dynamic Output I OHD +Minimum OHD =3.85 Min -75 ma Dynamic Output I CC Maximum IN = CC or GND 8. 8 µa Quiescent Supply (per Package) All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2. ms, one output loaded at a time. Note: I IN and I 3. are guaranteed to be less than or equal to the respective CC 3

4 AC ELECTRICAL CHARACTERISTICS(C L =5pF,Input t r =t f =3. ns) CC Guaranteed Limits Symbol Parameter 25 C -4 C to 85 C Unit Min Max Min Max t PLH Propagation Delay, Input A to Output ns Y (Figure 1) t PHL Propagation Delay, Input A to Output ns Y (Figure 1) t PLH Propagation Delay, CS2 or CS3 to ns Output Y (Figure 3) t PHL Propagation Delay, CS2 or CS3 to ns Output Y (Figure 3) t PLH Propagation Delay, CS1 to Output Y ns (Figure 2) t PHL Propagation Delay, CS1 to Output Y (Figure 2) ns C IN Maximum Input Capacitance 5. pf C, CC =5. C PD Power Dissipation Capacitance 6 pf oltage Range 3.3 is 3.3 ±.3 oltage Range 5. is 5. ±.5 Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms 4

5 EXPANDED LOGIC DIAGRAM 5

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