NTF5P03T3. P Channel SOT AMPERES, 30 VOLTS R DS(on) = 100 m

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1 NTF5PT Preferred Device Power MOSFET 5. mps, Volts PChannel SOT Features Ultra Low R DS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature SOT Surface Mount Package valanche Energy Specified PbFree Package is vailable pplications DCDC Converters Power Management Motor Controls Inductive Loads Replaces MMFT5PHD 5. MPERES, VOLTS R DS(on) = m G S D PChannel MOSFET MRKING DIGRM & PIN SSIGNMENT Drain SOT CSE 8E STYLE YM 5P Gate Drain = ssembly Location Y = Year M = Date Code 5P = Specific Device Code = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMTION Source Device Package Shipping NTF5PT SOT /Tape & Reel NTF5PTG SOT (PbFree) /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 6 December, 6 Rev. Publication Order Number: NTF5PT/D

2 NTF5PT MXIMUM RTINGS ( unless otherwise noted) Negative sign for PChannel devices omitted for clarity Rating Symbol Max Unit DraintoSource Voltage V DSS V DraintoGate Voltage (R GS =. M ) V DGR V GatetoSource Voltage Continuous V GS ± V sq in FR or G PCB seconds Thermal Resistance Junction to mbient Total Power T = 5 C Linear Derating Factor Drain Current T = 5 C T = 7 C Pulsed Drain Current (Note ) R THJ P D M C/W Watts mw/ C Minimum FR or G PCB seconds Thermal Resistance Junction to mbient Total Power T = 5 C Linear Derating Factor Drain Current T = 5 C T = 7 C Pulsed Drain Current (Note ) Operating and Storage Temperature Range T J, T stg 55 to 5 C Single Pulse DraintoSource valanche Energy Starting (V DD = Vdc, V GS = Vdc, Peak I L = pk, L =.5 mh, R G = 5 ) R THJ P D M E S 5 C/W Watts mw/ C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Repetitive rating; pulse width limited by maximum junction temperature. mj

3 NTF5PT ELECTRICL CHRCTERISTICS (T = 5 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHRCTERISTICS DraintoSource Breakdown Voltage (Cpk.) (Notes and ) (V GS = Vdc, =.5 dc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (V DS = Vdc, V GS = Vdc) (V DS = Vdc, V GS = Vdc, ) V (BR)DSS SS 8. 5 Vdc mv/ C dc GateBody Leakage Current (V GS = ± Vdc, V DS = Vdc) I GSS ± ndc ON CHRCTERISTICS (Note ) Gate Threshold Voltage (Cpk.) (Notes and ) (V DS = V GS, =.5 dc) Threshold Temperature Coefficient (Negative) V GS(th) Vdc mv/ C Static DraintoSource OnResistance (Cpk.) (Notes and ) (V GS = Vdc, = 5. dc) (V GS =.5 Vdc, =.6dc) Forward Transconductance (Note ) (V DS = 5 Vdc, =. dc) DS(on) m g fs..9 Mhos DYNMIC CHRCTERISTICS Input Capacitance (V DS = 5 Vdc, V GS = V, C iss 5 95 pf Output Capacitance f =. MHz) C oss 5 Transfer Capacitance C rss 58 SWITCHING CHRCTERISTICS (Note ) TurnOn Delay Time (V DD = 5 Vdc, =. dc, t d(on) ns Rise Time V GS = Vdc, R G = 6. ) (Note ) t r 8 TurnOff Delay Time t d(off) 8 9 Fall Time t f 9 TurnOn Delay Time (V DD = 5 Vdc, =. dc, t d(on) 6 8 ns Rise Time V GS = Vdc, R G = 6. ) (Note ) t r 5 TurnOff Delay Time t d(off) 6 Fall Time t f 8 Gate Charge SOURCEDRIN DIODE CHRCTERISTICS Forward OnVoltage Reverse Recovery Time (V DS = Vdc, =. dc, V GS = Vdc) (Note ) (I S =. dc, V GS = Vdc) (I S =. dc, V GS = Vdc, ) (Note ) (I S =. dc, V GS = Vdc, di S /dt = / s) (Note ) Q T 5 8 nc Q.6 Q.5 Q.6 V SD Vdc t rr ns t a t b Reverse Recovery Stored Charge Q RR.6 C. Pulse Test: Pulse Width s, Duty Cycle.%.. Switching characteristics are independent of operating junction temperatures.. Reflects typical values. Cpk Max limit Typ SIGM

4 NTF5PT TYPICL ELECTRICL CHRCTERISTICS, DRIN CURRENT (MPS) 5 V GS =. V V GS =.5 V V GS = 6. V V GS = 8. V V GS = V V GS =. V V GS =.9 V V GS =.7 V V GS =.5 V V GS =. V V GS =. V V GS =.7 V.5.8, DRIN CURRENT (MPS) 8 6 V DS V T J = C T J = 55 C V DS, DRINTOSOURCE VOLTGE (VOLTS) V GS, GTETOSOURCE VOLTGE (VOLTS) Figure. OnRegion Characteristics Figure. Transfer Characteristics R DS(on), DRINTOSOURCE RESISTNCE ( ) =. V GS, GTETOSOURCE VOLTGE (VOLTS) Figure. OnResistance versus GatetoSource Voltage R DS(on), DRINTOSOURCE RESISTNCE ( ) V GS =.5 V V GS = V 5 6, DRIN CURRENT (MPS) 7 8 Figure. OnResistance versus Drain Current and Gate Voltage R DS(on), DRINTOSOURCE RESISTNCE (NORMLIZED) =. V GS = V T J, JUNCTION TEMPERTURE ( C) Figure 5. OnResistance Variation with Temperature 5 SS, LEKGE (n) V GS = V T J = C 5 5 V DS, DRINTOSOURCE VOLTGE (VOLTS) Figure 6. DraintoSource Leakage Current versus Voltage

5 NTF5PT TYPICL ELECTRICL CHRCTERISTICS C, CPCITNCE (pf) t, TIME (ns), DRIN CURRENT (MPS) 6 5 V DS = V C rss V GS = V C iss C oss C rss V GS V DS GTETOSOURCE OR DRINTOSOURCE VOLTGE (VOLTS) Figure 7. Capacitance Variation V GS, GTETOSOURCE VOLTGE (V) t d(on) R G, GTE RESISTNCE ( ) V SD, SOURCETODRIN VOLTGE (VOLTS) C iss V DD = 5 V =. V GS = V Figure 9. Resistive Switching Time Variation versus Gate Resistance V GS = V SINGLE PULSE T C = 5 C t d(off) I S, SOURCE CURRENT (MPS) dc ms 5 ms. s R DS(on) LIMIT THERML LIMIT s 5 PCKGE LIMIT V DS, DRINTOSOURCE VOLTGE (VOLTS) T J, STRTING JUNCTION TEMPERTURE ( C) Mounted on sq. FR board ( sq. oz. Cu.6 thick single sided) with on die operating, s max. Figure. Maximum Rated Forward Biased Safe Operating rea t f t r E S, SINGLE PULSE DRINTOSOURCE VLNCHE ENERGY (mj) V DS Q V GS = Q g, TOTL GTE CHRGE (nc) Figure 8. GatetoSource and DraintoSource Voltage versus Total Charge V GS = V Q Q T Figure. Diode Forward Voltage versus Current = 6 5 Figure. Maximum valanche Energy versus Starting Junction Temperature 5 5 V DS, DRINTOSOURCE VOLTGE (V) 5

6 NTF5PT TYPICL ELECTRICL CHRCTERISTICS R THJ(t), EFFECTIVE TRNSIENT THERML RESPONSE. D = CHIP JUNCTION SINGLE PULSE..E.E.E.E+.E+ t, TIME (s) NORMLIZED TO R J T STEDY STTE ( PD).75.5 F.7.85 F.76.7 F F.E F MBIENT.E+ Figure. FET Thermal Response 6

7 NTF5PT PCKGE DIMENSIONS D b SOT (TO6) CSE 8E ISSUE L NOTES: М. DIMENSIONING ND TOLERNCING PER NSI Y.5M, 98. М. CONTROLLING DIMENSION: INCH..8 () H E e e b E L C MILLIMETERS INCHES DIM MIN NOM MX MIN NOM MX b b c D E e e L H E STYLE : PIN. GTE. DRIN. SOURCE. DRIN SOLDERING FOOTPRINT* SCLE 6: mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 56, Denver, Colorado 87 US Phone: or 886 Toll Free US/Canada Fax: or 8867 Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: Toll Free US/Canada Europe, Middle East and frica Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NTF5PT/D