Engr354: Digital Logic Circuits

Transcription

1 Engr354: Digitl Logi Ciruits Chpter 4: Logi Optimiztion Curtis Nelson Logi Optimiztion In hpter 4 you will lern out: Synthesis of logi funtions; Anlysis of logi iruits; Tehniques for deriving minimum-ost implementtions; Grphil representtion of logi funtions (Krnugh mps); Use of CAD tools to implement logi funtions. Engr354 Chpter 4

2 Motivtion It is diffiult to minimize funtion using lgeri mnipultion lone euse it is not systemti; Grphil tehniques llow for more systemti (nd visul) pproh to minimiztion; Although softwre tools re used for logi optimiztion, designers like us must understnd the proess; This hpter presents methods for logi minimiztion tht n e utomted using CAD tools. Exmple Funtion Minimizing with lger n e diffiult: Row Numer f The funtion f = S m(, 2, 4, 5, 6) Engr354 Chpter 4 2

3 2-Vrile Krnugh Mp Logil djenies m m m 2 m 3 m m 2 m m 3 () Truth tle () Krnugh mp Exmple 2-Vrile Funtion f(,) The funtion f = S m(,, 3) Engr354 Chpter 4 3

4 3-Vrile Krnugh Mp m m m 2 m 3 m 4 m 5 m 6 m 7 m m 2 m 6 m 4 m m 3 m 7 m 5 () Krnugh mp () Truth tle Exmple 3-Vrile Funtion Minterm f(,,) The funtion f = S m(, 2, 4, 5, 6) Engr354 Chpter 4 4

5 4-Vrile Krnugh Mp d m m 4 m 2 m 8 m m 5 m 3 m 9 m 3 m 7 m 5 m m 2 m 6 m 4 m d 4-Vrile Exmple d Engr354 Chpter 4 5

6 A Seond Exmple d A Third Exmple d Engr354 Chpter 4 6

7 A Fourth Exmple d 5-Vrile Krnugh Mp d d e = e = Engr354 Chpter 4 7

8 Terminology A vrile either unomplemented or omplemented is lled literl; A produt term tht indites when funtion is equl to is lled n implint; An implint tht nnot e omined into nother implint tht hs fewer literls is lled prime implint; A over is olletion of implints tht ounts for ll input omintions in whih funtion evlutes to. An essentil prime implint inludes minterm overed y no other prime. Cost is the numer of gtes plus the numer of gte inputs, ssuming primry inputs re ville in oth true nd omplemented form. Minimiztion Proedure s per CAD Tools Generte ll prime implints; Find ll essentil prime implints; If essentil primes do not form over, then selet miniml set of non-essentil primes. Engr354 Chpter 4 8

9 3-Vrile Exmple Three-vrile funtion f = S m(,, 2, 3, 7) First 4-Vrile Exmple d Four-vrile funtion f = S m(2, 3, 5, 6, 7,,, 3, 4) Engr354 Chpter 4 9

10 Seond 4-Vrile Exmple d The funtion f = S m(, 4, 8,,, 2, 3, 5) Third 4-Vrile Exmple d. The funtion f = S m(, 2, 4, 5,,, 3, 5) Engr354 Chpter 4

11 Minimiztion of POS Forms Find over of the s nd form mxterms Inompletely Speified Funtions Often, ertin input onditions nnot our; These re lled don t res; A funtion with don t res is lled n inompletely speified funtion; Don t res n e used to improve the qulity of the logi designed; This ook uses d to indite don t re sitution wheres stndrd industry prtie typilly uses f. Engr354 Chpter 4

12 Exmple 4-Vrile Funtion d d d d d f = S m(2, 4, 5, 6, ) + d(2, 3, 4, 5) Entered Vrile (EV) Mpping Allows mny vriles to e presented using redued size K-mp; Ours quite frequently in digitl systems, espeilly stte mhines; Requires K-mp ompression nd expnsion; Referenes (Entered-vrile mpping or mp-entered vriles) Tinder, Engineering Digitl Design, Seond Edition (Lirry) Other digitl logi textooks We (?) Engr354 Chpter 4 2

13 Entered Vrile (EV) Mpping Exmple f = S m(2, 5, 6, 7) f = = + Entered Vrile Truth Tle Compression f Engr354 Chpter 4 3

14 Entered Vrile Mp Compression f = = + Three Vrile Compression Exmple = + = Engr354 Chpter 4 4

15 Four Vrile Compression Exmple d d d d d d +d =d + = The funtion f = S m(, 2, 4, 5,,, 3, 5) + = d+d=d Other Exmples Expnsion; Compression nd expnsion using don t res. Engr354 Chpter 4 5

16 Multiple-Output Ciruits Neessry to implement multiple funtions; Ciruits n e omined to otin lower ost solution y shring some gtes; I only mention this in pssing. Exmple of Multiple-Output Synthesis d d () Funtion f () Funtion f 2 Engr354 Chpter 4 6

17 Exmple Multiple-Output Ciruit d f d f 2 () Comined iruit for f nd f 2 Multilevel Synthesis SOP or POS iruits hve two levels of gtes; These re only effiient for funtions with few inputs; Ciruits with mny inputs n led to fn-in prolems fn-in is the numer of inputs to gte; Multilevel iruits n lso e more re effiient; Exmple: f = + = (+) Engr354 Chpter 4 7

18 Krnugh Mps for XOR s nd XNOR s These funtions tend to hve non-djent ptterns in the K-mps. f = + = Å Implementtion of XOR x x Å x 2 x 2 () Sum-of-produts implementtion x x Å x 2 x 2 () NAND gte implementtion Engr354 Chpter 4 8

19 Optiml Implementtion of XOR f = x Å x 2 = x x 2 + x x 2 = x (x + x 2 ) + x 2 (x + x 2 ) x g x Å x 2 x 2 () Optiml NAND gte implementtion Krnugh Mps for XOR s nd XNOR s d. The funtion f = S m(, 3, 4, 7, 9,, 3, 4) Engr354 Chpter 4 9

20 Issues We Will Not Cover Multilevel synthesis Ftoring Funtionl deomposition Anlysis of multilevel iruits Cuil representtion Cues nd Hyperues Tulr methods for minimiztion (Quine-MCluskey method) Genertion of prime implints Determintion of minimum over Cuil tehniques for minimiztion CAD Tools espresso finds ext nd heuristi solutions to 2-level synthesis prolem. sis performs multilevel logi synthesis. Numerous ommeril CAD pkges re ville from Cdene, Mentor, Synopsys, nd other Eletroni Design Automtion (EDA) vendors. Engr354 Chpter 4 2

21 A Complete CAD system Design oneption Design entry, initil synthesis, nd funtionl simultion (see setion 2.8) Logi synthesis/optimiztion Physil design Timing simultion No Design orret? Yes Chip onfigurtion Physil Design Physil design determines how logi is to e implemented in the trget tehnology Plement determines where in the trget devie logi funtion is relized; Routing determines how devies re to e interonneted using wires. Engr354 Chpter 4 2

22 Timing Simultion Funtionl simultion does not onsider signl propgtion delys After physil design, more urte timing informtion is ville; Timing simultion n e used to hek if design meets performne requirements. Summry In this hpter you lerned out: Synthesis of logi funtions; Anlysis of logi iruits; Tehniques for deriving minimum-ost implementtions; Grphil representtion of logi funtions (Krnugh mps); Use of CAD tools to implement logi funtions. Engr354 Chpter 4 22