A Transformation Based Algorithm for Reversible Logic Synthesis

Transcription

1 2.1 A Trnsformtion Bsed Algorithm for Reversile Logi Synthesis D. Mihel Miller Dept. of Computer Siene University of Vitori Vitori BC V8W 3P6 Cnd mmiller@sr.uvi. Dmitri Mslov Fulty of Computer Siene University of New Brunswik Frederiton NB E3B 5A3 Cnd dmslov@un. Gerhrd W. Duek Fulty of Computer Siene University of New Brunswik Frederiton NB E3B 5A3 Cnd gduek@un. ABSTRACT A digitl omintionl logi iruit is reversile if it mps eh input pttern to unique output pttern. Suh iruits re of interest in quntum omputing optil omputing nnotehnology nd low-power CMOS design. Synthesis pprohes re not well developed for reversile iruits even for smll numers of inputs nd outputs. In this pper trnsformtion sed lgorithm for the synthesis of suh reversile iruit in terms of n n Toffoli gtes is presented. Initilly iruit is onstruted y single pss through the speifition with miniml lookhed nd no k-trking. Redution rules re then pplied y simple templte mthing. The method produes ner-optiml results for 3-input iruits nd lso produes very good results for lrger prolems. Ctegories nd Sujet Desriptors M1.8 [Design Methodologies]: Logi Design Generl Terms Design Theory Keywords Reversile Logi Quntum Ciruits Templtes Minimiztion 1. INTRODUCTION Lnduer [8] proved tht using trditionl irreversile logi gtes neessrily leds to power dissiption regrdless of the underlying tehnology. Further Bennett [1] showed tht for power not to e dissipted in n ritrry iruit it must e uilt from reversile gtes. Hene there re ompelling resons to onsider iruits omposed of reversile Permission to mke digitl or hrd opies of ll or prt of this work for personl or lssroom use is grnted without fee provided tht opies re not mde or distriuted for profit or ommeril dvntge nd tht opies er this notie nd the full ittion on the first pge. To opy otherwise to repulish to post on servers or to redistriute to lists requires prior speifi permission nd/or fee. DAC 23 June Anheim Cliforni USA. Copyright 23 ACM /3/6...$5.. gtes. Reversile iruits re of prtiulr interest in lowpower CMOS design [17] optil omputing [7] quntum omputing [14] nd nnotehnology [1]. An n n Toffoli gte [19] hs n 1 ontrol lines whih pss through the gte unltered nd trget line on whih the vlue is inverted if ll the ontrol lines hve vlue 1. In this pper we present fst synthesis lgorithm whih epts reversile funtion speifition nd produes reversile iruit omposed of n n Toffoli gtes [19]. The synthesis of reversile iruits differs signifintly from synthesis using trditionl irreversile gtes. Approhes hve een presented in [ ]. For mny of those methods extensive serhing is required. A key ftor in this ontriution is tht we void extensive serhing nd therefore the method hs greter potentil to e extended to funtions with more thn just few inputs nd outputs. We first give si nive lgorithm whih synthesizes the iruit in one diretion. We show tht this lgorithm will lwys omplete without introduing unneessry grge outputs nd tht the iruit will hve t most (m 1)2 m +1 gtes. Output permuttion nd n heuristi for minimizing gte width re then introdued. Next we show tht the pproh n e pplied in oth diretions simultneously with gtes eing identified t either the input or the output end of the iruit whihever offers est dvntge s the synthesis proeeds. Trnsformtions to redue the numer of gtes re pplied using templte mthing. Our set of trnsformtions is n expnsion of the those used in [18] nd [5]. Neessry kground is reviewed in Setion 2. Our synthesis pproh is desried in Setion 3 nd gte trnsformtion y templte mthing is disussed in Setion 4. Experimentl results re presented in Setion 5. By onsidering ll 8! 3 3 reversile funtions we show tht our lgorithm produes results quite lose to the optiml iruit sizes found y exhustive serh in [18]. We lso demonstrte y exmples tht our method n e pplied to lrger funtions nd to the reliztion of irreversile funtions. Setion 6 onludes the pper with oservtions nd suggestions for further reserh. 2. BACKGROUND Definition 1. An m-input m-output totlly-speified Boolen funtion f(x) X = {x 1 x 2... x m} is reversile if it mps eh input ssignment to unique output ssignment. 318

2 Tle 1: 3 3 Reversile Logi Funtion. x 1 x 1 ' x 1 x 2 x 1 ' x 2 ' x 1 x 2 x 3 () () () Figure 1: () T OF 1(x 1) () T OF 2(x 1 x 2) nd () T OF 3(x 1 x 2 x 3) Toffoli Gtes. A reversile funtion n e written s stndrd truth tle s in Tle 1 nd n lso e viewed s ijetive mpping of the set of integers m 1 onto itself. Hene reversile funtion n e defined s n ordered set of integers orresponding to the right side of the tle e.g. { } for the funtion in Tle 1. We n thus interpret the funtion over the integers s f() = 7 f(1) = 1 f(2) = 4 et. A reversile funtion is of ourse permuttion nd n e expressed s set of disjoint yles s done in [18] ut we do not follow tht pproh here. Definition 2. An n-input n-output gte is reversile if it relizes reversile funtion. A vriety of reversile gtes hve een proposed [19 3 4]. Here we use the fmily of Toffoli gtes [19] defined s follows: Definition 3. An n n Toffoli gte psses the first n 1 lines (ontrol) through unhnged nd inverts the n th line (trget) if the ontrol lines re ll 1. We shll write n n n Toffoli gte s T OF n(x 1 x 2... x n) where x n is the trget line. Using the prime symol to denote the vlue of line fter pssing through the gte we hve x i = x i i < n (1) x n = x 1x 2...x n 1 x n (2) T OF 1(x 1) is the speil se where there re no ontrol inputs so x 1 is lwys inverted i.e. it is NOT gte. T OF 2(x 1 x 2) hs een termed Feynmn [3] or ontrolled- NOT gte (CNOT). T OF 3(x 1 x 2 x 3) is often referred to simply s Toffoli gte [19]. These gtes re depited s shown in Figure 1. Definition 4. A SWAP gte exhnges pir of inputs. Definition 5. Given two it strings p nd q the Hmming distne etween them denoted δ(p q) is the numer of positions for whih p nd q differ. x 1 ' x 2 ' x 3 ' Definition 6. Given the funtion f(x) the omplexity C(f) is defined s the the sum of the individul Hmming distnes over the 2 m input-output ptterns. For exmple the vlue of C(f) for the funtion in Tle 1 is THE ALGORITHM Applying Toffoli gte to the inputs or the outputs of reversile funtion lwys yields reversile funtion. The synthesis prolem is to find sequene of Toffoli gtes whih trnsforms given reversile funtion to the identity funtion. As gtes n e pplied either to the inputs or the outputs the synthesis n proeed from outputs to inputs inputs to outputs or s we show in Setion 3.3 in oth diretions simultneously. 3.1 Bsi Algorithm To egin we present si nive nd greedy lgorithm whih identifies Toffoli gtes only on the output side of the speifition. Consider reversile funtion speified s mpping over { m 1}. Bsi Algorithm Step 1: If f() invert the outputs orresponding to 1-its in f(). Eh inversion requires T OF 1 gte. The trnsformed funtion f + hs f + () =. Step 2: Consider eh i in turn for 1 i < 2 m 1 letting f + denote the urrent reversile speifition. If f + (i) = i no trnsformtion nd hene no Toffoli gte is required for this i. Otherwise gtes re required to trnsform the speifition to new speifition with f ++ (i) = i. The required gtes must mp f + (i) i. Let p e the it string with 1 s in ll positions where the inry expnsion of i is 1 while the expnsion of f + (i) is. These re the 1 its tht must e dded in trnsforming f + (i) i. Conversely let q e the it string with 1 s in ll positions where the expnsion of i is while the expnsion of f + (i) is 1. q identifies the its to e removed in the trnsformtion. For eh p j = 1 pply the Toffoli gte with ontrol lines orresponding to ll outputs in positions where the expnsion of i is 1 nd whose trget line is the output in position j. Then for eh q k = 1 pply the Toffoli gte with ontrol lines orresponding to ll outputs in positions where the expnsion of f + (i) is 1 nd whose trget line is the output in position k. For eh 1 i < 2 m 1 Step 2 trnsforms f + (i) i y pplying the speified sequene of Toffoli gtes. Sine we onsider the i in order nd step 1 hndles the se for we know tht f + (j) = j j < i. The importne of this is tht it shows tht none of the Toffoli gtes generted in Step 2 ffet f + (j) j < i. In other words one row of the speifition is trnsformed to the orret vlue it will remin t tht vlue regrdless of the trnsforms required for lter rows. Clerly the finl row of the speifition never requires trnsformtion s it is orret y virtue of the orret plement of the preeding 2 m 1 vlues. 319

3 (i) (ii) (iii) (iv) (v) Tle 2: Exmple of pplying the si lgorithm. (i) (ii) (iii) (iv) Tle 3: Exmple of pplying the idiretionl lgorithm. Figure 2: Ciruit for the funtion shown in Tle 2. A B Tle 2 illustrtes the pplition of the si lgorithm. (i) is the given speifition. Step 1 identifies the pplition of T OF 1( ) giving (ii). At this point f + (i) i 4 re s required. Mpping f + (5) 5 requires T OF 3( ) to hnge the rightmost position to 1 (iii) nd T OF 3( ) to remove the entre 1 (iv). Lstly T OF 3( ) is gin required this time to mp f + (6) 6. Note tht the gtes re identified in order from the output side to the input side. The orresponding iruit is shown in Figure 2. The si lgorithm is strightforwrd nd esily implemented. Its lgorithmi omplexity is n2 n. It is lso esily seen tht it will lwys terminte suessfully with iruit for the given speifition. However it is possile to onstrut funtion for ny m tht requires (m 1)2 m + 1 gtes. For m = 3 this is the funtion shown in Tle 1. We next onsider numer of pprohes to redue the size of the iruit produed. 3.2 Output Permuttion nd Control Input Redution The si lgorithm mps eh output k to the orresponding input. Often this is not the est mpping. For funtions with up to 8 or 9 inputs it is prtil to try ll m! output permuttions. Permuting the outputs requires ertin numer of interhnges whih in some tehnologies my require expliit SWAP gtes. The si lgorithm nively ssigns the mximum numer of ontrol lines to eh Toffoli gte. Often suset of those ontrol lines will suffie. The requirement is tht the gte does not ffet row erlier in the speifition. This is esily ounted for sine the set of ontrol lines must either ontin line tht hs not ppered s 1 in n erlier row of the speifition or must ontin ll lines tht hve ppered s 1 s in rows erlier in the speifition. Given tht the revised lgorithm insted of using the ontrol lines identified y the si lgorithm onsiders ll vlid susets of those lines nd hooses the ontrol tht minimizes the omplexity C(f + ) of the resulting speifition. Rell tht the omplexity C is the totl Hmming distne etween the input nd output sides of the speifition so this heuristi is hoosing the gte tht moves the speifition furthest towrds the identity speifition. In se of tie the smll- Figure 3: Ciruit for the funtion shown in Tle 3. est set of ontrol lines is used nd within tht the hoie is ritrry. 3.3 Bidiretionl Algorithm As desried so fr the lgorithm produes the iruit y seleting Toffoli gtes mnipulting only the output side of the speifition. Sine the speifition is reversile one ould onsider the inverse speifition deriving reverse iruit nd then hoose whihever is the smller. A etter pproh is to pply the method in oth diretions simultneously hoosing to dd gtes t the input side or the output side. To see how this works onsider the initil reversile speifition in Tle 3 olumn (i). The si lgorithm would require tht we invert eh of nd to mke f + () =. The lterntive is to invert i.e. to pply the gte T OF 1() to the input side. Applying this gte nd then reordering the speifition so tht the input side is gin in stndrd truth-tle order yields the speifition in (ii). From the output side we would next hve to mp f + (1) = 7 1. However from the input side we n omplish wht is required y interhnging rows 1 nd 3 whih is done y pplying the gte T OF 2( ). Doing so nd reordering the input side into stndrd order yields the speifition in (iii). At this point seletion from the output side nd the input side identify the sme gte T OF 3( ) (when expressed in terms of the input lines) nd the iruit is done (iv). The result uses three gtes (shown in Figure 3 A) wheres pprohing the prolem from the output side lone requires three NOT gtes just to hndle f() nd seven gtes in totl (shown in Figure 3 B). In generl when f + (i) i the hoie is () to pply Toffoli gtes to the outputs to mp f + (i) i or () to pply Toffoli gtes to the inputs to mp j i where j is suh tht f + (j) = i. Sine we onsider the i in order j > i nd must lwys exist. Also the sme rules for identifying the ontrol lines inluding redution desried ove pply. Our idiretionl lgorithm hooses () if δ(i f + (i)) δ(i j) nd () otherwise. We thus se the hoie on the numer of gtes required nd not their width or how losely they mp 32

4 the speifition to the identity. 4. TEMPLATE MATCHING The iruits produed y the lgorithm s desried thus fr frequently hve gte sequenes tht n e redued. For exmple the sequene T OF 2( ) T OF 1() T OF 1() n e repled y the sequene T OF 1() T OF 2( ). We hve implemented templte driven redution method. A templte onsists of sequene of gtes to e mthed nd the sequene of gtes to e sustituted when mth is found. The lines in the templte re generi nd must e ssoited to rel lines in the iruit with the ssoition pplied onsistently ross the templte. This is omplished y first ssoiting the widest trget templte gte with gte in the iruit nd then serhing the iruit for the other trget gtes using the line ssoition derived from the widest gte. Note tht sine the order of the ontrol lines to Toffoli gte is immteril! line ssoitions must e onsidered where is the numer of ontrol lines for the widest gte. Our templte mthing proedure looks for the trget gtes inluding the initil mth to the widest gte ross the entire iruit. If ll trget gtes re found it ttempts to move the gtes so tht they re djent either mthing the templte in the forwrd or reverse diretion. If this n e done the mthed gtes re repled with the new gtes speified y the templte. For reverse mth the new gtes re sustituted in reverse order. When moving the trget gtes the mthing proedure tkes ount of Property 1 whih follows diretly from the definition of n n Toffoli gtes. If two gtes n not e interhnged euse they don t stisfy this property nd tht prohiits proper djent ordering of the trget gtes for mth the templte eing onsidered is not pplile. Property 1. Two gtes T OF k (x 1 x 2... x k 1 x k ) nd T OF l (y 1 y 2... y l 1 y l ) djent in iruit n e interhnged iff x k {y 1 y 2... y l 1 } nd y l {x 1 x 2... x k 1 }. Our mthing proedure tries ll pproprite sets of trget gtes for eh templte. When templte mth is found the sustitution ditted y the templte nd the proess restrts sine sustitution my men tht templte rejeted erlier eomes pplile. Figure 4 shows the urrent templte set employed y our proedure. Templtes nd were introdued in [5]. We hve lssified the templtes s follows (lsses re seprted y horizontl lines): (1) two inputs involving SWAPs; (2) two input gte redutions without SWAPs; (3) trnsformtion rule 3 from [5]; (4) symmetri templtes; (5) ontrolled SWAP (equivlent to the Fredkin gte). It n e shown tht generliztion of lsses (3) nd (4) genertes ll templtes with n inputs nd 3 gtes tht result in redution in the numer of gtes. 5. EXPERIMENTAL RESULTS Tle 5 shows the results of pplying vrious versions of our lgorithm to ll 8! = reversile funtions. The four senrios re: Figure 4: Templtes with 2 or 3 inputs. () the si output trnsformtions lgorithms; () () plus Hmming distne sed look-hed; () () plus idiretionl trnsformtion; (d) () plus templte pplition. For eh senrio we show the numer of funtions for eh gte ount the verge numer of gtes required nd the totl time to pply our method for the 8! funtions on PC with 75MHz Pentium III with 256 M RAM. Column (e) in Tle 5 shows the optiml results reported in [18]. Tht work used depth-first serh with itertive deepening to onstrut optiml gte ount iruits for n = 3. However this pproh does not sle-up to lrger funtions. For exmple while the optiml results for n = 3 were found in 15 se. using PC with 2 GHz Pentium-4 Xeon the uthors report tht 4 4 reversile funtion requiring 8 or less gtes n e synthesized in less thn seond wheres the synthesis requires more thn 1.5 hours when 9 or more gtes re required. As we will show elow y exmple our pproh is pplile to lrger funtions in resonle time. Tle 5 ompres the dvntges of the vrious refinements to our method. The full idiretionl lgorithm with output permuttion ontrol input redution nd templte mthing produes results quite omprle to the optiml results. The tle does not indite the true dvntge of ontrol input redution. Overll the verge gte ount is essentilly the sme s without this refinement ut the gtes require fewer inputs for mny iruits. Alterntive heuristis for reduing the gte input ount need to e onsidered. An irreversile funtion n e relized using reversile gtes [14]. Grge outputs must e dded s neessry so tht the output ptterns re distint nd onstnt inputs must e dded s neessry so tht the funtion hs the sme numer of inputs nd outputs. This n e viewed s extending the irreversile funtion speifition to lrger reversile one

5 d (onstnt ) A B C Figure 5: Full dder. grge propogte Definition 7. The mximum output pttern multipliity of multiple-output Boolen funtion is the mximum numer of input ssignments whih yield the sme output pttern. Equivlently it is the mximum numer of times single output pttern ppers in the truth tle speifition of the funtion. As shown in [9] the minimum numer of grge outputs required is log 2 q where q is the mximum output pttern multipliity of the irreversile funtion. Optiml definition of the grge outputs is diffiult nd open prolem. At present we pre-ssign them using the pproh desried in [12]. Often they n simply e set equl to input vriles. At other times we use XOR funtions involving susets of the inputs. Constnt inputs when required re defined so tht the iruit yields the required funtionlity when they re set to. At present our pproh does not hndle dont-res so the reversile speifition derived from the irreversile speifition must e totlly-speified. This is most esily omplished y ensuring the output ptterns re unique for the setion of the speifition for ll onstnt inputs nd then ompleting the speifition y repling ertin outputs with the XOR of the output nd one of the onstnt inputs. Often fter n initil irreversile speifition is onstruted nd iruit found y pplying our lgorithm it is pprent from the iruit how to reple ertin of the grge outputs with lterntive definitions so tht some gtes in the iruit will e unneessry. Also ll SWAP gtes generted mongst grge outputs re unneessry nd ll gtes whih simply omplete the reliztion of grge output (their trget is not used s ontrol for gte required to relize one of the rel outputs) n e disrded. Both these redutions of ourse redefine the grge speifition. First we onsider 3-input full dder whih genertes sum rry nd propgte s used in [2]. One grge output is required sine the mximum output pttern multipliity of the full dder is 2. The grge output is set to n input (from the symmetry of the dder it does not mtter whih). A single onstnt input (d) is required. The omplete reversile speifition is d = d rry( ) = sum( ) = = Our lgorithm finds the 5 gte reliztion shown in Figure 5 () in.7 seonds. We ompre this to previously otined results. A reliztion with 5 Fredkin gtes is shown in [2]. The omplexity of the Fredkin gte is similr to the 3 3 Toffoli gte [15]. However our reliztion hs single grge output wheres the iruit in [2] hs 3. This is sum rry d e f (=) g(=) Figure 6: Ciruit for rd53. signifint dvntge if the iruit is implemented using quntum gtes. We now show tht our dder iruit n e optimized. Note tht the gtes in Figure 5 () n e rerrnged y using Property 1 s shown in (). The three shded gtes in Figure 5 () re generliztion of templte 3.2. When it is repled we hve iruit with 4 gtes shown in (). Sine we hve not yet implemented the generliztion of templtes with n > 3 our progrm ws not le to find this result. This limittion is due to the set of templtes urrently used nd is not limittion of the templte mthing pproh. Our finl result hs the sme gtes s the dder otined in [6]. As finl exmple we onsider the enhmrk funtion rd53. This funtion hs 5 inputs nd 3 outputs. The outputs re the inry enoding of the weight of the input pttern i.e. the numer of 1 s in the input pttern. For exmple input yields output input 1 yields output 1 nd input yields output 11. The mximum output pttern multipliity is 1 so t lest 4 grge outputs must e dded giving totl of t lest 7 outputs. Tht in turn requires two inputs e dded. Initilly the reversile speifition given in [12] ws used. The grge outputs were susequently modified to remove unneessry gtes. Our lgorithm produes iruit with 12 gtes in 1.84 seonds of CPU time. (A SWAP produed y the progrm ws removed sine the funtion is symmetri.) This is etter thn the iruit with 14 gtes proposed in [13]. Surprisingly this result is otined when using templtes with mximum input of 3. It will e interesting to see if templtes with more inputs n further redue this iruit. 6. CONCLUSIONS A simple lgorithm for the synthesis of reversile iruit omposed of generlized Toffoli gtes hs een presented. The si lgorithm will lwys terminte with vlid iruit. Heuristi pprohes hve een given to redue the size of the iruits produed through output permuttion nd Toffoli gte ontrol line redution. The mjor enhnement to the si lgorithm is method y whih gtes n e identified t either end of the speifition nd the iruit synthesized in oth diretions simultneously. An exhustive exmintion for m = 3 hs shown our pproh yields results quite omprle to the optiml gte ounts. Exmples were given to show our pproh n e pplied to lrger funtions. The ft tht we urrently onsider ll output permuttions limits our methods to prolemswith 8 or 9 inputs nd outputs. We re studying methods for seleting good ' ' ' d' h h h

6 Size () () () (d) (e) (f) vg. gtes Time (se.) (): nive lgorithm (): () plus output permuttion (): () plus ontrol input redution (d): () idiretionl redution (e): (d) plus templte pplition (f): optiml sizes [18] Tle 4: Numer of reversile funtions using speified numer of gtes for m = 3. permuttion sed on the initil funtion speifition. We re lso onsidering extensions to our method to llow don tre onditions. Coupled with tht we re looking t wys of dynmilly ssigning the grge outputs required for irreversile speifitions rther thn the pre-ssignment method we urrently use. We re studying the extension of templtes to n > 3. In prtiulr we re looking t lsses of templtes nd generi definitions of those lsses to void the templte speifition set eoming overly lrge nd degrding the performne of the pproh. Finlly we re looking t wys to diretly inorporte Fredkin gtes [4] whih hve similr ost to Toffoli gtes in some tehnologies ut different expressive power. A Fredkin gte is in ft ontrolled-swp nd hs the sme reltion to simple SWAP gte tht Toffoli gte hs to simple NOT gte. Hene method to inorporte Fredkin gtes will lso llow us to mke etter use of SWAP gtes throughout the synthesis proess. 7. REFERENCES [1] C. Bennett. Logil reversiility of omputtion. I.B.M. J. Res. Dev. 17: [2] J. W. Brue M. A. Thornton L. Shivkumrih P. S. Kokte nd X. Li. Effiient dder iruits sed on onservtive reversile logi gte. In IEEE Symposium on VLSI pges April 22. [3] R. Feynmn. Quntum mehnil omputers. Opti News 11: [4] E. Fredkin nd T. Toffoli. Conservtive logi. Interntionl Journl of Theoretil Physis 21: [5] K. Iwm Y. Kmyshi nd S. Ymshit. Trnsformtion rules for designing not-sed quntum iruits. In Proeedings of the Design Automtion Conferene New Orlens Louisin USA June [6] A. Khlopotine M. Perkowski nd P. Kerntopf. Reversile logi synthesis y itertive ompositions. Interntionl Workshop on Logi Synthesis 22. [7] E. Knill R. Lflmme nd G. J. Milurn. A sheme for effiient quntum omputtion with liner optis. Nture pges Jn. 21. [8] R. Lnduer. Irreversiility nd het genertion in the omputing proess. IBM J. Res. 5: [9] D. Mslov nd G. W. Duek. Grge in reversile design of multiple output funtions. In 6th Interntionl Symposium on Representtions nd Methodology of Future Computing Tehnologies pges Mrh 23. [1] R. C. Merkle. Two types of mehnil reversile logi. Nnotehnology 4: [11] D. M. Miller. Spetrl nd two-ple deomposition tehniques in reversile logi. In Midwest Symposium on Ciruits nd Systems Aug. 22. [12] D. M. Miller nd G. W. Duek. Spetrl tehniques for reversile logi synthesis. In 6th Interntionl Symposium on Representtions nd Methodology of Future Computing Tehnologies Mrh 23. [13] A. Mishhenko nd M. Perkowski. Logi synthesis of reversile wve sdes. In Interntionl Workshop on Logi Synthesis June 22. [14] M. Nielsen nd I. Chung. Quntum Computtion nd Quntum Informtion. Cmridge University Press 2. [15] M. Perkowski nd et l. A hierrhil pproh to omputer-ided design of quntum iruits. Preprint 22. [16] M. Perkowski P. Kerntopf A. Buller M. Chrznowsk-Jeske A. Mishhenko X. Song A. Al-Rdi L. Joswik A. Coppol nd B. Mssey. Regulrity nd symmetry s se for effiient reliztion of reversile logi iruits. In Interntionl Workshop on Logi Synthesis 21. [17] G. Shrom. Ultr-Low-Power CMOS Tehnology. PhD thesis Tehnishen Universität Wien June [18] V. V. Shende A. K. Prsd I. L. Mrkov nd J. P. Hyes. Reversile logi iruit synthesis. In ICCAD pges Sn Jose Cliforni USA Nov [19] T. Toffoli. Reversile omputing. Teh memo MIT/LCS/TM-151 MIT L for Comp. Si