1101HA Block Diagram (Silverthorne / Poulsbo)

Transcription

1 0_LK RM 0_H P etting 0_E Pin efine 0_Power equrnse 0_Power equence 0_Power equence escription 0_lock en_lpr 0_PU-LVERTHRNE () 0_PU-LVERTHRNE () 0_PU-LVERTHRNE () _H_Poulsbo_HT () _H_Poulsbo_R () _H_Poulsbo_LV/V () _H_Poulsbo_PM/U/E/Z () _H_Poulsbo_TRP() _H_Poulsbo_PWER () _H_Poulsbo_ () _R_MM _R_Termination 0_H_V_RT _nboard V _L onn_l _. _Mini WF _luetooth_t _FN_THERML ENR _LN_theros R/R _RJ _mall brd onn 0_PT T T _U Port _E_ENE K0 _P RM_ebug onn _Reset Map _K_Touch Pad ischarge _PWR Jack _crew Hole 0_EM _Power Flow _Vcore _Power ystem _Power_+.V & VTTR _Power_VP _Power_+.V & +.V _harger _Power_Load witch _Power Latch 0_HTRY NT M 0H lock iagram (ilverthorne / Poulsbo) mall-oard peaker U Port * Miniard LV RT zalia odec Realterk L M Jack M ardreader U Page HP Jack H H T V zalia PT JMH0 U Port * PU ilverthorne H PUL Page ~ F MHz Page 0~ U.0 luetooth R PE X P RM lock enerator LPR R- o-mm 00M LN R WLN Miniard ebug onn E ENE K0 nternal K Page Page ~ Touch Pad RJ- N/ UTeK MPUTER N ustom 0H lock iagram ate: Tuesday, July, 00 heet of 0.

2 H P ETTN Pin U N N Pin Name PU0 PU PU onnect to PM_LEVELWN# PU_LEVELWN PM_PWRTN# Type / M. / M. / M. Power Well us us us VX-unknown VX-unknown VX-unknown / FF FF FF nput/utput et utput utput nput R K0 F K H F J H K PU/ U P0 P P P P P P P/ LPVR# P/ PRHT# P/ EXTT# +VP_V0 trap M/ T_isable R_REER_EN# MR_N# trap M LN_FF MNR_EN# R_MEM_NF LPVR# MER_EN WLN_LE / M. / M. / M. / M. / M. / M. / M. / M. / M. / M./ / M. us ore ore ore ore ore ore ore ore ore ore VX-unknown FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF output nput utput iutput nput utput utput nput utput utput utput UTek omputer N. 0H H P etting N/ ate: Tuesday, July, 00 heet of 0.

3 E K0 P ETTN Pin Pin Name P00/0 P0/KRT# P0 P0/PRT# P0 P0 P0 P0/E_LK P0/E_T P0 P0E/# P0F/PWM0 P0/PWM P/PWM P/FNPWM P/E_TX P P/LKRUN# P/K P/0 E_RX K K0 attery critical capacity P/FNPWM FN_PWM V Fan P/FNF P/FNF P/E_RX P/PWM P/NUMLE P0/K0/TP_TET P/K/TP_PLL P/K P/K P/K P/K P/K P/K P/K P/K P/K0 P/K P/K PE/K PF/K P0/K0 P/K P/K P/K P/K P/K P/K P/K P/0 P/ P/ P/ ignal Name Type 0TE R_N# HTKEY_W0# UF_RT# HTKEY_W#(no use) EXT_M# L_E_R# P_0 P_ L_E_L#(no use) K_# L_PWM_ TEL# PM_PWRTN# FN0_PWM FN0_TH FN_TH E_TX PWR_W# P-N NUM_LE# LP_LKRUN# K0 K K K K K K K K K K0 K K K K K K K K K K K T_ T_ T_ T_ H_EN# Note nternal pull high 0K pull high to +V nternal pull high nternal pull high 0K pull high to +V nternal pull high in H PU Fan PU FanTach V FanTach R debug port R debug port nternal pull high latch power nternal pull high nternal pull high nternal pull high nternal pull high nternal pull high nternal pull high nternal pull high nternal pull high battery charger enabled Pin Pin Name P/ PE/ PF/ P0 P P P P/L P/ P/L P/ P/K P/K P/PLK P/PT P/PLK P/PT PE/PLK PF/PT P0/EL# P/E_# P/PLE P P/RLE P PX00/# PX0/LK PX0/ PX0 PX0 PX0 PX0 PX0 PX0 PX0 PX00 PX PX0/ PX PX PX PX PX PX PX P P/PLK P/TET_LK ignal Name L_KFF# THR_PU_VLT# T_LL# _K PM_RMRT# T_N T_N M0_LK M0_T M_LK M_T K_0 K_ TP_LK TP_T H_LE_REEN# H_LE_UP# P_LE# PWR_LE_UP RL_LE# _NT(no use) P_ME# U_N VU_N PU_VRN U_N NT_H# NT_# P_WP# P_# T_LERN PM_PWRK RT# THR_PU PM_LPRY# LPME VRM_PWR PM_RTRY# RTWRN _NT(no use) P_LK _NT(no use) Type Note attery Low Low daptor Plug in 0K pull down to att (mall/nternal): -present, 0-absent att (mall/nternal): -present, 0-absent /.K pull high to +V_E / / / N.. RT_N RT_PWR_EN# RT_RT# NT_H# NT_H# / /.K pull high to +V_E 0K pull high to +V 0K pull high to +V for K type detection for K type detection 0K pull high to +V 0K pull high to +V reen charger LE range charger LE nternal pull high.k pull down to udio P attery parallel, H:P, L:P~P E K0 ther Pin ETTN Pin 0 0 ctive if PU temperature over spec LPRY#,00K pull down to U#,00K pull down to Pull high to +V nternal pull high Pin Name ERRQ LFRME# L L L V L0 PLK V V ERT# V V V R#/P WR#/P XLK XLK VR V P#/ELMEM# ignal Name NT_ERRQ LP_FRME# LP_ LP_ LP_ +V LP_0 LK_P_E +V +V E_RT# +V_E +V +V P_ P_ K_XLK K_XLK VR +V P_# batt (ig/external) charging enabled. att is discharging priority in mode. batt discharging enabled batt (ig/external) charging enabled. att is discharging priority in mode. batt discharging enabled UTek omputer N. Type / / / P P P P P 0H / P / P P P P P P P P ate: Tuesday, July, 00 heet of 0 Note 0K pull high to +V 00K pull high to +V_E Reserved uf to E Pin efine N/.

4 T_N + TT attery +V PWR_W# VU_N U_N +V_RT Vccp +.V +.V +V +VU +V +VU PM_PWRTN# ignal VU_N U_N U_N > ms H H H T 0/ H L H M / dapter attery L L ENE K0 PM_RMRT# > ms 0 E_PWRK PM_RTWRN > ms PM_RTRY# > 00us ntel H RT# H L Power V Main UL U_N RT# _T_Y LK_P_E PU_VRN VRM_PWR UF_RT# LK_P_H LK_REF_H LK_LK_H LK_PE_H LK_M_UM LK_L_LV VRM_PWR H_PWR H_PURT# _T_Y VU_N _T_Y U_N _T_Y U_N +.V U_N RT0 UP EN UP EN 0/ / H_PWR H_PURT# L UP EN Vccp_PWR +V REF LK M H +VU +VU VU_PWR +V +V +VU +VU +.V V V V V V V V V V V V V VU P LK M H E EU +.V.V_PWR Vccp Vccp_PWR VTT_R 0 LVERTHRNE LPR Vccp +.V VRE +V V V V[:0] -- LK_LK_PU +V V -- F LK 00M PU MH TP V PE LK 00M H MNR LN +V +V U_N VTT_R V MX EN UP0 EN Vccp +.V V V _T_Y PU_VRN +V V VRM_PWR +V +VU U_N +V EN +VU U_N +VU +VU +V U_N U_N U_N EN EN UP0 EN +V +V +V +.V +.V 0 0 +V +.V V -- V RT# UF_RT# UFFER UM LK M H LV LK 00M MH UTek omputer N. Power equence 0H N/ ate: Tuesday, July, 00 heet of 0.

5 dapter /_K_N _T_Y L +V +V +V T_N + TT attery +V_RT Vccp +.V +.V +V +VU +V +VU PM_PWRTN# ignal VU_N U_N U_N PM_RMRT# H H H T 0/ 0 E_PWRK H L H PM_RTWRN / M dapter attery L L PM_RTRY# ntel H RT# H L Power V Main UL RT# _T_Y U_N +V > ms VU_N PWR_W# U_N PU_VRN LK_P_H LK_REF_H _K ENE K0 > ms > 00us LK_P_E VRM_PWR UF_RT# LK_LK_H LK_PE_H LK_M_UM LK_L_LV VRM_PWR H_PWR H_PURT# VU_N _T_Y U_N RT0 +VU +VU VU_PWR _T_Y UP +.V U_N EN.V_PWR +.V U_N Vccp UP Vccp_PWR EN UP EN H_PWR H_PURT# Vccp_PWR REF LK M H LVERTHRNE +VU P LK M H E EU VTT_R 0 LPR Vccp +.V VRE V[:0] LK_LK_PU F LK 00M PU MH TP PE LK 00M H MNR LN +VU +V U_N U_N U_N EN +VU +V U_N 0 EN MX EN UP0 EN +V +V +VU +VU +.V +V +V VTT_R Vccp +.V +V +V +.V 0/ V V V V V V V V V V V V V V V V V V V V / V V V V VU +VU +V U_N U_N EN UP0 EN _T_Y PU_VRN VRM_PWR +V +V +V +.V VTT_R 0 RT# UF_RT# UFFER UM LK M H LV LK 00M MH UTek omputer N. Power equence 0H N/ ate: Tuesday, July, 00 heet of 0.

6 / to 0(dapter Mode) / to 0(attery Mode) 0 to // This sequence will occur whenever the system is in / and the E initiates a sleep exit sequence from / to 0. nitial E state: VU_N=0, U_N=0, U_N=0, 0=X, KRT=X, PU_VRN=0, H_PWRK=0, RTWRN=0, and PM_RMRT#=0, REET#=0..Waiting for _K until adaptor power is good, then.t least m after _K is asserted, E asserts VU_N to enable VU power..t least 0m after VU power is stable, waiting for PWR_W# until user is pressed. (r waiting for H deasserted LPRY#, too?).e asserts RTWRN..U_N is asserted at least 0m (de-bounce) after receiving PWR_W#..PM_RMRT# is deasserted at least m after U power is stable..t least m after PM_RMRT# is deasserted, U_N is enabled..pu_vrn is deasserted at least 00m after U power is stable..waiting for PUPWR_ (VRM_PWR) until PU_VRN power is stable. 0.t least 0m after receiving PUPWR_, PM_PWRK is asserted, and then deasserts RTWRN..Waiting for RTRY# until deasserted by H..REET# can be deasserted at lease 00u after PM_PWRK is asserted. This sequence will occur whenever the system is in / and the E initiates a sleep exit sequence from / to 0. nitial E state: VU_N=0, U_N=0, U_N=0, 0=X, KRT=X, PU_VRN=0, H_PWRK=0, RTWRN=0, and PM_RMRT#=0, REET#=0..Waiting for T_N until battery power is good, then.waiting for PWR_W# until user is pressed..e asserts VU_N to enable VU power..t least 0m after VU power is stable..e asserts RTWRN..U_N is asserted at least 0m (de-bounce) after receiving PWR_W#..PM_RMRT# is deasserted at least m after U power is stable..t least m after PM_RMRT# is deasserted, U_N is enabled..pu_vrn is deasserted at least 0m after U power is stable. 0.Waiting for PUPWR_ (VRM_PWR) until PU_VRN power is stable..t least 0m after receiving PUPWR_, PM_PWRK is asserted, and then deasserts RTWRN..Waiting for RTRY# until deasserted by H..REET# can be deasserted at lease 00u after H_PWRK is asserted. This sequence will occur when system entry to sleep states, or all power planes are shut down. nitial E state: VU_N=, U_N=, U_N=, PU_VRN=, H_PWRK=, and PM_RMRT#=, REET#=, RTWRN=0, PM_PWRTN#=..Waiting for PWR_W# until user is pressed (go to ), or waiting for LPRY# is asserted (go to )..t least 0m after PWR_W# is asserted, E asserts PM_PWRTN# (0m width) to H..Waiting for LPRY# until has been asserted..e asserts RTWRN to H to begin internal sequence..h asserts RTRY# to E to indicate all outstanding transactions are completed..e asserts REET# after detecting RTRY# asserted..e deasserts H_PWRK..E deasserts U_N and PU_VRN to turn off power planes. This completes the entry to (LPME=). f LPME=0, this indicates / was the desired state, E takes additional actions:.e asserts PM_RMRT#. 0.E deasserts U_N to turn off the other power planes..e deasserts VU_N if in battery mode..e deasserts RTWRN to save more power. Power equence escription: to 0 This sequence will occur in, and wake event is detected by E or H. nitial E state: U_N=0, PU_VRN=0, H_PWRK=0, PM_RMRT#=, PM_PWRTN#=, and VU_N=, RTWRN=, U_N=, REET#=0..For internal wake event, H deasserts LPRY# to E, than..for external wake event (PWR_W#, keyboard wake up), then.e asserts PM_PWRTN# at least 0m to wake H, and waiting for LPRY# until H deasserted..e asserts U_N to enable U power..pu_vrn is deasserted at least 00m after U power is stable. Warm Reset (LPME=) The warm reset sequence results in reset without remove any power supplies. nitial E state: U_N=, PU_VRN=, H_PWRK=, PM_RMRT#=, PM_PWRTN#=, and VU_N=, RTWRN=, U_N=, REET#=..H asserts RTRY# at the same time as driving LPME= to E..E asserts RTWRN to H..E asserts REET# for 00m to H after asserts RTWRN..E deasserts RTWRN..E deasserts REET# after at least 00u delay from RTWRN. old Reset (LPME=0) The cold reset sequence results in a power cycling of all but the RT power well. nitial E state: U_N=, PU_VRN=, H_PWRK=, PM_RMRT#=, PM_PWRTN#=, and VU_N=, RTWRN=, U_N=, REET#=..H asserts RTRY# at the same time as driving LPME=0 to E..E asserts RTWRN to H..E asserts REET# to H after asserts RTWRN..E deasserts PM_PWRK and disables U_N and PU_VRN power..e asserts PM_RMRT# after PU_VRN power is off..e disables U_N power for ~ seconds..waiting for PUPWR_ (VRM_PWR) until PU_VRN power is stable../ to 0 sequence is automatically followed to bring the system back to 0 when U_N power is enable..t least m after receiving PUPWR_, H_PWRK is asserted..easserts RTWRN after H_PWRK is asserted..reet# can be deasserted 00u after RTWRN is deasserted. UTeK MPUTER N Power equence escription N/ ustom 0H Tuesday, July, 00 ate: heet of 0.

7 +V +V_LK R Mhm LK_XN PF/0V X LK_XUT.Mhz / item PF/0V +V L L /00Mhz l00 /00Mhz l00 0uF/0V c00 T 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V L 0 /00Mhz 0.UF/V l00 +V_LK_V 0.UF/V +V LK_EL_# E +V_LK_V :isable 0:Enable PEREQ:PEx0 & PEx PEREQ:PEx & PEx & T PEREQ:PEx & PEx & PEx P_TP# TP_PU# +V_LK /RF / item [] LK_M_REER LK_L_LV LK_L_LV# [] LK_M_UM [] LK_M_UM# [] LK_L_LV [] LK_L_LV# [] LK_PE_H [] LK_PE_H# [] LK_PE_MNR [] LK_PE_MNR# E PF/0V /RF E PF/0V PF/0V [] LK_PEREQ# [] LKREQ#_MNR R hm [,] VP_PWR RN 0HM RN 0HM LK_FL R R RN 0HM RN 0HM RN 0HM RN 0HM LK_M_UM LK_M_UM# LK_PEREQ# LK_PEREQ# LK_F LK_TP_EN LK_EL_# LK_FL LK_M LK_M# LK_L LK_L# LK_PE LK_PE# LK_PE LK_PE# +V_LK U V MHz P&PEX_TP# PEREQ# PU_TP# PEREQ# REF0/FL F/PLK0 _PEREQ#/EL# VP X 0 TP_EN/PLK_F0 X EL_#/_MHz VREF 0 Vtt_Pwrd/P# T V LK FL/U_MHz PUT_LR0 TT_MHzLR PU_LR0 T_MHzLR VPU FL PUT_LR PeT_LR0 PU_LR 0 Pe_LR0 REET# PeT_LR 0 Pe_LR V VPEX PUTPT_LR/PeT_LR PeT_LR PUTP_LR/Pe_LR Pe_LR VPEX PeT_LR PeT_LR Pe_LR Pe_LR TLKT_LR PeT_LR TLK_LR Pe_LR 0 VPEX LPRLF V_LK R hm LK_M_LN [] R hm P_TP# LK_M_T [0] TP_PU# [] LK_FL R hm LK_PEREQ# LK_PEREQ# [] LK_XN LK_H [] LK_XUT VREF _M_T [] _M_LK [] LK_LK0 RN 0HM LK_LK_PU [] LK_LK#0 RN 0HM LK_LK_PU# [] LK_LK RN 0HM LK_LK_MH [] LK_LK# RN 0HM LK_LK_MH# [] LK_LK RN /TP 0HM LK_LK# RN /TP 0HM LK_PE LK_PE# RN 0HM RN 0HM / item FR RF LK_LK_TP [] LK_LK_TP# [] LK_PE_LN [] LK_PE_LN# [] LK_PEREQ# RN 0Khm LK_PEREQ# 0Khm RN LK_PEREQ# RN 0Khm LK_TP_EN LK_EL_#.Khm RN LK_F.Khm RN R.Khm +V_LK +V_LK / item FR RF _M_T _M_LK 0PF/0V 0PF/0V LK_H 0PF/0V +V_LK +V_LK RN.Khm LK_FL LK_FL LK_FL RN.Khm R.Khm R0.Khm F F F PU PE V_LK L VREF /00Mhz /RF l00 0.UF/V RF solution 0.UF/V /RF LK_M_LN LK_M_T 0PF/0V 0PF/0V 0.UF/V R RN 0Khm 0Khm /RF E E PF/0V PF/0V /RF R.Khm UTek omputer N. 0H N/ lock en_lpr ate: Tuesday, July, 00 heet of 0.

8 +VP_ Processor Hot +VP /_tem +V +V 0M# Level hift +V +V [] R_N# KRT# Level hift R 0Khm H_0M# Q UMKN +VP_ H_NT# R 0Khm +VP +VP_ /_tem R 0Khm Q [] 0TE UMKN R Khm % H_TPLK# H_PE# +VP /_tem R00 0Khm R HM PM_THRMTRP# PM_THRMTRP#_R [0,] R HM R Khm Q UMKN R Khm Q UMKN [] H_#[..] +VP_ R Khm +VP_ [,] [] H_T#0 [] H_REQ#0 [] H_REQ# [] H_REQ# [] H_REQ# [] H_REQ# [] H_T# [] H_PE# /_tem [] H_TPLK# [] H_NTR [] H_NM [] H_M# [] LK_LK_TP# [,] M_LK H_PWR H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_0M# H_NNE# Z0 : Z0 0 stage : HR Khm /TP H_TK H_T H_PM#0 H_PM# H_PM# TP_PWR TP onnector For ebug +VP U E []# []# []# E []# []# []# []# [0]# E []# []# []# 0 []# []# []# T[0]# REQ[0]# REQ[]# E0 REQ[]# REQ[]# REQ[]# []# []# []# E [0]# []# []# []# E []# 0 []# []# []# []# []# [0]# []# T[]# 0 0M# J FERR# H NNE# K TPLK# H LNT0 L LNT J M# E RV F RV RV RV0 RV0 RV E RV E0 RV L0 RV J0 RV K RV R RUP 0 NT R RUP THERM XP/TP NL NTRL TP E E E E FP_N_0P /TP -000 # NR# H PR# EFER# RY# W Y# R0# ERR# H NT# F LK# REET# M R[0]# R[]# E R[]# E TRY# F HT# E0 HTM# F PM[0]# F PM[]# E PM[]# F PM[]# PRY# E PREQ# F TK L T N T M TM P TRT# J RV PRHT# H THRM T THRM U THERMTRP# N HLK T LK[0] P LK[] R V0 K RV RV E RV TET U0 TET V MREF[] E H_PURT_R# H_R#0 H_R# H_R# H_PM#0 H_PM# H_PM# H_PM# H_PM# H_PM# H_TK H_T H_T H_TM H_TRT# H_PRHT_R# PM_THRMTRP# PU_MREF TP_PURT# H_TM H_T H_PM# H_PM# H_PM# H_TRT# H_ERR# H_NT# T H_# [] H_NR# [] H_PR# [] H_EFER# [] H_RY# [] H_Y# [] H_R0# [] H_NT# [] H_LK# [] H_R#0 [] H_R# [] H_R# [] H_TRY# [] H_HT# [] H_HTM# [] T H_THERM [] H_THERM [] LK_LK_PU [] LK_LK_PU# [] R0 T T0 T LK_LK_TP [] M_T [,] H_PURT# HR Khm /TP R Khm % +VP H_PURT# [] T THR_PU : H : throttle N THR_PU : L : throttle FF [] THR_PU H_PM# H_T H_TM H_T H_TK H_TRT# LK_LK_PU LK_LK_PU# UTeK MPUTER N H_PURT# M Rreference Voltage Level PU_MREF H_PRHT_R# +VP +VP_ +VP_ +VP JT nterface When TPP is not mplemented PU-LVERTHRNE() ustom. 0H R HM N/ ate: Tuesday, July, 00 heet of 0 R HM Q N00 0.UF/V HR HM HM HRN HM HRN HM HRN HM HRN HR HM /TP R Khm % R Khm % 0PF/0V 0 0PF/0V

9 [] H_TN#0 [] H_TP#0 [] H_NV#0 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# U Y [0]# H []# Y []# 0 []# E0 []# F []# []# []# W0 []# []# [0]# F []# []# []# []# []# TN[0]# 0 TP[0]# E NV[0]# T RP 0 []# []# []# []# []# []# []# []# [0]# []# []# []# []# []# []# []# TN[]# TP[]# NV[]# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_TN# [] H_TP# [] H_NV# [] H_# E H_# H_# []# []# H H_# H_# []# []# J0 H_#0 H_# []# [0]# J E0 H_# H_#0 []# []# Y J H_# H_# [0]# []# F F H_# H_# []# []# H H_# H_# []# []# F H H_# H_# []# []# H H_# H_# []# []# E F H_# H_# []# []# E E H_# H_# []# []# W H H_# H_# []# []# H_#0 H_# []# [0]# E J H_# H_#0 []# []# J H_# H_# [0]# []# F H_# []# []# [] H_TN# F TN[]# TN[]# H_TN# [] [] H_TP# H TP[]# TP[]# H_TP# [] [] H_NV# E NV[]# NV[]# Y H_NV# [] TL_REF J H_MP0 TLREF MP[0] E R.HM % H_MP R.HM % MP[] H_MP MP[] E R.HM % M H_MP R.HM % MP[] F T P T TET T TET PRTP# H_PRTP# [] PLP# H_PLP# [] PWR# V H_PWR# [] T R0 EL[0] PWR H_PWR [,] T M H_PULP# [] T EL[] LP# J U EL[] RV K T NT T RP T RP T RP E H F H E0 J F F F H J J H J J0 H F E H_#[:0] Near PU <00 mil ( hm) T/ trace., pace TL_REF 0.UF/V H_#[:0] [] +VP_ R Khm % TL+ Reference Voltage Level Layout Note MP 0 connect with Z0=. ohm,l<0." MP connect with Z0= ohm,l<0." R Khm % UTeK MPUTER N 0H N/ PU-LVERTHRNE() ate: Tuesday, July, 00 heet of 0.

10 H_V H_V H_V H_V H_V0 +V_PU H_V VENE H_V VENE +.V +VRE +VP_ +VP_ +VP +VP_ +VRE +VRE +VP VENE [] FRE_FF# [,] PM_THRMTRP#_R [,] UF_RT# [0,,,,,0,,] ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N PU-LVERTHRNE (). 0H N/ 0 0 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N PU-LVERTHRNE (). 0H N/ 0 0 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N PU-LVERTHRNE (). 0H N/ 0 0 PU +VRE Low-Frequency apacitors. 0m PU TYPE ilverthorne tandard Voltage Processor ilverthorne Medium Voltage Processor ilverthorne Low Voltage Processor Vcore Freq T T T /_tem /_tem /_tem 0.UF/V 0.UF/V R0 % R0 % UF/.V UF/.V T0 T0 T T UF/.V UF/.V 0UF/.V 0UF/.V V/NTF V/NTF V V V V V V V0 0 V V V V V 0 V V V V V0 V V V V V/NTF F V/NTF F V/NTF V V V0 0 V V V V V 0 V V V V/NTF 0 V/NTF H V/NTF H V/NTF J V/NTF J V/NTF V/NTF V/NTF V V V 0 V V V V V 0 V0 V V/NTF 0 V/NTF V/NTF V F V F V F V F V F V0 F V F V F V F V V 0 V V V V V0 0 V V H V H V J V Y V Y V0 Y V Y V Y V Y V Y V Y V Y V Y V Y V Y V W V V V V V V V V V V V V V V V V V0 V V V V V V V V V V T V T V T V T V T V0 T V T V T V T V T V T V T V T V P V P V0 P V P V P V P V P V P V P V P V P V P V0 N V0 M V0 M V0 M V0 M V0 M V0 M V0 M V0 M V0 M V00 M V M V M V L V K V K V K V K V K V K V0 K V K V K V K V K V J U NT U NT UF/.V UF/.V UF/.V UF/.V + E 00UF/.V + E 00UF/.V UF/.V UF/.V E Q PM0 E Q PM0 UF/.V UF/.V 0.UF/V 0.UF/V UF/.V UF/.V UF/.V UF/.V T T Q00 N00 Q00 N00 T T UF/.V UF/.V 0.UF/V 0.UF/V UF/.V UF/.V VP VP J VP0 M VP H VP H VP J VP VP 0 VP VP VP VP 0 VP VP VP VP0 VP VP VP VP VP VP VP H VP H VP H VP0 H VP H VP H VP H VP J0 VP J VP J VP J VP J0 VP J VP0 L VP N VP R VP U VP W V L V L0 V L V L V L V L V L0 V L V L V0 N V N V N0 V N V N V N V N V N0 V N V N V0 R V R V R0 V R V R V R V R V R0 V R V R V0 U V U V U0 V U V U V U V U V U0 V U V U V0 W V W0 V W V W V W V W V W0 V W V W V N0 V[0] P V[] R V[] N V[] K V[] L V[] R V[] U VENE W VENE V U NT U NT T T UF/.V UF/.V R00 HM R00 HM 0UF/.V 0UF/.V 0.UF/V 0.UF/V T T 0 0.UF/V 0 0.UF/V L /00Mhz L /00Mhz 0.UF/V 0.UF/V T T 0 UF/.V 0 UF/.V UF/.V UF/.V

11 +VP +VP R hm % R 0 % [] [] [] H_RMP H_NM H_M# H_PE# [] H_WN H_#[:0] F ompensation ircuits Rreference Voltage R0.hm % F / uffers alibrating 0.UF/V [] T T0 [] [] H_TPLK# TPT TPT [,0] PM_THRMTRP#_R H_NT# H_NTR T TPT H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_WN H_TETN# H_RMP REERVE REERVE U V H_0# F H_# V H_# H_# H_# H_# V H_# Y H_# U H_# Y H_# H_0# F H_# H_# F H_# E H_# H_# J H_# H H_# M H_# N H_# K H_0# H_# H H_# K H_# P H_# K H_# R H_# T H_# T H_# H H_# P H_0# P H_# V H_# H_# V H_# Y H_# H_# U H_# T H_# V H_# H_0# T H_# Y H_# V0 H_# V H_# H_# H_# Y H_# H_# H H_# 0 H_0# K0 H_# H_# H_# F H_# E H_# H_# F H_# H0 H_# K H_# H_0# F H_# F0 H_# H H_# 0 H_NM H_M# H H_PE# V H_WN 0 H_TPLK# K H_TETN# T0 H_RMP T0 REERVE P0 REERVE M H_THRMTRP# F0 H_NT# F H_NTR HT H_# H_# H_# H_# H_# H_# H_# H_0# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_0# H_# H_# H_# H_# H_# H_# H_# H_# H_# H_0# H_# H_# H_T0# H_T# H_VREF H_NR# H_PR# H_REQ0# H_PURT# H_VREF H_LKNN H_LKNP H_Y# H_EFER# H_NV0# H_NV# H_NV# H_NV# H_PWR# H_RY# H_TN0# H_TN# H_TN# H_TN# H_TP0# H_TP# H_TP# H_TP# H_HT# H_HTM# H_LK# H_REQ0# H_REQ# H_REQ# H_REQ# H_REQ# H_R0# H_R# H_R# H_PULP# H_TRY# H_PUPWR H_PLP# H_PRTP# F0 F EL M M K P F M F H H J F H H F0 0 0 K H Y0 R P0 L M K0 M0 H0 M Y0 K P J Y L W H W M Y F V0 T Y P N K P K T T T H0 F P F K0 J F H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_VREF H_VREF H_# [] H_T#0 [] H_T# [] H_#[..] [] H_NR# [] H_PR# [] H_R0# [] H_PURT# [] LK_LK_MH# [] LK_LK_MH [] H_Y# [] H_EFER# [] H_NV#0 [] H_NV# [] H_NV# [] H_NV# [] H_PWR# [] H_RY# [] H_TN#0 [] H_TN# [] H_TN# [] H_TN# [] H_TP#0 [] H_TP# [] H_TP# [] H_TP# [] H_HT# [] H_HTM# [] H_LK# [] H_REQ#0 [] H_REQ# [] H_REQ# [] H_REQ# [] H_REQ# [] H_R#0 [] H_R# [] H_R# [] H_TRY# [] H_F0 [] H_F [] H_EL [] TPT T H_PULP# [] H_PRTP# [] TPT T H_PWR [,] H_PLP# [] TPT T H_VREF 0.UF/V H_VREF LK_LK_MH# LK_LK_MH +VP F ignals Reference Voltage <00 mil ( hm) T/ trace., pace 0.UF/V R Khm % R Khm % +VP R Khm % R Khm % F ignals M Reference Voltage 0PF/0V 0PF/0V R HM H_TETN# UW stage : UTeK MPUTER N Poulsbo_HT () N/ ustom. 0H ate: Tuesday, July, 00 heet of 0

12 [] M_Q[:0] M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q U M_Q0 M_Q E M_Q M_Q E M_Q M_Q M_Q K M_Q K M_Q M_Q K0 M_Q0 M_Q M_Q J M_Q J M_Q M_Q M_Q K M_Q M_Q K M_Q J M_Q0 M_Q J M_Q M_Q K M_Q M_Q M_Q K0 M_Q M_Q J M_Q J M_Q0 M_Q J M_Q M_Q K M_Q M_Q E M_Q K M_Q M_Q J M_Q M_Q0 M_Q K M_Q J M_Q K M_Q J M_Q M_Q M_Q K0 M_Q J M_Q M_Q0 J M_Q M_Q M_Q M_Q K M_Q M_Q M_Q J M_Q K M_Q K M_Q0 J M_Q M_Q M_Q R YTEM MEMRY M_0 M_ M_ M_K0 M_K M_K0# M_K# M_KE0 M_KE M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_VREF M_R# M_# M_WE# M_0# M_# M_RMP M_RVENN M_RVENUT E E J E E J J K E K J E E E E E E E E E E M_0 M_ M_ M_LK_R0_R M_LK_R_R M_LK_R0#_R M_LK_R#_R M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M0 M_M M_M M_M M_M M_RMPUT M_RVENN M_RVENUT M_KE0 [,] M_KE [,] R_VREF [] Note: TTL LENTH <" M_R# [,] M_# [,] M_WE# [,] M_#0 [,] M_# [,] M_[:0] [,] M_Q[:0] [] M_M[:0] [,] R 0.hm +VTT_R 0.UF/V M_LK_R0_R M_LK_R_R M_LK_R0#_R M_LK_R#_R R hm R hm R hm R hm 0PF/0V 0PF/0V 0PF/0V 0PF/0V M_LK_R0 [] M_LK_R [] M_LK_R0# [] M_LK_R# [] UTek omputer N. ustom 0H Poulsbo_R () N/ ate: Tuesday, July, 00 heet of 0.

13 /_tem Modify RT circuit +V +V_PL [] E PF/0V LP_LKRUN# LK_P_E +V R R.Khm +V +V +V +V T T T RN 0Khm RN 0Khm RN 0Khm RN 0Khm T RN RN R RN RN R RN RN R [] [,] [,] [,] [,] [] [,] [] [] [] [] [] NT_ERRQ L_TP0 L_TP L_TP LP_0 LP_ LP_ LP_ LP_FRME# [] L LK [] L T [] LV_EN [] [] [] [] [] [] LP_0 LP_ LP_ LP_ LK_P_E LK_P_EU L_LKP L_LKN L_TN0 L_TN L_TN / item R 0Khm 0Khm 0Khm 0Khm 0Khm 0Khm 0Khm 0Khm 0KHM 0KHM 0Khm LP_FRME# NT_ERRQ LKLT_TRL LKLT_EN T T T T T00 T0 T0 R0 R L_TL_LK L_TL_T 0_# 0_M 0_WP _# _M _WP _# _M _WP T +V hm hm K J L F K0 K H 0 F F0 J K H J K0 H0 J H F H0 H K F K K0 H F0 0 0 F J K K J F F H H E LV pull-up U LP_0 LP_ LP_ LP_ LP_LKUT0 LP_LKUT LP_LKUT LP_LKRUN# LP_ERRQ LP_FRME# L_KLTTL L_KLTEN L_TL_LK L_TL_T L_LK L_T L_VEN L_LKP L_LKN L_TN0 L_TN L_TN L_TN L_TP0 L_TP L_TP L_TP 0_# 0_LK 0_M 0_LE 0_WP 0_PWR# 0_T0 0_T 0_T 0_T 0_T 0_T 0_T 0_T _# _LK _M _LE _WP _PWR# _T0 _T _T _T _# _LK _M _LE _WP _PWR# _T0 _T _T _T _T _T _T _T REERVE NTE:L_KLTEN N L_VEN PULL WN N NNETR HEET 0Khm RN 0Khm RN 0Khm RN 0Khm RN LP U LV / MM M NL PE V YTEM MMT RT L_TL_LK L_TL_T L LK L T REERVE REERVE0 REERVE REERVE REERVE RT_X RT_X NTVRMEN RTRT# EXTT PWRK LPRY# PRLPVR LPME RMRT# V_TRLLK V_TRLT V_LK V_LK# V_NT V_NT# V_TLL V_TLL# V_TVLKN V_TVLKN# V_RE V_RE# V_REEN V_REEN# V_LUE V_LUE# PE_PERn PE_PERp PE_PETn PE_PETp PE_PERn PE_PERp PE_PETn PE_PETp PE_LKNN PE_LKNP PE_MP PE_MP K0 E E F F0 F H J L L F0 V V0 U U N N P P0 M0 M T0 T R R W W 0 E 0 Y Y0 T RT_X RT_X H_NTVRMEN RT_RT# PM_PRLPVR 0 0 PE_MP 0.UF/V 0.UF/V T T T T T LK_PE_H# LK_PE_H REERVE [] REERVE [] REERVE [] 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V 0.UF/V R 0Khm +V PM_PWRK [] PM_LPRY# [,] T0 PM_LPME [] PM_RMRT# [] V_LK_H [0] V_T_H [0] V_LK [0] V_LK# [0] V_RE [0] V_RE# [0] V_REEN [0] V_REEN# [0] V_LUE [0] V_LUE# [0] PE_RXN [] PE_RXP [] PE_TXN [] PE_TXP [] PE_RXN [] PE_RXP [] PE_TXN [] PE_TXP [] LK_PE_H# [] LK_PE_H [] T0 _TT E E WT_N_P N/ M PF/0V 0PF/0V +.V +RTT R.hm % R0 Khm R Khm /NN_LTH T PM_LPRY# 0 T0 R Khm +V_RT /PL TW UF/0V PM_LPME 0 RT_X RT_X H_NTVRMEN R Place Near pen oor LRT L_JUMP RT attery & RT Reset ystem ehavior +V_RT 0 H ready to enter R 0Khm H ready to enter / R 0Mhm R 0Khm / item RTRT# R delay ~ms 0Khm RT_RT# X.Khz UF/0V PF/0V PF/0V RT rystal H_NTVRMEN Enable (default) isable 0 H internal VR enable strap for +V. & +V.0 VRs nternal VRM Enable trap LP pulled-up for E UTeK MPUTER N Poulsbo_LV/V N/ ustom 0H Tuesday, July, 00 ate: heet of 0.

14 [] U_PN0 U 0 U PRT [] U_PP0 [] U_PN U U PRT [] U_PP [] U_PN U U PRT / item [] U_PP [] U_PN U. [] U_PP U / item [] U_PN U luetooth [] U_PP [] U_PN U amera [] U_PP [] U_PN U ard Reader [] U_PP / item [] U_#0 [] U_# +V R 0Khm [0] E_REQ [0] E_RY [0] E_RQ [0] E_K# [0] E_W# [0] E_R# [0] E_# [0] E_# +V E_[:0] [0] E_[:0] E_[:0] [0] E_[:0] UR_PN R.hm % _Z_TLK RN 0KHM E PF/0V /RF /_tem RF /_tem RN 0KHM E_RY E_RQ U_#0 U_# U_# U_# U_# U_# U_# UR_PN E_ E_ E_0 E_ E_ E_ E_ E_ E_0 E_ E_ E_ E_ E_ E_ E_ E_ E_ E_0 U E U_N0 E U_P0 U_N 0 U_P 0 U_N U_P U_N U_P Y U_N Y0 U_P V0 U_N V U_P U U_N U U_P T0 U_N T U_P R U_0# W U_# R U_# U U_# U_# U_# W U_# U U_# U_RN U_RP J PT_REQ PT_RY PT_ERQ PT_K# PT_W# F PT_R# PT_# E PT_# K PT_ J PT_ H0 PT_0 0 PT_ E PT_ H PT_ PT_ F0 PT_ PT_0 PT_ J PT_ PT_ PT_ F PT_ PT_ L PT_ PT_ PT_ 0 PT_ <m +VP +VP U /F PT/E No-onnect M LK /F H U YTEM Ps JT Termination Voltage VTT_ W VTT_ V VTT_ U VTT_ T VTT_ R VTT_ P VTT_ N VTT_ M VTT_ L VTT_0 K VTT_ J VTT_ H VTT_ VTT_ F VTT_ E VTT_ VTT_ VTT_ VTT_0 Y VTT_ W VTT_ V VTT_ U VTT_ T VTT_ R VTT_ P VTT_ N VTT_ M VTT_ M VTT_ TRT# N TM M0 T K T M TK N TPPU# H0 RTRY# H0 REET# RTWRN K0 PU0 U PU N PU N PU R WKE# N M# 0 THRM# F PE# P0 P0 P K0 P F P P K P H P F P J P H P K REERVE U REERVE U _REFLKNN L _REFLKNP L _REFLKNN E _REFLKNP E LKREQ# LK H U_LK W ULK J H_TRT# H_TM XP_T_H XP_T XP_TK_ PM_THRM# R FM_E_EN R ULK M_LERT# M_LERT# K _M_T M_T R _M_LK M_LK H E0 PF/0V /RF /_tem RF 0UF/.V _PKR PKR J _LK H_LK K H_YN E HM RN RN HM RN H_RT# HM H_0 F H_ H_ HM RN H_KEN# E H_KRT# H T T T T UF/.V TP_PU# [] PM_RTRY# [] RT# [,] PM_RTWRN [] PM_LEVELWN# [,,,] PU_LEVELWN# [] PM_PWRTN# [] +VP_V0 [] PE_WKE# [,] EXTM# [] T0 T LK_M_UM# [] LK_M_UM [] LK_L_LV# [] LK_L_LV [] LK_H [] T R UF/.V _M_T [] _M_LK [] 0Khm +VP / item K_# [] T_# [] H_P_0 [] R_REER_EN# [] MR_N# [] / item H_P_ [] LN_FF [] MNR_EN# [] R_MEM_NF [] LPVR# []._V [] WLN_LE [] T0 / item _Z_TLK [] _Z_YN [] _Z_RT# [] _Z_N0 [] T0 _Z_UT [] T R 0.UF/V 0.UF/V [] LK_PEREQ# [] _M_LK [] _M_T / item [] _M_LK [] _M_T +V PM_THRM# M_LERT# EXTM#._V K_# PE_WKE# +V PM_LEVELWN# R 0Khm PU_LEVELWN# R 0Khm +VP_V0 R 0Khm WLN_LE R 0Khm /0 item +V +V RN.KHM RN.KHM R 0Khm R Q UMKN Q UMKN R R R 0Khm R 0Khm R 0Khm R 0Khm R Khm RN.KHM THRM_LERT# [] +V +V +V +V RN.KHM M_LK [,] M_T [,] M_LK [,] M_T [,] UTeK MPUTER N N/ H_Poulsbo_PM/U/E/Z() ustom. 0H ate: Tuesday, July, 00 heet of 0

15 +VP +VP +VP [] H_EL R 0Khm R 0Khm [] H_F [] H_F0 R 0Khm R 0Khm R 0Khm R 0Khm trap Function F/R Frequency elect raphics Frequency elect ingal Name trap omment H_EL 0 0 H_F 0 0 H_F0 fx_freq F 00 Note: lock Frequencies are in Mhz efault Frequency determined by F speed F/R/raphics Frequency elect R0 0Khm +V R 0Khm +V M (hipset Microcode) ase ddress P P0 ddress 0 0 0xFFF xFFF xFFF0000 (default) 0xFFFE0000 REERVE Value elects the starting address that the M will use to start fetching code. (P is the most significant) [] H_P_ [] H_P_0 R 0Khm R 0Khm LP_LKUT[0] uffer trength 0 Reserved 0 Load (efault) Reserved elects the drive strength of the LP_LKUT[0] clock. Loads M (hipset Microcode) ase ddress +V +V R 0Khm [] REERVE R 0Khm LP_LKUT[0] rive trength 0Khm R 0Khm R P : (rank) PU :T R Memory onfig R_MEM_NF [] UTek omputer N. PUL_TRP() 0H N/ ate: Tuesday, July, 00 heet of 0.

16 +V_REF +.V_H_U +V_REF +VU_REF +VU_REF +.V_H_U +VP +.V +.V +.V +VU +V +.V +V +V_RT +V +.V +.V +.V +.V +V +V +V +V +V +VU +.V +.V ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N Poulsbo_PWER (). 0H N/ 0 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N Poulsbo_PWER (). 0H N/ 0 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N Poulsbo_PWER (). 0H N/ 0 m(m) < m. m(0m) m 00m 0m 0m m 0m 0m +VU_REF +V_REF m /_tem T T 0UF/.V 0UF/.V 0 0.UF/V 0 0.UF/V 0.UF/V 0.UF/V T T 0.UF/V 0.UF/V 0 0.UF/V 0 0.UF/V 0.UF/V 0.UF/V R0 r00_h R0 r00_h 0.UF/V 0.UF/V L /00Mhz L /00Mhz R00 /00Mhz R00 /00Mhz 0.UF/V 0.UF/V UF/.V UF/.V 0.UF/V 0.UF/V UF/.V UF/.V R0 r00_h R0 r00_h UF/.V UF/.V V_ M V_0 M V_ M0 V_ M V_ M V_ M V_ M V_ M0 V_ M V_ M V_ K V_0 K V_ K0 V_ K V_0 K V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_0 R V_ P V_ P V_ N V_ N V_ M V_ M V_ M V_ M V_ K REERVE0 P REERVE P VU_ VU_ VU_ VU_ VU_ Y VU_ Y VM_0 W VV_0 L VV_0 K REERVE REERVE V_ N V_ N V_ N V_ N V_ N V_ N V_ N V_ N V_ M0 V_0 M V_ M V_ M V_ M V_ M0 V_ M VU_ R VU_ U VU_ T VPUU_ VPUU_ Y VM_00 W VM_0 W VM_0 W VM_0 W VM_0 W VM_0 W VM_0 W VM_0 W VM_0 W REERVE REERVE VPE_0 V VLV_0 VV_0 K V_ K V_ K0 V_ K V_ K V_ H V_ H V_ H0 V_ H V_ H V_0 H V_ H V_ H0 V_ H V_ H V_ F V_ F V_ F0 V_ F V_ F V_0 F V_ F V_ F0 V_ F V_ F V_ 0 V_ V_ V_ V_ V_0 0 V_ V_ V_ 0 V_ V_ V_ V_ V_ 0 VPE_ U VPE_ T VPE_ T VPE_ T V_ V_ V_ Y0 V_ Y V_ Y V_ Y V_ Y VPE_ T VPE_ R VPE_ P VPE_ P VPE_ N V_0 Y0 VLV_00 F VV_00 J VM_ W VM_ V VM_ V VM_ V VM_ V0 VM_ V VM_ V VV_0 H VV_0 H VPE_00 M VM_ V VM_ V VM_ V0 VM_ V VM_ V VM_ T0 VM_ T VM_ T VM_ T VM_0 T VM_ T0 VM_ T VM_ T VM_ P VM_ P VM_ P0 VM_ P VM_ P VM_ P VM_0 P VM_ P0 VM_ P VM_ P V_ Y V_ Y V_ V V_ V V_ V0 V_ V V_ V REERVE N REERVE N V_ V V_ V V_0 V0 V_ V VRT VH_ K VH_ J VUPLL VHPLL 0 VHPLL VUU E VPE W VPLL E VPEPLL N VPLL VREF_ K V_ V VREFU V_0 T V_ T V_ T0 V_ T V_ T V_ T V_ T V_ T0 V_ T V_ T VLV_ F VLV_ E VLV_ V_ M REERVE W VPUU_ W VPE Y VUU V UE V UE UF/.V UF/.V UF/.V UF/.V UF/.V UF/.V 0.UF/V 0.UF/V 0.UF/V 0.UF/V UF/.V UF/.V UF/.V UF/.V 0.UF/V 0.UF/V 0.UF/V 0.UF/V UF/.V UF/.V R0 /00Mhz R0 /00Mhz UF/.V UF/.V R0 r00_h R0 r00_h T T UF/.V UF/.V TW TW UF/.V UF/.V 0UF/.V 0UF/.V T T L /00Mhz L /00Mhz R0 /00Mhz R0 /00Mhz UF/.V UF/.V R0 r00_h R0 r00_h 0.UF/V 0.UF/V 0UF/.V 0UF/.V 0 0.UF/V 0 0.UF/V 0.UF/V 0.UF/V TW TW 0.UF/V 0.UF/V

17 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N PUL_ (). 0H N/ 0 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N PUL_ (). 0H N/ 0 ate: heet of ustom Tuesday, July, 00 UTeK MPUTER N PUL_ (). 0H N/ 0 V_ H0 V_ H V_ H V_ H V_ H V_ H0 V_ H V_ H V_ H V_0 H V_ H V_ V_ V_ V_ V_ V_ F0 V_ F V_ F V_0 F V_ F V_ F0 V_ F V_ F V_ F V_ F V_ F0 V_ F V_ F V_0 F V_ F V_ F0 V_ F V_ F V_ F V_ F V_ E V_ E V_ E V_0 E V_ V_ V_ V_ V_ 0 V_ V_ V_ V_ V_0 0 V_ V_ V_ V_ V_ 0 V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ 0 V_ V_0 V_ V_ V_ 0 V_ V_ V_ V_ V_ 0 V_ V_0 V_ V_ V_ V_ V_ V_ V_ Y V_ Y V_ Y0 V_0 Y V_ Y V_ Y V_ Y V_ Y0 V_ Y V_ Y V_ Y V_ Y V_ Y0 V_00 Y V_0 Y V_0 Y V_0 Y V_0 W V_0 W V_0 W V_0 W V_0 W V_0 W V_0 W V_ W V_ W V_ V V_ V V_ V V_ V0 V_ V V_ U V_ U V_0 U V_ U V_ U V_ U V_ U V_ U V_ U V_ U V_ U V_ U V_0 U V_ U V_ U V_ U V_ U V_ U V_ T V_ T V_ T V_ T0 V_0 T V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_0 R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ R V_ P V_ P V_0 P V_ P0 V_ P V_ N V_ N V_ N V_ N V_ N V_ N V_ N V_00 N V_0 N V_0 N V_ N V_0 N V_0 N V_0 N V_0 N V_0 N V_0 N V_ N V_ N V_ M V_0 M V_ M V_ M0 V_ M V_ M V_ M0 V_ L V_ L V_ L V_0 L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_0 L V_ L V_ L V_ K V UF V UF V_ K V_ K V_ K0 V_0 K V_ J V_ J V_ J V_ J V_ J V_ J V_ J V_ J V_ J V_0 J V_ J V_ J V_ J V_ J V_ J V_ J V_ J V_ J V_ J V_0 J V_ H V_ H V_ H V_ H0 V_ H V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_00 V_0 V_0 V_0 V_0 V_0 F V_0 F V_0 F V_0 F0 V_0 F V_0 E V_ E V_ E V_ E V_ E V_ E V_ E V_ E V_ E V_ E V_0 E V_ E V_ E V_ E V_ E V_ E V_ V_ V_ V_ 0 V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ 0 V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ Y V_ Y V_ Y V_ Y0 V_ Y V_ Y V_ W V_ W V_ W V_ W V_ W V_ W V_ W V_ W V_ W V_00 W V_0 W V_0 W V_0 W V_0 W V_0 W V_0 W V_0 W V_0 W V_0 V V_0 V V_ V V_00 V0 V_0 V V_0 V V_0 V V_0 U V_0 U V_0 U V_0 U V_0 U V_0 U V_0 U V_ U V_ U V_ U V_ U V_ U V_ U V_ U V_ U V_ U V_0 U V_ T V_ T V_ T V_ T0 V_ T V_ T V_ R V_ R V_ R V_0 R V_ R V_ R V_ R V_ R V_ R V_ P V_ P V_ P V_ P V_0 P0 V_ P0 V_ P V_ P V_ P V_ P V_ P0 V_ P V_ P V_ P V_0 N V_ N V_ N V_ N V_0 N V_ N V_ M V_ M V_ M V_ M0 V_ L V_ L V_ L V_ L V_0 L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_ L V_0 L V_ L V_ L V_ L V_ L V_ L V_ K V_ K V_ J V_0 J V_ J V_ J V_ J V_00 J V_0 J V_0 J V_0 J V_0 J V_0 H V_0 H V_0 V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_0 E V_0 E V_0 E V_ E V_ E V_0 E V_ E V_ E V_ E V_0 E V_0 E V_0 E V_ E V_ E V_ E V_ E V_ E V_ E V_ E V_ 0 V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_0 V_0 V_0 V_0 V_ V_ V_ V_ V_ V_ V_ 0 V_0 V_ V_ V_ V_00 V_000 V_00 V_00 K V_00 K V_00 K V_00 K V_00 J V_00 J V_00 J V_0 J V_0 J V_0 J V_0 J V_0 H0 V_0 H V_0 H V_0 H V_0 H V_00 H0 V_0 H V_0 H V_0 H V_0 H V U V U

18 M_ M_0 M_ T0 T R_VREF M_LK_R0 M_LK_R0# M_LK_R M_LK_R# M_LK M_T M_M0 M_M M_M M_M M_M0 M_M M_M M_M M_M M_M M_M M_M M_M M_M M_M M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 T M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q0 M_Q M_Q M_Q M_Q M_Q M_Q T0 M_Q M_Q M_Q0 +.V +V +.V +V +.V +VTT_R +VTT_R M_LK [,] M_#0 [,] M_# [,] M_LK_R0 [] M_LK_R0# [] M_LK_R [] M_LK_R# [] M_KE [,] M_# [,] M_R# [,] M_WE# [,] R_VREF [] M_Q[:0] [] M_M[:0] [,] REERVE [] REERVE [] M_Q[:0] [] M_[:0] [,] M_T [,] M_KE0 [,] ate: heet of 0 Tuesday, July, 00 UTek omputer N. R MM. 0H N/ ate: heet of 0 Tuesday, July, 00 UTek omputer N. R MM. 0H N/ ate: heet of 0 Tuesday, July, 00 UTek omputer N. R MM. 0H N/ Near RM Near H Near RM Near RM R slot ymbol use 000 /_tem /_tem /_tem MR 0Khm % MR 0Khm % MR 0Khm % MR 0Khm % M 0PF/0V M 0PF/0V M 0PF/0V M 0PF/0V /P # 0 # K0 0 K0# K K# KE0 KE 0 # R# 0 WE# L T0 T M0 0 M M M M 0 M M 0 M Q0 Q Q Q 0 Q Q Q Q Q#0 Q# Q# Q# Q# Q# Q# Q# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q 0 Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q 0 Q Q Q Q Q Q0 Q Q Q 0 Q Q Q Q Q Q Q0 0 Q Q _ Q MM R_MM_00P MM R_MM_00P MR HM MR HM M 0PF/0V M 0PF/0V M 0UF/.V M 0UF/.V MR MR M 0PF/0V M 0PF/0V MR MR M0 0.UF/V M0 0.UF/V M 0.UF/V M 0.UF/V R0 0Khm R0 0Khm V V V V V V V V V V0 0 V V 0 VP N N 0 N 0 N NTET VREF V V V V V V V V V V0 V V V V V V V V V V0 V V V V 0 V V V V V V0 V V V V V V 0 V V V V0 V V V V V V V V V V0 V V V V 0 V V 0 V NP_N 0 NP_N 0 MM R_MM_00P MM R_MM_00P MR 0Khm MR 0Khm MR MR M 0.UF/V M 0.UF/V M 0.UF/V M 0.UF/V M 0.UF/V M 0.UF/V M 0UF/.V M 0UF/.V M 0.UF/V M 0.UF/V M 0.UF/V M 0.UF/V MR HM MR HM MR MR

19 M_M[:0] [,] M_[:0] [,] /_tem +VTT_R /_tem [,] M_R# M_R# M_M0 M_ M_M M_M M_M M_M M_M MRNH HM MRNF HM 0 MRN HM MRN HM MRN HM MRNE HM MRN HM MRN HM M M M M 0.UF/V 0.UF/V 0.UF/V 0.UF/V [,] [,] [,] [,] M_# M_# M_WE# M_#0 M_# M_# M_WE# M_0 M_M0 M_M M_M M_#0 MRN HM MRN HM MRNE M HM MRNF M HM 0 MRN M0 HM MRNH M HM MRN HM MRN HM 0.UF/V 0.UF/V 0.UF/V 0.UF/V [,] [,] M_KE M_KE0 M_M M_M M_M M_M M_M M_KE M_ M_KE0 M_M MRN HM MRN HM MRNE HM MRN HM MRN HM MRNH HM MRNF HM 0 MRN HM R HM M M M M 0.UF/V 0.UF/V 0.UF/V 0.UF/V UTek omputer N. 0H N/ R_Termination ate: Tuesday, July, 00 heet of 0.

20 +V +.V [0,,,,,0,,] +.V L /00Mhz 0UF/.V +.V R 0Khm High:0H R 0Khm Low:H /0 item [] RT_RT# XN_V PF/0V [] RT T [] RT LK UF_RT# +.V_V_H TTPT R 0Mhm 0000 Mhz X XTL Height mm 0.UF/V +.V_V_H RTR_RT#_R V_T V_LK +.V_V_H X_V [] V_RE [] V_RE# [] V_REEN [] V_REEN# [] V_LUE [] V_LUE# [] V_LK [] V_LK# 0.UF/V RTR_RT#_R TW R0 R N/ PF/0V 0.UF/V 0 T _PRM _PRM V REET* P P ntp V N U T V [] RT_RE [] RT_REEN [] RT_LUE V H-TF-TR N V_LK+ V [] 0 0 N V_+ N V [] V_+ N N PLK- V_LK- V_- V_- V_R- V0 V_R+ [0] V N T N 0 0 RPLL 0 ET RT_ET N N N0 _PLL PLK+ V_PLL V_PLL X 0 X/FN _PLL VYN V HYN VV +.V_V_PLL X_V XN_V RT_VYN +.V_V_H RT_HYN 0.UF/V +V_V_H 0.UF/V +V_V_H [] V_T_H [] V_LK_H / item RT_VYN [] RT_HYN [] R0 0Khm +V +.V R R RTR_RT#_R 0Khm Q N00 R0.Khm Q PM0 E 0 UF/V R0.Khm R 0Khm % R.Khm % 0UF/.V 0.UF/V 0.UF/V 0UF/.V RN.Khm L /00Mhz [] RT_PWR_EN# [] 0UF/.V L /00Mhz +V_V_H RT_N# RN.Khm L /00Mhz +.V L N/ /00Mhz +.V +V +V +V_V_H UTek MPUTER N +V V_T V_LK H_V_RT RN.Khm Q UMKN UMKN +.V Q Q00 0 R0 R V_ Level hift 0 0.UF/V RN.Khm 0H /0 item N/ ate: Tuesday, July, 00 heet 0 of 0.

21 [0] RT_RE [0] RT_REEN VR hm % VR hm % VL VL 0.0uH PF/0V 0.0uH 00 PF/0V RT_RE_N +V_RT PF/0V RT_REEN_N 0 PF/0V /_tem VR r00_h 0.UF/V /_tem /_tem +V_RT_F FJTP 0.UF/V +V [0] RT_LUE VR hm % VL 0.0uH 0 PF/0V RT_LUE_N 0 PF/0V RT_RE +V V/ VU V/ RT_REEN /_tem /0 item RT_LUE V/ V/ RT_HYN_N +V VR RT_HYN_N 0 0 for E measurement P-Z 0 0.UF/V HM r00_h 0 PF/0V U :VR & VR--> HM U :VR & VR -->0 HM [0] RT_HYN [0] RT_VYN VQ UMKN VQ UMKN RT_HYN_L RT_VYN_L VR HM r00_h RT_VYN_N 0 PF/0V U UFFER: Unidirectional buffers (high impedance buffers) are required on both HYN and VYN to prevent potential electrical overstress and illegal operation of the MH, since some display monitors may attempt to drive HYN and VYN signals back to MH. +V VWPT RT_VYN_N [0] RT T +V_RT_F /_tem RN 0KHM +V_RT_F /_tem /_tem RT T_N 0 PF/0V [0] RT_N# +V RT_RE_N RT_REEN_N RT_LUE_N R R 00Khm RT_N#_R +V_RT 0 V RT T_N RT_HYN_N RT_VYN_N RT LK_N /_tem +V 0 VWPT +V VWPT RT T_N RT LK_N +V RT_N#_R RN 0KHM [] RT_N _U_P P 00M /_tem VWPT [0] RT LK RT LK_N 0 PF/0V /0_tem Q N00 UTek omputer N. 0H nboard V N/ ate: Tuesday, July, 00 heet of 0.

22 [] L_TP VRN 0HM L_TP_R /_tem [] L_TP VRN 0HM VRN 0HM L_TP_R L_TP0_R [] L_TP0 [] L_TN L_TN_R [] L_TN L_TN_R [] L_TN0 L_TN0_R 0HM 0HM 0HM VRN /_tem VRN VRN VRN0 0HM [] L_LKP L_LKP_R /_tem FR RF [] L_LKN E E E E E E E E E E0 L_LKN_R 0HM VRN0 PF/0V L_TN0_R PF/0V L_TP0_R [] LV_EN PF/0V L_TN_R [] LKLT_TRL PF/0V L_TP_R [] L_PWM_ PF/0V L_TN_R PF/0V L_TP_R PF/0V L LK PF/0V L T PF/0V L_LKN_R [] L T [] L LK PF/0V L_LKP_R [0,0,,,,0,,] UF_RT# TW [] LKLT_EN L_EN VR [] L_KFF# +VE L_EN R R L_LKP_R L_LKN_R L_TP_R L_TN_R L_TP_R L_TN_R L_TP0_R L_TN0_R +V_L 0Khm +L_LEN +V_L V LV_N E E E E E WT_N_0P 0000 M R R +V_L +VE E PF/0V /EM [] +V LV_EN R Mhm Q0 0 0.UF/0V R 00KHM PQ UMKN R 00KHM +V_L 0 0 0UF/.V 0.UF/V UF/0V lose to L onnector L V witch acklight Enable ischarge +V E VWPT +V U V utput +V 00 /_tem / item T0 _T_Y PR 00KHM P 0.UF/V PR 00Khm PQ UMKN L_EN PQ 0 UF/V +L_LEN P 0.UF/V _T_Y +L_LEN PR r00_h TW R 00KHM / item ER 00Khm L_E_R# [,] E 0PF/0V E UF/0V E 0.UF/V E--F UTek omputer N. LV onn N/ ustom 0H Tuesday, July, 00 ate: heet of 0.

23 / item / item +V_ /. + /. /. UM_PWR +V_ UM_PWR W PF/0V /. UM_REET UM_LK UM_T W PF/0V /. W PF/0V /. +V lose to _N / item UM_T UM_LK UM_REET _RT# LN_FF UPN UPP _N 0 0 E 0 0 E FP_N_P /. M 00 [] U_PN UPN _RT# UF_RT# [0,0,,,,0,,] / item UF_RT# [0,0,,,,0,,] [] U_PP WRN 0HM /. UPP +V_ PF/0V 00UF/.V % WR 0Khm /. UM E NP_N NP_N E 0 +V +V_ WR r00_h /. E PF/0V /EM LN_FF LN_FF [] PF/0V W UF/0V /. W PF/0V /. M_N_P 000P /. M R / / item R0 00Khm MR_N# [] E PF/0V /EM E PF/0V /EM /. WRN 0HM R / TW R 00Khm / item.uf/0v Q0 N00 Reset /_tem UTek omputer N.. Module & External ntenna 0H N/ ate: Tuesday, July, 00 heet of 0.

24 +V_PE M_PE_WKE# [] T_PRRTY [] H_T M_LKREQ# [] LKREQ#_MNR N/ WR [] LK_PE_MNR# [] LK_PE_MNR [] PE_RXN [] PE_RXP [] PE_TXN [] PE_TXP +V_PE WLN WKE#.V_ Reserved Reserved.V_ LKREQ# UM_PWR UM_T 0 REFLK- UM_LK REFLK+ UM_REET UM_VPP Reserved/UM_ Reserved/UM_W_LE# 0 PERT# PERn0 +.Vaux PERp0.V_ M_LK 0 PETn0 M_T PETp0 0 U_- Reserved U_+ Reserved 0 Reserved LE_WWN# Reserved LE_WLN# Reserved LE_WPN# Reserved.V_ Reserved 0 Reserved0.V_ NP_N NP_N MN_P_LTH_P M V_PE +VU_PE_R WLN_N PERT# LE_WLN# WR WR /EH PEK T +VU_PE +V_PE MNR_EN# +V +V_PE WR r00_h /WFRF WQ /WFP 0 WR Khm /WFP W 0.UF/V /WFP +V_PE W 0.UF/V W 0.UF/V W 0UF/.V W 0UF/.V +VU_PE WLN_N M_PE_WKE# PE_WKE# [,] WQ N00 N/ MNR_EN# WQ N00 T [0,0,,,,0,,] UF_RT# TPT MNR_EN [,] PM_LPRY# +V +V_PE_R UF_RT# PERT# 0 W 0.UF/V WU YRTZ HNZ TYZ V_P_ V_P_ VUT_P_ VUT_P_ PERTZ N V PTFE /WFP Z 0 RLKEN V_UX VUT_UX V_L_ V_L_ VUT_L_ VUT_L_ PPE# PU# +V_PE +V_PE_R WR r00_h /WFP REFLK_EN +VU +VU_PE +.V +.V_PE PPE# WR /WFP MNR_EN# [] PU# WR [] +.V +VU LKREQ#_MNR WR /WFRF +.V_PE +VU_PE WR /WFRF MNR_EN# +V RN 0KHM /WFP UF_RT# WQ N00 /WFP WR0 /WFRF W TW /WFP +V_PE RN 0KHM /WFP PERT# W0 0.UF/V /WFP +V +VU +.V +VU_PE +.V_PE REFLK_EN WQ N00 /WFP W 0.UF/V W 0.UF/V W 0.UF/V /NE W UF/0V W 0.UF/V W 0UF/.V W0 0.UF/V /NE /NE W 0.UF/V /NE UTek omputer N. Mini WF N/ ustom 0H. Tuesday, July, 00 ate: heet of 0

25 +V +V WR 0Khm W UF/0V /T LT_N [] T_PRRTY [] T_# [] H_T UP UN T_PRRTY 0 0 Wto_N_0P /T M 0000 [] U_PN WRN 0HM T onn UN [] U_PP UP WRN 0HM UTek omputer N. luetooth N/ 0H ate: Tuesday, July, 00 heet of 0.

26 +V [] FN0_TH +V RN.KHM 0UF/0V 0.UF/V c00 RN.KHM R +V.Khm % +V_R Q PM0 E RN.KHM FN_PWM RN.KHM +V FN_TH 0 00PF/0V 00PF/0V FN E E Wto_N_P M 000 +V_THRM R 00Khm PM_THERM# +V Q N00 FRE_FF# [0,] [] FN0_PWM R +V_THRM +V +V Thermal ensor +V_THRM 0.UF/V R R U [] M_LK LK V [] M_T T + H_THERM [] [] THRM_LERT# LERT# - H_THERM [] PM_THERM# T_RT# T 00EP Near PU H_THERM Thermal ensor Power upply U use 00000, second source PF/0V H_THERM UTek omputer N. ustom 0H FN_THERML ENR N/ ate: Tuesday, July, 00 heet of 0.

27 +V R r00_h +VU R r00_h +V_LN L 0.UF/V Pin L 0UF/.V +.V_LN L UF/.V L 0.UF/V L 0.UF/V +.V_TRN +.V_LN LL.UH L0 UF/0V L L 0.UF/V 0UF/.V Pin +.V_LN VL L UF/.V LN Main Power nternal.v Regulator VH Pin /_tem /_tem L 0.UF/V Pin VL +.V_LN PE_TXN [] +.V_RE VP Pin +.V_LN +V_LN +.V_LN LE_T VLV PE_TXP [] /_tem LK_PE_LN [] LK_PE_LN# [] PE_RXP [] +.V_LN /_tem Pin VLV Pin [0,0,,,,0,,] UF_RT# [,] PE_WKE# L 0.UF/V / item +.V_LN VH VP LX_XTLUT LX_XTLN VLV LN_R /0 item +.V_LN VL_ N TETME MT VL_ MLK LR +.V_RE TW_T 0 +V_LN TW_LK LR VL_ LKREQn LR N VH_ +.V_LN +.V_LN PE_RXN [] VL +.V_LN LK_PEREQ# [] VLV Pin +.V_LN +.V_LN [] LN_M_0+ [] LN_M_0- L 0.UF/V L L 0.UF/V 0.UF/V L UF/.V L L L 0.UF/V 0.UF/V 0.UF/V LE_T LR.Khm L 0.UF/V LR r00_h L 0.UF/V LR r00_h LR.Khm L 0.UF/V /Wake R LR.KHM % LU LX VV_ PERTn WKEn VV_ V EL_MHz V_RE XTL 0 XTL V_RE R R_LE LE_0_00n LE_Tn V_RE_ V_RE_ RX_N RX_P VL REFLKP REFLKN 0 VL_ TX_P TX_N TRXP0 TRXN0 VH VL_ TRXP TRXN VH_ N N VL_ N N 0 L 0.UF/V L0 0.UF/V [] LN_M_+ [] LN_M_- R LX_XTLN LR close to LU LR 0Mhm LX Mhz LX_XTLUT LK_M_LN [] R hm /_tem L 0.UF/V XR L LR0.hm % LR.hm % LR.hm % LN_M_0+ LN_M_0- LN_M_+ 0.UF/V XR LR.hm % LN_M_- L PF/0V L PF/0V MHz rystal scillator lose to LU Media dependent interface Terminated UTek omputer N 0H R/R N/ ate: Tuesday, July, 00 heet of 0.

28 +.V_TRN LR r00_h L 0.UF/V N N [] LN_M_+ [] LN_M_- [] LN_M_0+ [] LN_M_0- L 0.UF/V L UF/.V LU R+ R- RT PTT/TTXT T+ TX+ T- TX- RX+ RX- RXT N N 0 LN_RXP_L LN_RXN_L LN_RXT LN_TXT LN_TXP_L LN_TXN_L LR LR hm hm F L 000PF/KV L 00PF/0V LR LRN /_tem LN_RXN_L 0HM LN_RXN LN_TXN_L LRN 0HM LN_TXN LN_RXP_L LN_RXP LN_TXP_L LN_TXP LRN 0HM LN onnector ommon hoke LRN 0HM LR LR F hm hm LN_N LN_N LN_RXN LN_RXP LN_TXN LN_TXP LN_N 0 0 LN onnector WT_N_0P M 0000 UTek omputer N. 0H RJ N/ ate: Tuesday, July, 00 heet of 0.

29 / item +V / item 0UF/.V c00 / item / item +V_H _LK_R / item FR RF amera U ommon hoke 0.UF/V /RF [] U_#0 / item /_tem +.V [0] T_TXP [0] T_TXN [0] T_RXN [0] T_RXP [] U_PN [] U_PP /0 item [] _Z_UT [] _Z_N0 [] _Z_YN [] _Z_TLK [] _Z_RT# [] P_# [] PWR_W# [] U_PN0 [] U_PP0 [] U_PN +V [] U_PP +V_U U_PN U_PP +VU /_tem +V R _LK_R PWRTN_LE PWR_W# +V +V_H U_N E E 0 0 E_PEL# E Master/ lave etting E_# iag trapping +V H: lave L: Master / item R 0Khm R E_# [0] +V FP_N_0P 000F M +V +VU +V_H [] PWR_W# 0 0.UF/V T +V 0.UF/V PWR_W# +V 0UF/.V c00 R 0 0.UF/V / item PWR_W_E# [,] [,] L_E_R# [] PWR_LE_UP YQ UMKN L_E_R# YQ UMKN PWR_LE_UP T +V PWRTN_LE / item / item [] PWR_LE_UP [] H_LE_REEN# [] H_LE_RNE# [] WLN_LE FLH_LE# [] aps_le# [] R_REER_EN# [] LK_M_REER UPN UPP E 0.UF/V / item /EM +VU R_N 0 0 E 0 0 E FP_N_0P M 000T R0 00Khm Flash LE R 0Khm [] U_PN RN 0HM UPN R debug only [0] FLH_LE_# FLH_LE# [] U_PP UPP RN 0HM / item / item UTek omputer N. 0H Flash onn N/ ate: Tuesday, July, 00 heet of 0.

30 +V L /00Mhz /P X Mhz /P X_XTLN X_XTLUT close to U R /P R ME0 LK_M_T [] VH /P R /P R +V 0UF/.V 0.UF/V 0Mhm R need to stuff R /P /P /P /P if X used R ME KHM R /P /P PR_RT# +V +V.ME[:0]=elect UM spped when FXM is set 00:00M/s ; 0:M/s 0:0M/s ; :Reserved +.V L /00Mhz /P 0UF/.V /P VL 0.UF/V /P PF/0V /P PF/0V /P UF/.V /P FXM R /P R /P +V.FXM=0,uto adjustable speed rate according set Feature ommand FXM=,speed rate depend on Mode[:0] setting JMH0 only simulate PT as evice 0 MHz rystal scillator +V +.V Power on REET PMEN R /P R0 /P +V.PMEN=0 power managerment function isable PMEN= power managerment function Enable +V +.V +V 0UF/.V /P 0.UF/V /P 0.UF/V /P 0.UF/V /P 0.UF/V /P TEN R /P R /P +V.TEN=0,isable the T output pins, T / output pins are Hi-Z. TEN=,Enable T output /_tem0 T0 T0 T0 +.V TPT TPT TPT 0 RQ K# RY R# W# REQ 0 +V PHY_RY P_URT_RX P_URT_TX P_# # # U 0 0 P NTRQ MKn RY VK Rn Wn 0 MRQ 0 0n n Pn U V U VK PHYRY 0 V VK 0 REETn PMEN FXM LKEL LKEL0 RV Pn N 0 PMEN FXM FLH_LE_# TXP TXN 0 VL RXN RXP REXT VH XTL XTL TEN RV 0 ME ME0 PRn JMH0P-Q /P P_RT# 0 _T_TXP _T_TXN VL _T_RXN _T_RXP TR VH X_XTLUT X_XTLN TEN ME ME0 PR_RT# +.V 0 +V 0.0UF/V N/ 0.0UF/V N/ 0.0UF/V N/ 0.0UF/V N/ R Khm % /P T_TXP [] T_TXN [] T_RXN [] T_RXP [] 0 E_0 E_ E_ E_ E_ E_ E_ E_ E_ E_ 0 E_0 E_ E_ E_ E_ E_ 0 E_0 E_ E_ REQ E_REQ W# E_W# R# E_R# RY E_RY # E_# # E_# K# E_K# RQ E_RQ R /P P_# E_# R /P P_RT# UF_RT# FLH_LE_# /_tem E_[:0] [] E_[:0] [] E_REQ [] E_W# [] E_R# [] E_RY [] E_# [] E_# [] E_K# [] E_RQ [] E_# [] UF_RT# [0,0,,,,,,] FLH_LE_# [] UTek omputer N. 0H PT T T N/ ate: Tuesday, July, 00 heet 0 of 0.

31 [] [] U_PP U_PN URN 0HM URN 0HM U_PRT UPP UPN +V_U_N For E U UPP VWPT /U U UPN VWPT /U +V_U UF./V [] U_# +V_U +V_U_N UL /00Mhz l00_h UR.Khm UR.Khm + U UF/.V UPN UPP U 0.UF/V U P_ P_ U_N_XP M 000T UTek omputer N. 0H U Port N/ ate: Tuesday, July, 00 heet of 0.

32 [] +V [] [] [] [0,0,,,,,0,] [] T_N [] /0 item [] NT_ERRQ [,] LP_FRME# [] LK_P_E [] LP_LKRUN# K[:0] K[:0] [] HTKEY_W0# [] RT_N [] EXTM# [,] L_E_R# [,] PWR_W_E# [] _K [] E_RMRT# R_N# K_# 0TE UF_RT# [] aps_le# [] _.VWN# T [0] RT_PWR_EN# [0] RT_RT# [] TP_LK [] TP_T / item /0 item / item0 /_tem T0 T 0UF/.V [,] M_LK [,] M_T [] M_LK [] M_T [] H_LE_REEN# 0.UF/V T T T [] H_LE_RNE# [] PWR_LE_UP T / item0 T0 LP_[:0] [,] LP_0 LP_ LP_ LP_ E_RT# K0 K K K K K K K K K K0 K K K K K N_K N_K K0 K K K K K K K NUM_LE# RL_LE# T_N _NT _NT HTKEY_W0# - HTKEY_W# internal PU 0.UF/V P_0 P_ L_E_L# 0.UF/V 0.UF/V ERRQ LFRME# PLK LKRUN# 0 L0 L L L KRT# 0 # 0 PRT# U ERT# K0 0 K K K K K K K K K K0 0 K K K K K K K K0 K K K K 0 K K K P P P PLK0 PT0 PLK PT PLK PT L L 0 Thermal ensor P0 P0 P0 P0 P0 P0 P0 P P0 P P P P0 0 P P P P K0QF / item 0.UF/V LP /F Key Matrix can M U P 0.UF/V LE P /F /0 item V V V V V V V V/ V PWM / FN P /F URT R +V_E +V L 0 PWM0 PWM P P FNPWM0 FNPWM FNF0 FNF P P P 0 PE PF PX00 PX0 PX0 PX0 00 X PX0 0 PX0 0 PX0 0 PX0 0 PX0 0 PX0 0 PX0 0 PX 0 PX0 0 PX 0 PX PX X PX PX PX PX M M 0 PLK P# P 0 P P XLK XLK XLK VR /00Mhz +V T_ T_ T_ T_ L_PWM_ TEL# P-N FN0_PWM FN_PWM FN0_TH FN_TH PM_TLW# P_ME# VU_N NT_H# NT # R R P_LK_R R0 /00Mhz E_TX E_RX K_XLK K_XLK K_VR R P_ N/ +V_E T0 0UF/.V T T T T L_PWM_ [] T PM_PWRTN# [] P-N [] T / item L_KFF# [] THR_PU_VLT# [] P_WP# [] P_# [] E_PWRK [] RT# [,] THR_PU [] PM_LPRY# [,] PM_LPME [] VRM_PWR [] PM_RTRY# [] PM_RTWRN [] T T T TP_LE# [] T T 0.UF/V FN0_PWM [] FN0_TH [] P_ [] P_ [] P_LK [] P_# [] PF/0V [0,] FRE_FF# T0 T U_N [,,] VU_N [] PU_VRN [,] U_N [,,,] T T T / item / item FR RF UF/0V +V R 00Khm 0 UF/0V H_EN# [] / item / item T_LERN [] PF/0V /RF U UT V N P_0 tem P_ P_ PF/0V /RF N/ +V Hotkey Table / item FR RF RNV-TR-F +V R.Khm R.Khm P_ P Pin Name 0 HTKEY_W0# +V E_RT# 0.UF/V R.Khm R.Khm Function Home E_RT# TP_LK T_N T_N _K P_ME# PM_PWRTN# TP_T M_T M_LK M_LK M_T RT_N UTek omputer N. PM_LPME PM_LPRY# ate: Tuesday, July, 00 heet of 0 K_XLK +V +V +V +V +V +V /0 item /_tem 0H R R 0Khm RN 0Khm RN 0Khm RN 0Khm RN.Khm RN / item PF/0V R 00Khm.Khm RN R 00Khm 00KHM RN 00KHM RN 00KHM RN 00KHM RN KHM 0.UF/V R.Khm R 0Mhm X.Khz K_XLK PF/0V E_ENE K0 N/.

33 For ebug LP_[:0] [,] Resolve auto-boot issue +V [,] LP_FRME# [] LK_P_EU LP_0 LP_ LP_ LP_ +V 0 EU_N E 0 E ZF_N_P 00 /ebug +V 0.UF/V /ebug [] VU_PWR [] E_RMRT# /0 item [] VU_PWR [] E_PWRK TW TW TW +V R 0Khm R 0Khm PM_RMRT# [] PM_PWRK [] /0 item P RM E_RMRT# R0 PM_RMRT# +V R TW +V_P P_WP# P_HL# 0KHM RN 0KHM RN +V_P R 0Khm R E_PWRK PM_PWRK +V_P R U [] P_# # V P_HL# [] P_ HL# [] P_WP# WP# LK P_LK [] P_ [] 0PF/0V 0PF/0V 0PF/0V WX0V /RF 0PF/0V 0PF/0V +V_P 0.UF/V R 0Khm /_tem FR RF UTek omputer N. 0H P RM/ ebug N/ ate: Tuesday, July, 00 heet of 0.

34 LP E K0 RT# UF_RT# H MN PE () RT# UFFER UF_RT# MN PE (WLN) UF_RT# nboard LN JMH0 Reset uffer +V [,] RT# U0 V 0.UF/V R 00Khm Y NZ0PX R UF_RT#_R UF_RT# [0,0,,,,,0,] R 00KHM /_tem UTeK MPUTER N 0H Reset Map N/ ate: Tuesday, July, 00 heet of 0.

35 /_tem For Touch-Pad K K +V L /00Mhz +V_TP K E E FP_N_P 000 M K K K K K K K K K K K K0 K K K0 K K K K K K K K0 K For Keyboard onnector K K K K K0 K K K K K K K K K0 K K K K K K K K0 K K K[:0] [] K[:0] [] PF/0V N PF/0V N PF/0V /RF N N PF/0V /RF /RF /RF PF/0V N PF/0V N PF/0V /RF N N PF/0V /RF /RF /RF N PF/0V N PF/0V PF/0V /RF N N PF/0V /RF /RF /RF PF/0V N PF/0V N PF/0V /RF N N PF/0V /RF /RF /RF PF/0V N PF/0V N PF/0V /RF N N PF/0V /RF /RF /RF PF/0V N PF/0V N PF/0V /RF N N PF/0V /RF /RF /RF K K K K K K K K0 K K K K0 K PN0Y PN0Y PN0Y PN0Y 0 PN0Y K K K K K0 K K K K [] TP_LK [] TP_T /_tem +V_TP TUH_P E 0 0 E E PF/0V FP_N_P /EM/00 M 0 P/N:0 +V /_tem FR RF Keyboard E Protect +V TP_LE TP_WTH_P 000 M /_tem R0 0Khm HTKEY_W0#_R +V TP_LE- [] TP_LE# /_tem UF/0V 0 0.UF/V E PF/0V /EM/00 HTKEY_W0#_R TW HTKEY_W0#_R TFFPTN R0 0Khm HTKEY_W0# [] HTKEY_W0#_P [] N/ R HTKEY_W0# [] TPR N/ E PF/0V TP_LE+ + r00_h TPR LUE 0Khm N/ N/ TP_LE_ TPQ UMKN N/ 0.UF/V TPQ UMKN N/ E PF/0V N/ UTek omputer N. 0H K_Touch Pad N/ ate: Tuesday, July, 00 heet of 0.

36 UTek omputer N. 0H -ensor N/ ate: Tuesday, July, 00 heet of 0.

37 +.V +V +V +V R0 % R % R % /0 item [,,] U_N Q UMKN +.V_HR Q N00 Q UMKN +V_HRE +V_HRE +V +V +VP +.V +VTT_R +.V /0 item +V +V_HR +V_HR +VP_HR +.V_HR +VTT_R_HR +.V_HR Q UMKN R % Q UMKN Q UMKN Q UMKN Q UMKN R % R % R0 % Q UMKN R 00Khm Q UMKN R 00Khm [,,,] U_N Q UMKN R % R % UTek omputer N. 0H ischarge N/ ate: Tuesday, July, 00 heet of 0.