NCV8411. Self-Protected Low Side Driver with In-Rush Current Management

Transcription

1 Self-Protected Low Side Driver with In-Rush Current Management The is a three terminal protected Low Side Smart Discrete FET. The protection features include Delta Thermal Shutdown, overcurrent, overtemperature, ESD and integrated Drain to Gate clamping for over voltage protection. The device also offers fault indication via the gate pin. This device is suitable for harsh automotive environments. Features Short Circuit Protection with In Rush Current Management Delta Thermal Shutdown Thermal Shutdown with Automatic Restart Over Voltage Protection Integrated Clamp for Over Voltage Protection and Inductive Switching ESD Protection dv/dt Robustness Analog Drive Capability (Logic Level Input) NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC Q Qualified and PPAP Capable These Devices are Pb Free and are RoHS Compliant Typical Applications Switch a Variety of Resistive, Inductive and Capacitive Loads Can Replace Electromechanical Relays and Discrete Circuits Automotive / Industrial Drain V DSS (Clamped) A Y WW G R DS(ON) TYP DPAK CASE 369C STYLE 2 MARKING DIAGRAM 3 = Assembly Location = Year = Work Week = Pb Free Package ORDERING INFORMATION 2 AYWW NCV 84G I D MAX (Limited) 42 V 23 V 45 A = Gate 2 = Drain 3 = Source Device Package Shipping Gate Input ESD Protection Temperature Limit Overvoltage Protection Current Limit Current Sense DTRKG DPAK (Pb Free) 25/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D. Source Figure. Block Diagram Semiconductor Components Industries, LLC, 7 January, 9 Rev. Publication Order Number: /D

2 Table. MAXIMUM RATINGS Rating Symbol Value (min) Unit Drain to Source Voltage Internally Clamped V DSS 42 V Drain to Gate Voltage Internally Clamped V DG 42 V Gate to Source Voltage V GS ±4 V Drain Current Continuous I D Internally Limited Total Power T A = 25 C (Note T A = 25 C (Note 2) Thermal Resistance Junction to Case Junction to Ambient (Note ) Junction to Ambient (Note 2) Single Pulse Inductive Load Switching Energy (Note 3) (L = mh, T J(start) = 5 C) P D R thjc R thja R thja W C/W E AS 6 mj Load Dump Voltage (V GS = and V, R G = 2, R L = 3 ) (Note 4) U S * 55 V Operating Junction Temperature T J to 5 C Storage Temperature T storage 55 to 5 C ESD CHARACTERISTICS (Note 3) Electro Static Discharge Capability Human Body Model (HBM) ESD 4 kv Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. Mounted onto a 2 square FR4 board ( sq mm, oz. Cu, steady state) 2. Mounted onto a 2 square FR4 board (645 sq mm, oz. Cu, steady state) 3. Not tested in production. 4. Load Dump Test B (with centralized load dump suppression) according to ISO675 2 standard. Guaranteed by design. Not tested in production. Passed Class C according to ISO675. I D + DRAIN I G + GATE V DS SOURCE V GS Figure 2. Voltage and Current Convention 2

3 Table 2. ELECTRICAL CHARACTERISTICS (T J = 25 C unless otherwise noted) Characteristic Test Conditions Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Clamped Breakdown Voltage V GS = V, I D = 25 A V (BR)DSS V V GS = V, I D = 25 A, T J = 5 C (Note 5) Zero Gate Voltage Drain Current V DS = 32 V, V GS = V I DSS.5 5 A V DS = 32 V, V GS = V, T J = 5 C (Note 5) 5.5 Gate Input Current V GS = 5 V, V DS = V I GSS 5 A ON CHARACTERISTICS Gate Threshold Voltage V GS = V DS, I D =.2 ma V GS(th) V Threshold Temperature Coefficient V GS = V DS, I D =.2 ma (Note 5) 5 mv/ C Static Drain to Source On Resistance V GS = V, I D = 5 A, T J = 25 C R DS(ON) m V GS = V, I D = 5 A, T J = 5 C (Note 5) V GS = 5 V, I D = 5 A, T J = 25 C V GS = 5 V, I D = 5 A, T J = 5 C (Note 5) 5 6 Source Drain Forward On Voltage I S = 5 A, V GS = V V SD.8. V SWITCHING CHARACTERISTICS (Note 5) Turn On Time (% V GS to 9% I D ) V GS = V to 5 V, t ON 29 5 s Turn Off Time (9% V GS to % I D ) V DS = 2 V, I D = A t OFF 53 5 Turn On Time (% V GS to 9% I D ) V GS = V to V, t ON 4 25 Turn Off Time (9% V GS to % I D ) V DS = 2 V, I D = A t OFF 8 8 Slew Rate On (8% V DS to 5% V DS ) V GS = V to V, dv DS /dt ON V/ s Slew Rate Off (5% V DS to 8% V DS ) V DD = 2 V, R L = 4.7 dv DS /dt OFF.7.85 SELF PROTECTION CHARACTERISTICS Current Limit V GS = 5 V, V DS = V I LIM A V GS = 5 V, V DS = V, T J = 5 C (Note 5) V GS = V, V DS = V (Note 5) V GS = V, V DS = V, T J = 5 C (Note 5) Temperature Limit (Turn Off) V GS = 5 V (Note 5) T LIM(OFF) C Thermal Hysteresis T LIM(ON) Temperature Limit (Turn Off) V GS = V (Note 5) T LIM(OFF) 5 8 Thermal Hysteresis T LIM(ON) GATE INPUT CHARACTERISTICS (Note 5) Device ON Gate Input Current V GS = 5 V, V DS = V, I D = A I GON 5 A Normal Operation V GS = V, V DS = V, I D = A 38 5 Device ON Gate Input Current Thermal Limit Device ON Gate Input Current Current Limit V GS = 5 V, V DS = V, I D = A I GTL V GS = V, V DS = V, I D = A 47 V GS = 5 V, V DS = V I GCL V GS = V, V DS = V 2 5 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Not tested in production. 3

4 TYPICAL PERFORMANCE CURVES T J(start) = 25 C T J(start) = 25 C I Lmax (A) T J(start) = 5 C E max (mj) T J(start) = 5 C L (mh) Figure 3. Single Pulse Maximum Switch-off Current vs. Load Inductance L (mh) Figure 4. Single Pulse Maximum Switching Energy vs. Load Inductance I Lmax (A) T J(start) = 25 C E max (mj) T J(start) = 25 C T J(start) = 5 C T J(start) = 5 C Time in Avalanche (ms) Figure 5. Single Pulse Maximum Inductive Switch-off Current vs. Time in Avalanche Time in Avalanche (ms) Figure 6. Single Pulse Maximum Inductive Switching Energy vs. Time in Avalanche I D (A) V 8 V V DS (V) V 4 V I D (A) 5 3 V 5 5 V GS = 2.5 V 5 V DS = V C 25 C C 5 C V GS (V) Figure 7. On-state Output Characteristics at 25 C Figure 8. Transfer Characteristics 4

5 TYPICAL PERFORMANCE CURVES R DS(on) (m ) I D = 3 A 5 C 5 C 25 C C R DS(on) (m ) C, V GS = 5 V 5 C, V GS = V 5 C, V GS = 5 V 5 C, V GS = V 25 C, V GS = 5 V 25 C, V GS = V 5 C, V GS = 5 V C, V GS = V V GS (V) I D (A) Figure 9. R DS(on) vs. Gate-Source Voltage Figure. R DS(on) vs. Drain Current 2.75 I D = 5 A 42 C 25 C V DS = V Normalized R DS(on).5.25 V GS = 5 V V GS = V I LIM (A) C 5 C.75 32,5 6 8 T J ( C) Figure. Normalized R DS(on) vs. Temperature V GS (V) Figure 2. Current Limit vs. Gate-Source Voltage I LIM (A) V DS = V V GS = 5 V V GS = V I DSS ( A). V GS = V 5 C 5 C 25 C C 6 8 T J ( C) Figure 3. Current Limit vs. Junction Temperature V DS (V) Figure 4. Drain-to-Source Leakage Current 5

6 TYPICAL PERFORMANCE CURVES.2..9 C Normalized V GS(th) I D =.2 ma V DS = V GS V SD (V) C 5 C 5 C V GS = V T J ( C) I S (A) Figure 5. Normalized Threshold Voltage vs. Temperature Figure 6. Source-Drain Diode Forward Characteristics Time ( s) 8 V DD = 25 V, I D = 5 A, R G = t r 6 t d(off) 8 t d(on) 6 t f V GS (V) Drain-Source Voltage Slope (V/ s) V DD = 25 V, I D = 5 A, R G = V GS (V) dv DS /d t(on) dv DS /d t(off) Figure 7. Resistive Load Switching Time vs. Gate-Source Voltage Figure 8. Resistive Load Switching Drain-Source Voltage Slope vs. Gate-Source Voltage Time ( s) V DD = 25 V, I D = 5 A t f, V GS = V t r, V GS = 5 V t f, V GS = 5 V t d(on), V GS = V t r, V GS = V R G ( ) t d(off), V GS = V t d(off), V GS = 5 V t d(on), V GS = 5 V Figure 9. Resistive Load Switching Time vs. Gate Resistance Drain-Source Voltage Slope (V/ s) dv DS /d t(on), V GS = 5 V dv DS /d t(on), V GS = 5 V V DD = 25 V, I D = 5 A dv DS /d t(on), V GS = V dv DS /d t(on), V GS = V R G ( ) Figure. Drain-Source Voltage Slope during Turn On and Turn Off vs. Gate Resistance 6

7 TYPICAL PERFORMANCE CURVES R JA ( C/W) 6 5 PCB Cu thickness, 2. oz PCB Cu thickness,. oz 6 8 Copper Heat Spread Area (mm 2 ) Figure 2. R JA vs. Copper Area R JA 645 mm 2 C/W, 2 oz. Copper. 5% Duty Cycle % % 5% 2% % Single Pulse Pulse Width (s) Figure 22. Transient Thermal Resistance 7

8 APPLICATION INFORMATION Circuit Protection Features The has three main protections. Current Limit, Thermal Shutdown and Delta Thermal Shutdown. These protections establish robustness of the. Current Limit and Short Circuit Protection The has current sense element. In the event that the drain current reaches designed current limit level, integrated Current Limit protection establishes its constant level. Delta Thermal Shutdown Delta Thermal Shutdown (DTSD) Protection increases higher reliability of the. DTSD consist of two independent temperature sensors cold and hot sensors. The establishes a slow junction temperature rise by sensing the difference between the hot and cold sensors. ON/OFF output cycling is designed with hysteresis that results in a controlled saw tooth temperature profile (Figure 23). The die temperature slowly rises (DTSD) until the absolute temperature shutdown (TSD) is reached around 75 C. Thermal Shutdown with Automatic Restart Internal Thermal Shutdown (TSD) circuitry is provided to protect the in the event that the maximum junction temperature is exceeded. When activated at typically 75 C, the turns off. This feature is provided to prevent failures from accidental overheating. TEST CIRCUITS AND WAVEFORMS Thermal Transient Limitation Phase Overtemperature Cycling Nominal Load V G I LIM I D I NOM T J TSD Delta TSD Activation Time Figure 23. Overload Protection Behavior 8

9 TEST CIRCUITS AND WAVEFORMS R L V IN R G G D DUT + V DD S I DS Figure 24. Resistive Load Switching Test Circuit 9% V IN % t ON t OFF 9% I DS Time Figure 25. Resistive Load Switching Waveforms % 9

10 TEST CIRCUITS AND WAVEFORMS L V DS V IN R G G D DUT + V DD t p S I DS Figure 26. Inductive Load Switching Test Circuit 5 V V IN V t p t av V (BR)DSS I pk V DS V DD V DS(on) I DS Time Figure 27. Inductive Load Switching Waveform

11 PACKAGE DIMENSIONS L3 E b A D B A DETAIL A L4 b2 NOTE 7 c e b SIDE VIEW TOP VIEW.5 (.3) M C L2 GAUGE PLANE L L DETAIL A ROTATED 9 CW H C SEATING PLANE A C c2 H DPAK CASE 369C ISSUE F Z BOTTOM VIEW ALTERNATE CONSTRUCTIONS SOLDERING FOOTPRINT* BOTTOM VIEW 3..8 Z Z NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED.6 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. INCHES MILLIMETERS DIM MIN MAX MIN MAX A A b b b c c D E e.9 BSC 2.29 BSC H L L.4 REF 2.9 REF L2. BSC.5 BSC L L4.. Z STYLE 2: PIN. GATE 2. DRAIN 3. SOURCE 4. DRAIN SCALE 3: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative /D