Tolerances for Electrical Design
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1 Tolerances for Electrical Design Dr. Charles R. Tolle Department of Electrical and Computer Engineering South Dakota School of Mines and Technology April 3, 5 Tolle (SDSMT ECE) Sophomore Design 4/3/5 /
2 An engineer desires to know to what degree a system will change its response based on changes in parameters. This is referred to as the sensitivity. We can formally define it as: S F:P = lim P = lim P P F F P Fractional change in the function, F Fractional change in the parameter, P F/F P/P = lim P P F F P = P F δf δp Tolle (SDSMT ECE) Sophomore Design 4/3/5 /
3 Consider the follow simple circuit: R v i (t) + C + v o (t) V i (s) G(s) = R C s+ R C V o (s) S G(s):R R G(s) G(s) R = ( CR) s (CR) s + Tolle (SDSMT ECE) Sophomore Design 4/3/5 3 /
4 -. Sensitivity of a simple pole due to R R= R= S G:R log(frequency in rad/sec) # 4 Tolle (SDSMT ECE) Sophomore Design 4/3/5 4 /
5 Monte-Carlo Simulation Sensitivity analysis is in general hard Sensitivity analysis looks at a single variation at a time What about multiple parameter variation By looking at the overall group s response due to multiple parameter variation, we can try to understand the range of responses, this range of response is known as an ensemble. How should the parameters vary? How many samples should we take? The Law of Large numbers (the simple version): the more trials the better the statistic... Tolle (SDSMT ECE) Sophomore Design 4/3/5 5 /
6 Random Distributions and the Law of Large Numbers Uniform -vs.- Gaussian The Law of Large numbers (the simple version): The more trails the better the statistic... Uniform Dist random events random events random events random events Tolle (SDSMT ECE) Sophomore Design 4/3/5 6 /
7 y(t) j! Monte-Carlo version of the simple circuit: R v i (t) + C + v o (t) V i (s) R C s+ R C V o (s) Ensemble of st order step reponses Ensemble of st order plant poles seconds < Tolle (SDSMT ECE) Sophomore Design 4/3/5 7 /
8 Monte-Carlo Simulation of a simple PI feedback control system, aka controller and plant variation: (K, z, a): + R (s) K a (s+z ) Y (s) ( s +a ) s Ensemble of nd order step responses. Ensemble of nd order pole locations.5.8 j! step response < seconds *simulation from: basic sensitivity second order p controller: ex prob rev Tolle (SDSMT ECE) Sophomore Design 4/3/5 8 /
9 Monte-Carlo Simulation for a Fourth Order System: 8 Ensemble of 4th order pole locations j! < Tolle (SDSMT ECE) Sophomore Design 4/3/5 9 /
10 Monte-Carlo Simulation for a Fourth Order System: AKA Boring dynamics? Plant k = Plant k = Plant k = Plant k = Plant k = Tolle (SDSMT ECE) Sophomore Design 4/3/5 /
11 A simple design problem A digital thermometer AKA: choose a resistor and ADC for measuring a thermistor Tolle (SDSMT ECE) Sophomore Design 4/3/5 /
12 The Project Project Need: Create a small embedded system that measures and reports current temperature via a serial connection when queried. Requirements:. The system shall contain a micro controller. The system shall provide way serial communication 3. The system shall contain a Analog to Digital Converter (ADC) 4. The system shall measure temperature between - Fahrenheit Specifications:. The design will utilize a Arduino Nano. The system will utilize RS-3 serial communication. The system will support 3 baud to 5.3 The system will support -way communication.3. The system will listen and respond to requests for current temperature.3. The system will send a Byte response to all requests.3.. First Byte will contain system status.3.. Second Byte will contain an 8-bit integer of the temperature measured 3. The ADC will provide enough bit resolution to achieve the required precision for temperature measurement 4. The system will utilize a thermistor 4. The thermistors nominal resistance at 5 degrees Celsius will be K ohms 4.3 The system will report temperature in Fahrenheit 4.4 The system will measure temperature between - Fahrenheit 4.5 The system will measure with degree temperature precision between - Fahrenheit Tolle (SDSMT ECE) Sophomore Design 4/3/5 /
13 The circuit: R v i (t) + R T + v o (t) %Voltage Across R = R R +R T %Voltage Across R T = R T R +R T R T = R e ( T To ) ;T,T o Kelvin R.S. Figliola, and D.E. Beasley, Theory and Design For Mechanical Measurements, Second Edt. John Wiley & Sons, INC., New York, NY, 995, pp Tolle (SDSMT ECE) Sophomore Design 4/3/5 3 /
14 High Temp. % - Low Temp. % Choose R to maximize full scale range: % of input voltage accross R T %v o (t) = R e ( T To ) R +R e ( T To ) T L = ( ) 5 9 ( 3) T H = ( ) 5 9 ( 3) Low Temperature % Voltage Lowest Temp. Highest Temp R resistance # 4.7 % Range for a given resistor R resistance # 4 Tolle (SDSMT ECE) Sophomore Design 4/3/5 4 /
15 Change in Volts Change in Volts Output Volts Output Volts Choose ADC: ( ) Bits = log min F degree voltage input voltage Volt input 5 5 Volt input v i (t) smallest deg voltage change Bits v i (t) v o() v o() Temperature in F Voltage for a Degree F change at Temperature Temperature in F Voltage for a Degree F change at Temperature Temperature in F Temperature in F Assuming a 3.3 volt range ADC the designer could choose a 9-bit ADC (or greater) or choose an 8-bit ADC along with some level shifting electronics to bring the wider 5 volt input range design into the 3.3 volt full scale ADC range. Both designs will meet the degree F measurement spec. the second design maximizes the precision of the design overall, given a constant number of bits. (Also for the second design R or v i (t) should be adjusted a bit to exactly match the 3.3 volt range ADC 5 volts input over ranges by.9v a degree.) Tolle (SDSMT ECE) Sophomore Design 4/3/5 5 /
16 Another simple design problem: PWM Amplifier Driver for an 8Ω Load (like a speaker): Tolle (SDSMT ECE) Sophomore Design 3/8/8 6 /
17 Design of a Transistor Driving Circuit: V PWM -5V R R V B V BE.7V V cc V B R cl N394 R l V C V E GND Pin V T Worst Case Assumptions: 5% variations N394 Data Sheet Info.: Ic max = ma PBJT max N394 =.65W Design: Max I c current in the collector is ma, so max power in our load, R l = 8Ω, is: P Rl = Ic R l = (.A) 8Ω =.3W Since Ic max = ma, we can set the max I B current as follows: I B = Ic β =.A = ma We also know that V B is.7v above V E : V B =.7V + V E =.7V + I c R l =.7V +.V 8Ω =.7 +.6V =.3V Next the current flowing in R flows into R and the base of the N394 so: V PWM V B R = V B R + I B 5V.3V R =.3V R + ma We can assume the base current will have a small effect on the voltage divider if it is 5 times smaller, choose ma, then solve for R : = 5V.3V R =.7V R R =.7V.A = 7Ω I R = ma = V PWM V B R Now that R has been chosen we can calculate R from the equation above: 5V.3V R =.3V R + ma.7v 7Ω =.3V R R =.3V 8mA = Ω = 7Ω + Ω + ma Tolle (SDSMT ECE) Sophomore Design 3/8/8 7 /
18 Design of a Transistor Driving Circuit Continued: V PWM -5V R R V B V BE.7V V cc V B R cl V C N394 V T V E R l GND Pin Design Continued: Next we need to size the current limiting resistor, R cl, to protect the power dissipation: in the BJT: P T = V T I c = (V C V E )I C V T = P T IC = ma.6w = 3V V C = V T + V E = 3V +.6V = 4.6V The next Step in the design depends on the value of V cc. We will consider 3 choices: 3V, 5V, & 9V. The power dissipated can be calculate as: P T = V T I c = (V cc V E )I c. If V T 3V then we need a resistor, R cl, to drop the voltage down to 3 V across the transistor, otherwise we don t. 3 V: V T = V cc V E = 3V.6V =.4V < 3V so R cl = Ω. Power dissipated in the transistor would be: P T = V T I c =.4V.A =.8W 5 V: V T = V cc V E = 5V.6V = 3.4V > 3V so R cl > Ω. So we must drop any voltage above 3V across R cl. In this case: V cc 3V V E = 5V 3V.6V =.4V : V Rcl = I c R cl R cl = V R cl = Ic.4V.A = Ω Power dissipated in the transistor and resistor would be: P T + P Rcl = (V cc V E )I c = 3.4.A =.68W 9 V: V T = V cc V E = 9V.6V = 7.4V > 3V so R cl > Ω. So we must drop any voltage above 3V across R cl. In this case: V cc 3V V E = 9V 3V.6V = 4.4V : V Rcl = I c R cl R cl = V R cl = Ic 4.4V.A = Ω choose 4Ω :.8 5.Ω Power dissipated in the transistor and resistor would be: P T + P Rcl = (V cc V E )I c = 7.4.A =.48W Tolle (SDSMT ECE) Sophomore Design 3/8/8 8 /
19 Design of a Transistor Driving Circuit Continued: V PWM -5V V cc V B R R V B V BE.7V R cl V C N394 V E R l GND Pin V T Design Continued: The final step in the design is to check the power ratings for each resistor: P = VI = I R P R = (ma) 7Ω =.7W P R = (8mA) 9Ω =.86W P Rcl 5V = (ma) Ω =.8W P Rcl 9V = (ma) 4Ω =.96W P N394 = ma 3VΩ =.6W Tolle (SDSMT ECE) Sophomore Design 3/8/8 9 /
20 Corrected Design of a Transistor Driving Circuit: V PWM -5V R R V B V BE.7V V cc V B R cl N394 R l V C V E GND Pin Error in Original Assumptions: β varies depending on collector current, β was used, but we should use β 3 So we must recalculate this page and the rest should be about right... Worst Case Assumptions: 5% variations N394 Data Sheet Info.: Ic max = ma PBJT max N394 =.65W Design: Max I c current in the collector is ma, so max power in our load, R l = 8Ω, is: P Rl = Ic R l = (.A) 8Ω =.3W Since Ic max = ma, we can set the max I B current as follows: V T I B = Ic β =.A 3 = mA We also know that V B is.7v above V E : V B =.7V + V E =.7V + I c R l =.7V +.V 8Ω =.7 +.6V =.3V Next the current flowing in R flows into R and the base of the N394 so: V PWM V B R = V B R + I B 5V.3V R =.3V R + 7mA We can assume the base current will have a small effect on the voltage divider if it is 5 times smaller, choose 8 ma, then solve for R : I R = 8mA = V PWM V B R = 5V.3V R =.7V R R =.7V.8A = 96.4Ω Ω Now that R has been chosen we can calculate R from the equation above: 5V.3V R =.3V R + 7mA.7V Ω =.3V R + 7mA R = ma.3v = 5Ω Tolle (SDSMT ECE) Sophomore Design 3/8/8 /
21 LTSPICE Simulation of Design of a Transistor Driving Circuit: Testing Design in LTSPICE: Values calculated within LTSpice simulation: I b 6.85mA, I c 65mA, I e 7.85mA P N394 = (V c V e)i c = (5V.3V).65A = 3.7V.65A =.6W P R = (7mA) Ω =.73W P R = (ma) 5Ω =.46W P Rcl 9V = (65mA) 4Ω =.65W Hyper-links for simulation building: LTSpice LTSpice Tutorial LTSpice Mac Shortcuts Adding Spice Models to LTSpice n394 Spice 3 Model Tolle (SDSMT ECE) Sophomore Design 3/8/8 /
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