ANALYSIS OF TRANSISTOR FEEDBACK AMPLIFIERS

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Tamsyn Jefferson
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1 ECE 3050 Analysis of s Page 1 ANALYSS F TANSST FEEDBACK AMPLFES Steps n Analyzing s 1. dentify the topology. 2. Determine whether the is positive negative. 3. pen the loop and calculate A, ß,, and o. 4. se the Table to find A f, f and of A F, F, and of. 5. se the infmation in 4.) to find whatever is required (ut /n, n, out, etc.) Generic Concept Properties of a Generic A signal can only go out the terminal A signal can only go in the terminal A signal can in out the terminal dentification of the Topology solate the input and output transist(s) and apply the following identification. nput Series: v s Shunt: utput Series: L Shunt: L L L

2 ECE 3050 Analysis of s Page 2 EXAMPLE F FEEDBACK TPLGY DENTFCATN se the rules of identifying topologies to identify the four different topologies f the circuits shown below. Circuits 1 and 2 5V M3 M4 V in M1 M2 M5 M6 V out1 V out2 M7 5V Circuits 3 and 4 5V M3 M4 M5 V out1 V in M1 M2 M6 V out2 M7 5V

3 ECE 3050 Analysis of s Page 3 LES F DENTFYNG PSTVE AND NEGATVE FEEDBACK 1. dentify the loop by tracing its path on the diagram. f there are alternate paths, always choose the path with the highest loop gain. (emember that a signal can go in the "" "" terminal of a transist and can only come out the "" "" terminal.) 2. At any point on the loop, assume the signal is positive and put a "" mark at that point. Trace the signal around the loop remembering that the signal only inverts when it goes in a "" terminal and out the "" terminal of a transist. All other paths through a transist do not invert (i.e., "" to "" and "" to ""). 3. When you have traced the polarity of the signal around the loop back to the point where you placed the "", the is negative if the signal polarity is "" and positive if the signal polarity is "". Example Example 2 5V V in M3 M4 M5 M1 M2 M6 V out1 V out2 M7 5V

4 ECE 3050 Analysis of s Page 4 EXAMPLE F FEEDBACK TPLGY DENTFCATN se the rules of identifying topologies to create the four different negative topologies using the identical starting structure. 1. VoltageVoltage (SeriesShunt) 2. CurrentVoltage (ShuntShunt) VoltageCurrent (SeriesSeries) 4. CurrentCurrent (ShuntSeries)

5 ECE 3050 Analysis of s Page 5 LES F ANALYSS F TANSST FEEDBACK AMPLFES SeriesShunt nput nput est of utput utput = esistance seen looking out the terminal of the input transist with = 0. = esistance seen looking out the terminal of the output transist with = 0. SeriesSeries nput est of utput utput = esistance seen looking out the terminal of the input transist with = 0. = esistance seen looking out the terminal of the output transist with = 0. ShuntShunt nput est of nput nput utput utput = esistance seen looking out the terminal of the input transist with = 0. = esistance seen looking out the terminal of the output transist with = 0. ShuntSeries nput utput nput est of utput = esistance seen looking out the terminal of the input transist with = 0. = esistance seen looking out the terminal of the output transist with = 0.

6 ECE 3050 Analysis of s Page 6 Summary of the mptant elationships of penloop and Closedloop s. Quantity nputoutput variable Voltage Transconductance Transresistance Current Voltagevoltage Voltagecurrent Currentvoltage Currentcurrent Small Signal Model A vf n o o o Gmf n mf n Aif n o Small Signal S with o S o io S Source & Load L A vf v ol S o io i G mf L mf i A if L deal S S = 0 S << S = 0 S << S = S >> S = S >> deal L L = L >> o L = 0 L << o L = L >> o L = 0 L << o verall Fward L A vf o G mf S L mf S o A if Gain AV= GM= M= ( S )( L o ) ( S i)( L o ) ( S i)( L o ) A = ( S i)( L o ) Topology Seriesshunt Seriesseries Shuntshunt Shuntseries deal ß, finite F F F S and L T F F i F o o Small i v S o o s βv L o A Signal Models vf v i L v s o β L L F S β i G mf v mf i S βio i Aif T F ClosedLoop Gain (deal S and L ) ClosedLoop nput esistance (deal S and L ) ClosedLoop utput esistance (deal S and L ) ClosedLoop Gain ClosedLoop nput esistance ClosedLoop utput esistance utput esistance of Series utput Fb. Ckt A vf = Avf (1A vf ß v ) G mf = Gmf (1G mf ß g ) F = (1 A vf ß v ) F = (1 G mf ß g ) of = A VF = o of = o (1 mf ß g ) 1 A vf ß v AV (1A V ß v ) F = ( S )(1A V ß v ) F = o L o L 1 A V ßv T = F G MF = GM (1G M ß g ) mf = F = of = F = ( S )(1 G M ß g ) F = mf (1 mf ß r ) A if = Aif (1A if ß i ) 1 mf ß if = r 1 A if ß i o of = o (1 A if ß i ) 1 mf ß r M MF = (1 M ß r ) S o L F = o L ( o L )(1G M ß g ) F = 1 M ßr S 1 M ß r F = A A F = (1A ß i ) S S 1 A ß i F = ( o L )(1A ß i ) T = L F ( F L ) T = F T = L F ( F L )

Lectures on FEEDBACK FB-1. Feedback. Analog Circuit Design FB-5 FB-2. Feedback (Cont.) Feedback (Cont.) There are 4 basic kinds of Feedback Circuits :

Lectures on FEEDBACK FB-1. Feedback. Analog Circuit Design FB-5 FB-2. Feedback (Cont.) Feedback (Cont.) There are 4 basic kinds of Feedback Circuits : bert W. Brdersen EECS40 University f Clifrni Berkeley Cllege f Engeerg Deprtment f Electricl Engeerg nd Cmputer Science Anlg Circuit Design Lectures n FEEDBACK Feedbck Σ Errr Signl Feedbck Signl fb Bsic