Page 1. A portion of this study was supported by NEDO.

Transcription

1 MRAM : Materials and Devices Current-induced Domain Wall Motion High-speed MRAM N. Ishiwata NEC Corporation Page 1 A portion of this study was supported by NEDO.

2 Outline Introduction Positioning and direction of MRAM High speed MRAM cell Domain wall motion cell for high speed MRAM Device structure and materials Writing properties and memory operation Summary Page 2

3 Comparison of novel and conventional memories Mechanism MRAM Magnetic Tunnel Junction FeRAM Ferro- electric PRAM Phase change FLASH Floating gate SRAM Transistor DRAM Capacitor Non-volatile Endurance Access time Refresh Cell size Unlimited Limited Limited Limited Unlimited Unlimited (>10 15 ) (<10 13 ) (<10 9 ) (<10 6 ) (>10 15 ) (>10 15 ) Very Fast (~10ns) No Medium Fast (50~100ns) No Large Medium (>100ns) No Small Fast (read) Slow (write) No Very Small Very fast (~10ns) No Large Fast (~50ns) Low voltage High temperature operation Application Work memory Work memory? Storage Storage Work memory Yes Small Work memory MRAM has great potential for use as non-volatile working memory. Page 3

4 DWM-MRAM MRAM cell is located at (Hz) uency Freq Perf formance 1G 100M 10M Cost High-speed esram esram 1 st -MRAM edram DRAM DWM-MRAM MRAM 12 F 2 >200 MHz eflash FLASH Relative cell size (F 2 ) 12F 2 & 200MHz cell has the features of esram & edram. Very useful for future high-speed embedded memory in SoC. Page 4

5 2Tr-1MTJ cell for high-speed MRAM operation BL GND 2Tr-1MTJ cell Read /BL MTJ 250 MHz (ASSCC 2007) WL Write 3-terminals magnetic element 32 Mbit (ISSCC 2009) No problem with either write disturbance or read one Great advantage for high-speed operation Page 5

6 Key issue : Reduction of write-current (I write write ) e (ma A) I write Field-writing STT-writing SoC Low cost 0.2 ma W (nm) <0.2 ma 2Tr-1MTJ cell has higher cost performance than conventional memories used in SoC. Spin-transfer torque switching is promising for lowering write-current. Page 6

7 Spin transfer torque switching Conventional Spin transfer torque switching F.J.Albert et al., Appl. Phys. Lett., 77-23, 3809, Current-induced domain wall motion (DWM) A.Yamaguchi et al., Phys. Rev. Lett. 92, , NiFe (in-plane) M. Yamanouchi et al., NATURE, 428, P.539, GaMnAs (perpendicular) Page 7

8 Positive characteristics of DWM elements Suitable for 2Tr-1MTJ cell Scalable write-current & write-speed Sufficient thermal stability without write current increase Suppression for read disturbance & tunneling barrier damage in write process CMOS process compatibility Page 8

9 Minimum cell layout for 2Tr-1MTJ DWM cell Plan-view 4F 12 F 2 Cross-sectional sectional-view 4F 3F BL GND. /BL M6 M5 Memory element Tr 1 Tr 2 M4 WL BL /BL Gnd. n + n + Criterion: I write < 0.2 ma 12F 2 01 m nm rule 12F 2 is possible only when the write-current is < 0.2 ma Page 9

10 Device structure for minimum cell layout Fixed region Gnd. Reference layer Tunnel barrier 0 -state DW WL BL Data region Tr 1 Tr 2 /BL Free layer e - Pinning layer 1 -write e- 1 -state DW DW Pinning sites e - 0 -write Page 10

11 What kind of material should be chosen? LLG (3-D) Simulation Page 11 Critica al curren nt dens sity, (x10 8 A/cm 2 ) j c Stable 10 IMA In-plane magnetic anisotropy Small DW 1 PMA Perpendicular magnetic anisotropy 1-D model Critical field, H c (Oe) DW Tatara et al. JPSJ, 75, , Suzuki et al. JAP, 103, , Using PMA, much smaller cell area with much better stability can be achieved.

12 DWM materials Material [Co/Ni] N Anisotropy Perpendicular Temp. Minimum Pinning Velocity (K) J 2 th (A/m ) field (Oe) (m/sec.) R.T. 0.3x [Co/Pt] N Perpendicular R.T. 1.8x CoCrPt Perpendicular R.T. 1.0x GaMnAs Perpendicular x NiFe In-plane R.T. 1.0x Co/Ni is the best material for DWM, because of its small J th with large pinning field and high velocity. Page 12

13 Write-current, I write 1.2 e (ma) I write W Fixed DWM Fixed [Co/Ni] W (nm) At less than 100 nm width, the write-current becomes less than 0.2 ma. The most important criterion is satisfied. Page 13

14 Write-time, time, t write ility Swit tching Proba ability probab ns 133 nm ns 3 ns Voltage (mv) Pulse Voltage (mv) Fixed DW DWM Fixed 200 nm V V DWM > 50 m/s t write < 2 l ~ 90 nm >200 MHz More than 200 MHz operation is promising. Page 14

15 Memory operation : 4 Kbit array 4 Kbit array MRAM CMOS cy (%) Frequen 60 -I +I 40 R 0 R R MTJ (a.u.) The two resistance states of the MTJ are clearly separated. The change of resistance is consistent with current direction. Page 15

16 Repeat test for write and read operation (a.u.) )) Rmtj R MTJ R 1 R # of W/R Good reproducible switching and overwrite properties are confirmed. Page 16

17 Summary DWM MRAM with 2Tr-1MTJ high-speed cell 12 F 2 (0.1 m >200 MHz Scalable write-current & write-speed with sufficient thermal stability 4 kbit memory array operation has been demonstrated Co/Ni multilayer film with perpendicular magnetic anisotropy is the answer for DWM MRAM Page 17

18 Thank you Page 18