SN54HC393, SN74HC393 DUAL 4-BIT BINARY COUNTERS
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1 Dual 4-Bit Binary Counters With Individual Clocks Direct Clear for Each 4-Bit Counter Can Significantly Improve System Densities by educing Counter Package Count by 0 Percent Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description he HC9 contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. he HC9 comprise two independent 4-bit binary counters, each having a clear (CL) and a clock (CLK) input. N-bit binary counters can be implemented with each package, providing the capability of divide by 26. he HC9 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals. he SN4HC9 is characterized for operation over the full military temperature range of C to 12 C. he SN74HC9 is characterized for operation from 40 C to 8 C. SN4HC9...J O W PACKAGE SN74HC9... D, DB, O N PACKAGE (OP VIEW) 1Q A 1Q B 1Q C 1CLK 1CL 1Q A 1Q B 1Q C 1Q D GND SN4HC9... FK PACKAGE (OP VIEW) 1CL 1CLK V CC 2CLK Q D GND Q D 2Q C No internal connection V CC 2CLK 2CL 2Q A 2Q B 2Q C 2Q D 2CL 2Q A 2Q B Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of exas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PODUCION DAA information is current as of publication date. Products conform to specifications per the terms of exas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1997, exas Instruments Incorporated POS OFFICE BOX 60 DALLAS, EXAS 726 1
2 logic symbol FUION ABLE COUN SEQUEE (each counter) OUPUS COUN QD QC QB QA 0 L L L L 1 L L L H 2 L L H L L L H H 4 L H L L L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H 10 H L H L 11 H L H H 12 H H L L 1 H H L H 14 H H H L 1 H H H H 1CL 1CLK 2 1 CDIV16 C=0 C QA 1QB 1QC 1QD 2CL 2CLK QA 2QB 2QC 2QD his symbol is in accordance with ANSI/IEEE Std and IEC Publication Pin numbers shown are for the D, DB, J, N, and W packages. 2 POS OFFICE BOX 60 DALLAS, EXAS 726
3 logic diagram, each counter (positive logic) CL CLK QA QB QC QD absolute maximum ratings over operating free-air temperature range Supply voltage range, V CC V to 7 V Input clamp current, I IK (V I < 0 or V I > V CC ) (see Note 1) ±20 ma Output clamp current, I OK (V O < 0 or V O > V CC ) (see Note 1) ±20 ma Continuous output current, I O (V O = 0 to V CC ) ±2 ma Continuous current through V CC or GND ±0 ma Package thermal impedance, θ JA (see Note 2): D package C/W DB package C/W N package C/W Storage temperature range, stg C to 10 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. hese are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOES: 1. he input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. he package thermal impedance is calculated in accordance with JESD 1, except for through-hole packages, which use a trace length of zero. POS OFFICE BOX 60 DALLAS, EXAS 726
4 recommended operating conditions SN4HC9 SN74HC9 MIN NOM MAX MIN NOM MAX Supply voltage V = 2 V VIH High-level input voltage = 4. V.1.1 V = 6 V = 2 V VIL Low-level input voltage = 4. V V = 6 V VI Input voltage 0 0 V VO Output voltage 0 0 V = 2 V tt Input transition (rise and fall) time = 4. V ns = 6 V A Operating free-air temperature C If this device is used in the threshold region (from VILmax = 0. V to VIHmin = 1. V), there is a potential to go into the wrong state from induced grounding, causing double clocking. Operating with the inputs at tt = 1000 ns and = 2 V does not damage the device; however, functionally, the CLK inputs are not ensured while in the shift, count, or toggle operating modes. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PAAMEE ES CONDIIONS A = 2 C SN4HC9 SN74HC9 MIN YP MAX MIN MAX MIN MAX 2 V IOH = 20 µa 4. V VOH VI = VIH or VIL 6 V V IOH = 4 ma 4. V IOH =.2 ma 6 V V IOL = 20 µa 4. V VOL VI = VIH or VIL 6 V V IOL = 4 ma 4. V IOL =.2 ma 6 V II VI = or 0 6 V ±0.1 ±100 ±1000 ±1000 na ICC VI = or 0, IO = 0 6 V µa Ci 2 V to 6 V pf 4 POS OFFICE BOX 60 DALLAS, EXAS 726
5 timing requirements over recommended operating free-air temperature range (unless otherwise noted) A = 2 C SN4HC9 SN74HC9 MIN MAX MIN MAX MIN MAX 2 V fclock Clock frequency 4. V MHz tw Pulse duration 6 V V CLK high or low 4. V V V CL high 4. V V V tsu Setup time, CL inactive 4. V ns 6 V ns switching characteristics over recommended operating free-air temperature range, C L = 0 pf (unless otherwise noted) (see Figure 1) PAAMEE FOM (INPU) O (OUPU) A = 2 C SN4HC9 SN74HC9 MIN YP MAX MIN MAX MIN MAX 2 V fmax CLK QA 4. V MHz tpdd CLK 6 V V QA 4. V V V QB 4. V V V QC 4. V V V QD 4. V V V tphl CL Any 4. V ns 6 V V tt Any 4. V ns 6 V ns operating characteristics, A = 2 C PAAMEE ES CONDIIONS YP Cpd Power dissipation capacitance per counter No load 40 pf POS OFFICE BOX 60 DALLAS, EXAS 726
6 PAAMEE MEASUEMEN INFOMAION From Output Under est est Point CL = 0 pf (see Note A) High-Level Pulse Low-Level Pulse tw LOAD CICUI VOLAGE WAVEFOMS PULSE DUAIONS Input tplh tphl eference Input Data Input tsu th 90% 90% tr tf In-Phase Output Out-of-Phase Output tphl 90% 90% 90% tr tf tplh VOH VOL tf VOH 90% VOL tr VOLAGE WAVEFOMS SEUP AND HOLD AND INPU ISE AND FALL IMES VOLAGE WAVEFOMS POPAGAION DELAY AND OUPU ANSIION IMES NOES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: P 1 MHz, ZO = 0 Ω, tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is. D. he outputs are measured one at a time with one input transition per measurement. E. tplh and tphl are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 6 POS OFFICE BOX 60 DALLAS, EXAS 726
7 IMPOAN NOICE exas Instruments and its subsidiaries (I) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. I warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with I s standard warranty. esting and other quality control techniques are utilized to the extent I deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CEAIN APPLICAIONS USING SEMICONDUCO PODUCS MAY INVOLVE POENIAL ISKS OF DEAH, PESONAL INJUY, O SEVEE POPEY O ENVIONMENAL DAMAGE ( CIICAL APPLICAIONS ). I SEMICONDUCO PODUCS AE NO DESIGNED, AUHOIZED, O WAANED O BE SUIABLE FO USE IN LIFE-SUPPO DEVICES O SYSEMS O OHE CIICAL APPLICAIONS. ILUSION OF I PODUCS IN SUCH APPLICAIONS IS UNDESOOD O BE FULLY A HE CUSOME S ISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. I assumes no liability for applications assistance or customer product design. I does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of I covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. I s publication of information regarding any third party s products or services does not constitute I s approval, warranty or endorsement thereof. Copyright 1998, exas Instruments Incorporated
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