PHD/PHP36N03LT. 1. Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 General description. 1.

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1 Rev. 2 8 June 26 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. 1.2 Features Logic level compatible Low gate charge 1.3 Applications DC-to-DC converters Switched-mode power supplies 1.4 Quick reference data V DS 3 V R DSon 17 mω I D 43.4 A P tot 57.6 W 2. Pinning information Table 1. Pinning Pin Description Simplified outline Symbol 1 gate (G) 2 drain (D) [1] mb 3 source (S) mb mounting base; connected to drain mb G D mbb76 S SOT428 (DPAK) 1 2 SOT78 (3-lead TO-22AB) 3 [1] It is not possible to make a connection to pin 2 of the SOT428 package.

2 3. Ordering information Table 2. Type number Ordering information Package Name Description Version PHD36N3LT DPAK plastic single-ended surface-mounted package; 3 leads (one lead SOT428 cropped) PHP36N3LT SC-46 plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-22AB SOT78 4. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 6134). Symbol Parameter Conditions Min Max Unit V DS drain-source voltage 25 C T j 175 C - 3 V V DGR drain-gate voltage (DC) 25 C T j 175 C; R GS =2kΩ - 3 V V GS gate-source voltage - ±2 V I D drain current T mb =25 C; V GS = V; see Figure 2 and A T mb = C; V GS = V; see Figure A I DM peak drain current T mb =25 C; pulsed; t p µs; see Figure A P tot total power dissipation T mb =25 C; see Figure W T stg storage temperature C T j junction temperature C Source-drain diode I S source current T mb =25 C A I SM peak source current T mb =25 C; pulsed; t p µs A Product data sheet Rev. 2 8 June 26 2 of 13

3 12 3aa aa24 P der (%) I der (%) T mb ( C) T mb ( C) Fig 1. P der P tot I D = % I P der = tot( 25 C) I % D25 C ( ) Normalized total power dissipation as a function of mounting base temperature Fig 2. Normalized continuous drain current as a function of mounting base temperature 3 1aae811 I D (A) 2 Limit R DSon = V DS / I D t p = µs DC µs 1 ms V DS (V) Fig 3. T mb =25 C; I DM is single pulse; V GS =V Safe operating area; continuous and peak drain currents as a function of drain-source voltage Product data sheet Rev. 2 8 June 26 3 of 13

4 5. Thermal characteristics Table 4. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-mb) thermal resistance from junction to mounting base see Figure K/W R th(j-a) thermal resistance from junction to ambient SOT78 vertical in free air K/W SOT428 minimum footprint [1] K/W SOT44 minimum footprint [1] K/W [1] Mounted on a printed-circuit board; vertical in still air. 1aae8 Z th(j mb) (K/W) δ = single pulse P t p δ = T t p t T t p (s) Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration Product data sheet Rev. 2 8 June 26 4 of 13

5 6. Characteristics Table 5. Characteristics T j =25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Static characteristics V (BR)DSS drain-source breakdown I D = 25 µa; V GS =V voltage T j =25 C V T j = 55 C V V GS(th) gate-source threshold voltage I D = 25 µa; V DS =V GS ; see Figure 9 and T j =25 C V T j = 175 C V T j = 55 C V I DSS drain leakage current V DS =24V; V GS =V T j =25 C µa T j = 175 C µa I GSS gate leakage current V GS = ±2 V; V DS = V - na R DSon drain-source on-state resistance V GS = 4.5 V; I D = 12 A; see Figure 6 and 8 T j =25 C mω T j = 175 C mω V GS = V; I D = 25 A; see Figure 6 and mω V GS = 3.5 V; I D = 5.2 A; see Figure 6 and mω Dynamic characteristics Q G(tot) total gate charge I D = 36 A; V DS =15V; V GS =V; nc Q GS gate-source charge see Figure 11 and nc Q GD gate-drain charge nc C iss input capacitance V GS =V; V DS = 25 V; f = 1 MHz; pf C oss output capacitance see Figure pf C rss reverse transfer capacitance pf t d(on) turn-on delay time V DS =15V; R L =.6 Ω; V GS =V; ns t r rise time R G =Ω - - ns t d(off) turn-off delay time ns t f fall time ns Source-drain diode V SD source-drain voltage I S = 25 A; V GS = V; see Figure V Product data sheet Rev. 2 8 June 26 5 of 13

6 I D (A) aae R DSon (mω) 3 1aae813 V GS (V) = V GS (V) = V DS (V) I D (A) T j =25 C T j =25 C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of drain current; typical values 4 1aae af18 I D (A) a C T j = 25 C V GS (V) T j ( C) T j =25 C and 175 C; V DS >I D R DSon R a = DSon R DSon( 25 C) Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature Product data sheet Rev. 2 8 June 26 6 of 13

7 2.5 3aa33-1 3aa36 V GS(th) (V) 2 max I D (A) typ -3 min typ max 1 min T j ( C) V GS (V) Fig 9. I D = 1 ma; V DS =V GS T j =25 C; V DS =5V Gate-source threshold voltage as a function of junction temperature Fig. Sub-threshold drain current as a function of gate-source voltage 1aae817 V GS (V) 8 V DS 6 I D V GS(pl) 4 V GS(th) 2 V GS Q GS1 Q GS Q G (nc) Q GS Q G(tot) Q GD 3aaa58 I D = 36 A; V DS =15V Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Gate charge waveform definitions Product data sheet Rev. 2 8 June 26 7 of 13

8 4 1aae aae816 I S (A) 3 C (pf) 3 C iss 2 2 C oss C rss 175 C T j = 25 C V SD (V) T j =25 C and 175 C; V GS =V Fig 13. Source current as a function of source-drain voltage; typical values V DS (V) V GS = V; f = 1 MHz Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Product data sheet Rev. 2 8 June 26 8 of 13

9 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E A A b 2 A 1 E 1 mounting base D 2 D 1 H D L L L 1 b 1 b w M A c e e 1 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm D A A 1 b b 1 b 2 c D 2 E 1 E 1 e e min min H D L L 1 min L 2 w y max.2 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE SOT428 TO-252 SC Fig 15. Package outline SOT428 (DPAK) Product data sheet Rev. 2 8 June 26 9 of 13

10 Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-22AB SOT78 E p A A 1 D 1 q mounting base D L 1 L 2 Q L b b c e e 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A 1 b b 1 c D D 1 E e L L L 2 1 p max mm q Q OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE SOT78 3-lead TO-22AB SC Fig 16. Package outline SOT78 (3-lead TO-22AB) Product data sheet Rev. 2 8 June 26 of 13

11 8. Revision history Table 6. Revision history Document ID Release date Data sheet status Change notice Supersedes 2668 Product data sheet - PHD36N3LT-1 Modifications: PHD36N3LT-1 ( ) The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. Addition of PHP36N3LT 2363 Product data - - Product data sheet Rev. 2 8 June of 13

12 9. Legal information 9.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 6134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.. Contact information For additional information, please visit: For sales office addresses, send an to: sales.addresses@ Product data sheet Rev. 2 8 June of 13

13 11. Contents 1 Product profile General description Features Applications Quick reference data Pinning information Ordering information Limiting values Thermal characteristics Characteristics Package outline Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. For more information, please visit: For sales office addresses, to: sales.addresses@ Date of release: 8 June 26 Document identifier: