Characterization and Modeling of Electrical Stresses on Digital Integrated Circuits Power Integrity and Conducted Emission

Transcription

1 Auhor manuscrip, published in "213 9h Inl Workshop on Elecromagneic Compaibiliy of Inegraed Circuis (EMC Compo 213), Nara : Japan (213)" DOI : 1.119/EMCCompo Characerizaion and Modeling of Elecrical Sresses on Digial Inegraed Circuis Power Inegriy and Conduced Emission A. Boyer, S. Ben Dhia LAAS-CNRS Universié de Toulouse ; UPS, INSA, INP, ISAE ; UT1, UTM, LAAS Toulouse, France alexandre.boyer@laas.fr hal-94531, version 1-17 Feb 214 Absrac - Recen sudies have shown ha inegraed circui aging modifies elecromagneic emission significanly. The proposed paper aims a evaluaing he impac of aging on he power inegriy and he conduced emission of digial inegraed circuis, clarifying he origin of elecromagneic emission evoluion and proposing a mehodology o predic his evoluion. On-chip measuremens of power supply volage bounces in a CMOS 9 nm echnology es chip and conduced emission measuremens are combined wih elecric sress o characerize he influence of aging. Simulaions based on ICEM modeling modified by an empirical coefficien o model he evoluion of he emission induced by device aging is proposed and esed. Keywords: Inegraed circuis, power inegriy, conduced emission, acceleraed aging, ICEM modelling I. INTRODUCTION Recenly, many publicaions have forecas a decrease of new CMOS echnology device lifeime down o few years [1], wih anicipaed appearance of hard or sof failures due o wear-ou mechanisms (e.g. ho carrier injecion (HCI), negaive bias insabiliy (NBTI), elecromigraion ) [2] [3]. The drif of he elecrical characerisics of semiconducor devices can have direc consequences on inegraed circui elecromagneic emission (EME) and power inegriy (PI). Recenly, some publicaions have shown ha acceleraed aging ess such as high or low emperaure operaing life, hermal cycling, or elecrical oversress induce a significan variaion of EME produced by power supply unis [4], high side swich devices [5] or I/O buffers [6]. However, hese sudies do no clarify he origins of EME changes and do no address modeling and predicion issues. This paper inends o clarify he impac of IC aging on PI and conduced emission (CE) experimenally and by simulaion. A es chip designed in Freescale CMOS 9 nm echnology, which includes a digial core and on-chip sensors dedicaed o he measuremen of power supply volage flucuaions, has been developed o characerize he evoluion of PI vs. ime. In order o explain he effec of IC aging on PI and CE, an equivalen model of he circui based on he Inegraed Circui Emission Model (ICEM) approach [7] is developed. A simple empirical coefficien is inroduced in he model o simulae he effec of aging. This modeling mehodology could consiue a mehod o predic he evoluion of EME of ICs wih ime. The paper is organized as follows: afer a descripion of he circui under es, on-chip sensors and experimenal se-up, he measuremens of he evoluion of he power supply volage bounces and CE are presened. Then, he proposed modeling approach of he circui PI and CE is described and, finally, simulaion and measuremen resuls are compared in order o validae boh our hypohesis abou PI and CE evoluion wih ime and he proposed modeling mehod. II. EXPERIMENTAL SET-UP DESCRIPTION A. Tes chip descripion A dedicaed es chip has been designed in Freescale CMOS 9 nm echnology for IC emission and suscepibiliy modeling, and characerizaion of aging impac on EMC of ICs. In paricular, he es chip includes a digial core wih a dedicaed power supply volage equal o 1.2 V. This srucure is a basic 1-sage shif regiser, synchronized by a 4 MHz clock. B. On-chip volage sensor In order o monior he volage drops on he power supply of he digial core, an on-chip volage sensor is placed along he power supply rail of he core. This sensor is able o measure he waveform of volage bounce across non accessible nodes wih a precise ime resoluion (up o 15 ps). Is analog bandwidh is equal o 1 GHz. Is principle and is implemenaion in he es chip are explained in [8]. In order o preven noise coupling wih he digial core, he designed sensor has a dedicaed power supply and is isolaed from he IC subsrae by a buried N layer. Due o is small inpu capaciance (4 ff), he sensor is no inrusive and does no aler he performance of he esed block. Alhough he elecrical sress applied o he circui under es can parially aler he performances of he sensor, i can be recalibraed before any measuremens. The calibraion process is necessary o

2 hal-94531, version 1-17 Feb 214 compensae effecs of imperfecions due o non ideal behavior and mismach on volage and frequency responses. C. Descripion of he experimenal se-up During heir lifeime, CMOS ransisors are affeced by inrinsic failure mechanisms such as NBTI or HCI, mainly acivaed by harsh environmenal condiions such as high or low emperaure and elecrical oversress. In his sudy, DC elecrical sresses are applied on he power supply pin of he digial core o accelerae he damage rae for he relevan wearou failure mechanisms and hus he circui aging. The experimen is based on a measure-sress-measure flow, which consiss in applying elecrical sress on he circui under es and inerruping he sress during shor periods regularly for characerizaion purpose. Wih his procedure, he characerisics of he circui are moniored a various degrees of aging. The choice of sress condiions (sress volage and duraion) is based on a preliminary failure analysis of MOS devices developed in his echnology [9]. For DC sress volages ranging from 3 o 4 V and applied beween drain and source of NMOS and PMOS devices, significan degradaions of hreshold volage and carrier mobiliy are induced due o HCI and/or NBTI afer several hundreds of seconds. The amoun of degradaion is relaed o sress volage, duraion, ransisor geomery and gae oxide hickness. A 3.6 V elecrical sress is applied during 12 minues in order o validae he influence of he sress volage on power inegriy change. Sensor measuremens of power supply volage flucuaions are performed afer each sress inerval. The sensor is no supplied during sress phases in order o reduce is aging. Recalibraion is done afer each sress period, alhough experimenal characerizaions have no shown any significan degradaion of he sensor. In addiion, conduced emission measuremens according o he 1 Ω mehod [1] are performed afer each sress inerval, in order o monior he variaions of he ransien curren ha reurns o he ground. The conduced emission measuremens are done on a dedicaed board which is no sressed o preven from any changes of he 1 Ω probe characerisics. All he experimens have been repeaed on several samples o ensure ha similar resuls are obained. Neverheless, he uncerainies linked o process dispersion are no aken ino accoun in his sudy. Figure 1. Measuremen of he power supply volage bounce of he digial core B. Impac of elecrical sress on digial core power inegriy Afer sress, he core remains operaional and is quiescen curren has no changed. However, he core iming characerisics have evolved. A specific par of he core has been designed o measure he propagaion delay hrough one D-lach and 1 inverers. The propagaion delay hrough he core afer sress increases up o 31 % depending on he sress duraion. The elecrical sress applied on core power supply acceleraes wear-ou mechanisms such as HCI and/or NBTI. They increase he propagaion delay of each gae of he core. Fig. 2 presens he power supply volage bounces measured by he on-chip sensor before and afer 3.6 V sresses. A -3 % reducion of he peak-o-peak ampliude is observed. The waveform of he signal is also modified. The firs peak is less seep and he period of he resonance oscillaion has no changed. Is ampliude is reduced, bu i is sill damped a he same rae. This observaion indicaes ha he package inducance, he equivalen capaciance of he digial and resisance linked o he power disribuion nework (PDN) have no been affeced by he elecrical sress significanly. III. EXPERIMENTAL RESULTS: EVOLUTION OF POWER INTEGRITY AFTER ELECTRICAL STRESS 59 mv 42 mv A. Iniial measuremen of power inegriy Fig 1 presens he power supply volage flucuaions produced by he digial core aciviy measured by he on-chip sensor. Posiions of clock edges are indicaed. Rapid drops appear a each clock swiching. These evens are linked o he rapid curren demand from every gaes and laches of he core. A damped oscillaion wih a pseudo-period equal o 4.5 ns follows he firs rapid curren impulsion. I is linked o he aniresonance produced by on-chip capacior and package inducor (see par V for more deails). This ype of noise is also measured on Vss node. Similar volage flucuaions are also measured on he ground node of he circui. Figure 2. Evoluion of he core power supply volage bounce afer 12 minues of 3.6 V elecrical sress This hypohesis is confirmed by impedance measuremen of he PDN wih a vecor nework analyzer, as shown in Fig. 3. Whaever he elecrical sress ampliude and duraion, he impedance of he circui power disribuion nework remains consan over a large frequency range. This sudy has been done wih he financial suppor of French Naional Research Agency (projec EMRIC JC9_433714), he regional council of Midi-Pyrénées

3 IV. MODELING OF DIGITAL CORE AGING EFFECT ON POWER INTEGRITY AND CONDUCTED EMISSION hal-94531, version 1-17 Feb 214 Figure 3. Measuremens of he impedance of he power disribuion nework of he digial core before and afer elecrical sress (he core is no biased) From hese experimenal resuls, he following hypohesis can be proposed o explain he evoluion of power inegriy of he circui: he reducion of power supply volage bounce is only linked o he change of ransien curren produced by he core aciviy. Wear-ou mechanisms acceleraed by elecrical sress have reduced mobiliy of carrier in MOS devices so he swiching ransien curren has been spread. Fig. 4 presens he evoluion of he specrum of conduced emission of he digial core during he exposiion o he 3 V elecrical sress. Only he specrum envelop is shown o faciliae he comparison beween he differen curves. The resul shows a ime-dependen gradual reducion of he conduced emission specrum, which is more imporan a high frequency. The emission level a he circui LC resonance (24 MHz) is decreased afer sress. Above 4 MHz, he emission level decrease exceeds 5 db afer a 3 V sress applied during 24 minues. Above 1 GHz, he reducion of he CE level reaches 15 db. This experimenal resul confirms he previous hypohesis abou he effec of he elecrical sress on he PI: he degradaion mechanisms acceleraed by he elecrical sress no only reduces he ampliude of he ransien curren produced by he circui aciviy, bu also spread i because of a slowing down of he circui. The nex par inends o validae he proposed explanaion abou PI and CE evoluion by simulaion and hus o propose a mehod o predic he amoun of variaion of emission due o circui aging. Conduced emission (dbµv) Receiver noise floor 1 1,E+7 1,E+8 1,E+9 T = minue T = 6 minues T = 12 minues T = 24 minues Figure 4. Evoluion of he core conduced emission afer 24 minues of 3 V elecrical sress A. Emission model consrucion and validaion The EME model is based on ICEM approach [7]. The model includes wo main pars: he inernal aciviy (IA) block which models he ransien curren produced by circui operaion, and he power disribuion nework (PDN) which models he filering effec of he ransien curren due o IC and package. Fig. 5 presens a simplified srucure of he ICEM model of he digial core. A linear model based on an equivalen RLC circui is proposed for he PDN. The parameers of he model are exraced from measuremens. The passive elemen values are fied from an impedance measuremen beween Vdd and Vss pins of he digial core made wih vecor nework analyzer, as shown in Fig. 3. A very simple approach is used for IA modeling: wo riangular waveform curren sources describe he curren produced a each clock edge. Three parameers describe he curren pulse waveform: he ampliude Δi, he rise and fall imes Tr and Tf. Even hough such a waveform is quie simplisic, i provides a good esimaion of he acual curren waveform which can be uned wihou a precise analysis of he circui power consumpion. Iniially, he IA parameers are exraced from a SPICE ransien simulaion on he core model. Then, hey are uned in order o fi he simulaion resuls on PI measuremens done on a fresh device. Board decoupling Transien curren simulaion Power disribuion nework (PDN) curren ΔI I1 I Tr Inernal Aciviy (IA) IA modeling Figure 5. ICEM model of he digial core SPICE ransien simulaions are performed o compue he waveform of he power supply and he specrum of he conduced emission of he digial core from he ICEM model. Fig. 6 presens a comparison beween he measuremen and he simulaion of he power supply volage bounce before elecrical sress. The simulaed waveform is similar in erm of peak-opeak ampliude, pseudo-oscillaion period and damping. Alhough he correlaion beween measured and simulaed curves is no oally perfec, he model offers a sufficien accuracy for he aim of he sudy. A beer correlaion would rely on a more complex ransien curren waveform, exraced Tf ime

4 from a precise analysis of he power consumpion of he digial core. V TH can be esimaed by a power law model given by equaion (1), where A and γ are fiing coefficiens [11]. γ Δ V TH (%) = A (1) Vh change (%) Measuremen Vsr = 1.2 V Measuremen Vsr = 3.2 V Model Vsr = 1.2 V Model Vsr = 3.2 V ΔV h = ΔV h = hal-94531, version 1-17 Feb 214 Figure 6. Comparison beween measuremen and simulaion of he digial core power supply volage bounce before elecrical sress Fig. 7 presens a comparison beween he measured and simulaed specra of he core CE before elecrical sress. The correlaion beween measuremen and simulaion is also accepable up o 1 GHz. Exending he validiy range of he model requires a more complex model of he PCB and IC subsrae coupling Receiver noise floor 1,E+7 1,E+8 1,E+9 Measuremen Simulaion Figure 7. Comparison beween he measuremen and simulaion of he digial core conduced emission before elecrical sress B. Modeling of degradaion mechanisms induced by elecrical sress Coninuous elecrical sresses have been carried on 9 nm ransisors and have shown ha HCI and NBTI were acivaed on NMOS and PMOS ransisors respecively, and were dependen on he sress volage [9]. Boh degradaion mechanisms are acivaed in he digial core by he large volage ampliude applied on he power supply. However, he conribuion of he PMOS degradaion on he PI and CE evoluion is predominan. This fac can be verified by a SPICE simulaion of he digial core wih a modified model of PMOS ransisors which akes ino accoun NBTI effec. In he res of he sudy, only he NBTI on PMOS ransisor will be considered. NBTI is acivaed when a negaive gae-source volage is applied and leads o an increase of he hreshold volage V TH of PMOS ransisor and hus a reducion of he sauraion curren. Fig. 8 presens he experimenal characerizaion of he PMOS ransisor V TH evoluion wih ime when a consan gae-source volage is applied. Two sress volages ware applied: 1.2 V and 3.2 V. The ime evoluion of, Sress Time (s) Figure 8. Measuremen and modeling of V TH evoluion of 9 nm low volage PMOS device exposed o negaive gae-source volage The effec of NBTI can be aken ino accoun in a ransisor model such as BSIM4 by changing parameers which deal wih he hreshold volage. The modeling of hreshold volage is complex and depends on numerous parameers, such as he subsrae bias, channel geomery or doping profile [12]. Changing he parameer V TH, which defines he hreshold volage for a long channel wihou subsrae bias, provides a simple mehod o model NBTI effec. Thus SPICE simulaions can be done o predic he evoluion of IC ransien curren vs. he V TH drif. If V TH ime evoluion models such as shown in Fig. 8 are known, he evoluion of IC ransien curren vs. sress ime can be esimaed. For example, wih his CMOS echnology, a 3 V sress applied during 4 hours induces an increase of V TH of 19 %. SPICE simulaions done on he digial core model wih a modificaion of PMOS V TH model leads o a division by 2 of he ransien curren ampliude and a spreading of he curren peak. Informaion abou ransisor degradaion is useful o modify he conen of an ICEM model in order o predic he evoluion of EME. In he nex par, experimenal daa abou PMOS degradaion will be disregarded in order o propose and es a simple mehod o simulae aging effec on EME wih ICEM C. Inegraion of aging in ICEM model In order o ake ino accoun he aging of he circui in he ICEM model, he following simple mehodology is proposed. The mehodology relies on he assumpion ha he charge ransfer associaed o each gae swiching does no change afer sress. Alhough degradaion mechanisms can increase leakage curren and hus modify he dynamic curren consumpion, he measuremen of average curren consumpion of he circui does no evolve afer sress, which confirms he validiy of he hypohesis. Only hree parameers of he equivalen curren sources in IA block are changed o spread he curren pulse creaed by he digial core: he rise and fall imes Tr and Tf of he curren pulse are increased while is ampliude Δi is reduced. The evoluion of hese parameers mus ensure ha ransien curren inegraion over ime remains consan. Their evoluion is

5 governed by an empirical coefficien δ called degradaion raio, as shown by equaions 2 and 3. I makes he link beween he inrinsic degradaion mechanisms which affec he circui and he impac on he dynamic curren consumpion. δ equal o means ha he digial core is no degraded and he curren pulse is no spread. If δ increases, a larger amoun of degradaion is considered and he curren pulse is spread. In our ICEM model, he degradaion raio is applied on boh curren sources of he IA block symmerically. minues 3.6 V elecrical sress is simulaed wih he modified ICEM model. The degradaion raio value is also se o.58. Fig. 11 presens he comparison beween measuremen and simulaion resuls which are in a good agreemen up o 1 GHz. The simulaion reproduces he observed reducion of he CE specrum a high frequency. hal-94531, version 1-17 Feb 214 Δi = Δ ( 1 δ ), δ 1 (2) sress i iniial r sress r iniial =, δ 1 1 δ (3) D. Simulaion of elecrical sress impac on power inegriy By simulaion, he effec of δ on he PI can be sudied. Fig. 9 presens he evoluion of he peak-o-peak ampliude of he power supply bounce when δ is increased in boh curren sources. The resul confirms ha he power supply bounce is reduced when he curren pulse is spread. However, we need o confirm ha our approach is able o model he evoluion of he power supply volage waveform by a comparison wih he onchip measuremens done in sressed cores. Figure 9. Simulaed evoluion of he peak-o-peak ampliude of he power supply volage bounce vs. degradaion raio Excep if informaion abou ransisor degradaion is available, he coefficien δ value for a given amoun of sress is unknown iniially. However, he curve shown in Fig. 9 can help us o choose a reasonable value o fi wih EME measuremen. From on-chip measuremen resuls, a value of δ is seleced o obain he same volage flucuaion ampliude. Fig. 1 presens he comparison beween he measuremens and simulaions of he power supply volage bounces before and afer a 12 minues 3.6 V elecrical sress. The coefficien δ is se o.58 o model he effec of he sress in he ICEM model. The correlaion beween measuremen and simulaion curves is accepable. The ICEM model modified by he empirical degradaion raio is able o reproduce he evoluion of he power supply volage bounce wih a reasonable accuracy. E. Simulaion of elecrical sress impac on conduced emission In order o evaluae he relevance of our modeling mehodology, he conduced emission of he core afer a 12 Figure 1. Comparison beween measured and simulaed power supply volage bounce afer 12 minues of 3.6 V elecrical sress Receiver noise floor 1,E+7 1,E+8 1,E+9 Measuremen Simulaion Figure 11. Comparison beween he measuremen and simulaion of he digial core conduced emission afer 12 minues of 3.6 V elecrical sress The ICEM model is reused o simulae he effec of a differen value of sress volage. The following figures compare he measuremen and he simulaion of he evoluion of he CE specrum wih ime when he core is exposed o a 3 V sress. According o he measured power supply volage bounces and he graph presened in Fig. 9, he degradaion raio values are.4 and.5 for 18 and 24 minues respecively. The model is able o reproduce wih a quie good accuracy he imedependen reducion of he CE specrum up o 1 GHz. F. Evaluaion of he degradaion raio The predicion of he evoluion of EME of an IC wih ICEM relies on an accurae evaluaion of he degradaion raio. I can be exraced from daa abou ransisor degradaion mechanisms and an elecrical model of he circui o simulae how he ransien curren is spread. In his case sudy, he experimenal daa abou NBTI helps us o evaluae he hreshold volage increase vs. sress ime, for a given elecrical sress condiion. SPICE simulaions on he digial core nelis are performed o simulae he evoluion of ransien curren consumpion and o esimae he degradaion raio evoluion vs. he sress ime, as shown in Fig. 13. The evoluion of δ is correlaed o he change of hreshold volage and follows a power law as given by equaion (1).

6 hal-94531, version 1-17 Feb Measuremen - Core Fresh 1 Measuremen - afer 18min 3V sress Receiver noise floor Measuremen - afer 24min 3V sress 1,E+7 1,E+8 1,E Model - Core Fresh 1 Model - afer 18min 3V sress Receiver noise floor Model - afer 24min 3V sress 1,E+7 1,E+8 1,E+9 Figure 12. Measuremen (op) and simulaion (boom) of he evoluion of he CE specrum of he digial core exposed o a 3 V elecrical sress Degradaion raio,7,6,5,4,3,2,1 Vsress = 3.2 V Vsress = 1.2 V Model Vsress=3.2V Model Vsress=1.2V δ =.136 δ = ,E-1 1,E+ 1,E+1 1,E+2 1,E+3 1,E+4 1,E+5 1,E+6 1,E+7 1,E+8 Sress ime (s) Figure 13. Simulaed evoluion of he degradaion raio vs. sress ime For example, according o Fig. 8, a 3 V sress applied for 4 hours leads o an increase of V TH of 19 %. SPICE simulaion of he digial core shows ha he ransien curren ampliude is divided by 2 while is duraion is nearly muliplied by 2. This curren spread can be characerized by a degradaion raio equal o.5, which correlaes wih he choice made in he previous par o simulae he evoluion of CE. According o V TH evoluion equaion, under a nominal power supply volage equal o 1.2 V, he same variaion of V TH and, hus he same PI and CE change, would be obained afer nearly 2 years. V. DISCUSSION AND PERSPECTIVES The simulaion resuls confirm our hypohesis abou he origin of he evoluion of he PI and CE afer circui aging. The degradaion mechanisms induced a MOS device level, especially he NBTI mechanism, end o spread he curren pulses produced by he swiching of he gaes of he digial circui. I leads boh o a decrease of he power supply volage bounce and a reducion of he conduced emission specrum, especially he conribuion of high frequency harmonics. Moreover, hese resuls demonsrae ha he evoluion of he power inegriy can be prediced by a correc modeling of he change of he circui curren consumpion. A complex mehodology based on an accurae predicion of he power consumpion from he circui nelis combined wih he modeling of MOS device degradaion mechanisms could provide an accurae esimaion of he evoluion of he power supply volage bounce. However, in his paper, i has been demonsraed ha a more simple approach based on an ICEM model can also a reasonable esimaion of he evoluion of he parasiic emission and power supply volage bounce. A single empirical parameer called degradaion raio is inroduced in he model o ake ino accoun he curren spread induced by he IC aging. This parameer can be esimaed from daa abou degradaion mechanisms in he considered echnology and he elecrical model of he esed circui. Modeling IC emission and inegraing he effec of aging is fundamenal in order o predic he emission a a larger scale, e.g. a board which inegraes several ICs and numerous passive devices, whose characerisics may change wih ime. The perspecives of his work are hreefold: firsly, validaing he proposed mehod on more complex circui and verify if a unique degradaion raio is enough o predic EME evoluion wih ICEM model; secondly, he developmen of a simple mehod based on simulaion aiming a exracing he degradaion raio according o he sress condiions and duraion wihou a complee simulaion of he esed circui; hirdly, he inegraion of echnological process dispersion which adds a non negligible uncerainy o he predicion of he evoluion of he EME. REFERENCES [1] J. Srinivasan, S. V. Adve, P Bose, The impac of echnology scaling on lifeime reliabiliy, The Inernaional Conference on Dependable Sysems and Neworks, (24). [2] J. W. McPherson, Reliabiliy rends wih advanced CMOS scaling and he implicaions for design, 27 IEEE CICC Conference. [3] M. Whie, Y. Chen, Scaled CMOS echnology reliabiliy user s guide, NASA WBS , 28, hp://nepp.nasa.gov. [4] I. Monanari, A. Tacchini, M. Maini, Impac of hermal sress on he characerisics of conduced emissions, IEEE In. Symp. on EMC, 28 [5] A. Boyer, A. C. Ndoye, S. Ben Dhia, L. Guillo, B. Vrignon, Characerizaion of he evoluion of IC emissions afer acceleraed aging, IEEE Trans. on EMC, vol. 51, no 4, Nov. 29, pp [6] S. Ben Dhia, A. Boyer, B. Li, A. C. Noye, Characerizaion of he elecromagneic modelling drifs of a nanoscale IC afer acceleraed life ess, Elecronic Leers, 18h February 21, Vol. 46, no. 4. [7] IEC , Models of Inegraed Circuis for EMI behavioral simulaion ICEM-CE, ICEM Conduced Emission Model, Inernaional Elecroechnical Commission, Geneva, Swizerland, 26 [8] A. Boyer, S. Ben Dhia, C. Lemoine, B. Vrignon, Characerizing circui suscepibiliy wih on-chip sensors, AP-EMC, May 212, Singapore. [9] B. Li, Sudy of aging effecs on elecromagneic compaibiliy of inegraed circuis, Thesis, Universiy of Toulouse, December 211. [1] IEC Ed. 1.1, Inegraed circuis - Measuremen of conduced emissions - 1 Ω/15 Ω direc coupling mehod, IEC, Geneva, Swizerland, 26. [11] S. Chakravarhi, A. T. Krishnan, V. Reddy, C. F. Machala, S. Krishnan, A comprehensive framework for predicive modeling of negaive bias emperaure insabiliy, IEEE Proc. IRPS, pp , 24. [12] M. V. Dunga, e al., «BSIM46.1 MOSFET Model Suser s Manual», 27 UC Berkeley.