Università degli Studi di Roma Tor Vergata Dipartimento di Ingegneria Elettronica. Analogue Electronics. Paolo Colantonio A.A.

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1 Universià degli Sudi di Roma Tor Vergaa Diparimeno di Ingegneria Eleronica Analogue Elecronics Paolo Colanonio A.A

2 Diode circui analysis The non linearbehaviorofdiodesmakesanalysisdifficul consider hissimplecircui Applying Kirchhoff's volage law From he diode equaion To find I we need o solve hese wo simulaneous equaions 2 29

3 Load Line One approach is hrough he use of a load line I represens all and he only operaing poins of he device load line 3 29

4 Dymanic load line and ransfer curve i v o =i R L v i /R L v i /R L A Dinamyc load line B + v i + v A - i R L + v o A B - - v v D i R L v i vi 4 29

5 Dymanic load line and ransfer curve V o V o B J V oa A C K V ia V i D E F G H I F E G D H A C I K B J + - v i + v A - i R L + - v o 5 29

6 Generic load line Consider he following circui v + i=f(v) - + Applying he Kirchoff law V i i i i=f(v) - v i=f(v) characerisic of elemen A i=f(v ) characerisic of elemen B To graphically solve he circui, we can consider v=v i v load line of A i=f(v) characerisic of A I Q If A and B are wo diodes 6 29 v

7 Analysis mehodologies There are wo simplified mehods o analyze a circui conaining diodes OFF sae I R f Linearized diode characerisic R f + V ON sae R i V ON v Sae approach I is assumed ha each diode in he circui could be in a defined sae (ON or OFF) and is replaced wih is simplified equivalen circui The resuling linear circui is analyzed by using he Kirchoff laws Afer he analysis, he iniial assumpion on he diodes saes are verified If some condiion is no verified (e.g. posiive curreninadiodeassumedoff),hesaeof he diode is changed and he analysis is repeaed Turning poin approach For each diode are deermined he urning poin condiion by using he assumpion i d =0A and v d =V ON V (in he ideal case i d =0 and v d =0) In he char of ransfer curve vo=f(vi) are repored he urning poins above deermined Such poins are conneced by a linear line The exremes of he ransfer characerisic are compued by evaluaing he slope of he lines passing hrough he exremes urning poin assuming v i <<0 or v o >>0 7 29

8 Clipper Diode off V o Diode on V o Slope=R f /(R f +R) oupu V R +V ON Turning poin approach V i V R +V ON Slope 1 V i v i <<0 diode OFF v o =v i slope = 1 v o >>0 diode ON v o =[v i (V ON +V R )]R f /(R+R f ) slope = R f /(R+R f ) inpu 8 29

9 Clipper Oher examples of clipping circuis V o inpu V o V o V o V R oupu 9 29

10 Slicer D 1 OFF D 2 OFF D 1 ON, D 2 OFF v o V R2 D 1 OFF, D 2 ON v o oupu V R1 Slope 1 Inpu v i Oupu v o Diode sae V R1 V R2 v i v i V R1 v o =V R1 D 1 ON, D 2 OFF v i V R1 < v i < V R2 v o =v i D 1 OFF, D 2 OFF v i V R2 v o =V R2 D 1 OFF, D 2 ON inpu 10 29

11 + R L v o - Sampling circui The diodes can be mouned in a bridge configuraion o make signal sampling V S D 1 D 2 V p R S P 2 P 3 P 4 R S P 1 +v S -v S -V n D 3 D 4 V i T S T n V i inpu For posiive sampling signal V S =V p, all he diodes should be in he ON sae The oupu is ideally v o =v i For negaive sampling signal V S = V n, all he diodes should be in he OFF sae The oupu is ideally v o =0 V o oupu 11 29

12 Sampling circui analysis The analysis can be performed by using he superposiion principle (ha is possible only for linear circuis, i.e. assuming ha he diodes do no change heir saes) Sampling inerval T S All he diodes mus be forward biased P 2 +V R R S S S -V S P 3 R L P 4 R S R L P 3 P 4 R S V i V i =0 P 1 V S =0 P 1 From he analysis curren i follows: 12 29

13 Sampling circui analysis NO sampling inerval T n All he diodes mus be reversed biased (OFF sae) R L v o + I easily verified for D 1,D 2 and D 3 For D 4 i is required ha: R S D 1 D 2 P 2 P 3 P 4 P 1 -V n +V n D 3 D 4 R S - Thus he following wo condiions allow he circui dimensioning V i 13 29

14 Half wave recifier I is a version of he clipper circui wih V R =0 In he diode ON sae, assuming a sinusoidal signal Vi=V m sin( ), i is possible o wrie i=

15 Full wave recifier I can be realized by connecing wo half wave recifier, in order o operae for half period each one The average curren value is given by 15 29

16 Half wave recifier wih capaciive filer Le us consider a half wave recifier wih a capaciive load, used o produce a seadier oupu 1 < < 2 When v i > V ON, he diode is ON and he curren flows oward R and C. C is charging wih a low 2 < < 3 The diode urns OFF and he capaciance discharge wih law V M v o

17 Analysis of half wave recifier wih capaciive filer Conducing period ( 0 1 ) The diode urns OFF when i=0 Non conducing period ( 1 2 ) Assuming R OFF = Nex conducing period 17 29

18 Oupu volage If he ime consan RC is larger han he period T, he exponenial curve can be approximaed in a linear way (i.e. by is angen) V P V v p 2 3 In he inerval 2 3, by a variable change, we can wrie Assuming 2 3 T(T=period) 18 29

19 Circui issue V i i D v o 1 < < 2 Diode ON D R i R C i C 2 < < 3 Diode OFF i D v i v o The maximum curren in he circui appears a he saring poin, i.e. when he capaciance is no charged (v o =0) 19 29

20 Full wave recifier wih capaciive filer The se of a full wave recifier reduces he ime for which he capacior has o mainain he oupu volage and hus reduce he ripple volage Generally a diode bridge is adoped in pracical implemenaions 20 29

21 Envelope deecor The half wave recifier wih capaciive filer can be used o reveal he peak of a signal I is used o demodulae full ampliude modulaed signals (full AM) I is also known as signal recifier m modulaion index Modulaion frequency Carrier frequency The opimum ime consan 0 is found imposing ha a = 0 he slope of he envelope be less of he exponenial slope due o he RC ank (i.e. he oupu goes down mos slowly) < 21 29

22 Envelope deecor Thus Deriving wih respec 0, i follows: Found in a wide range of radio receivers 22 29

23 Clamper or DC resorer Someimes i is required o lock a periodic signal o a fixed (posiive or negaive) level V R Assuming RC>>T and an ideal diode V c =(V m V R ) V o =V i - V c =V m sin( ) (V m V R ) The oupu signal is locked o he reference level V R wih a non zero average value 23 29

24 Signal clamping a simple form of signal condiioning circuis limi he excursion of he volage waveform can use a combinaion of signal and Zener diodes 24 29

25 Volage doubler A combinaion of a Peak deecor and Level Translaor can be properly combined o produce very high consan volages Peak deecor v in v ou v in v ou 1 2 Time inerval 0 < < 1 Iniially he capacior is discharged The diode is ON and a curren sars o flow charging he capacior Time inerval 1 << 2 The diode urns OFF The capacior can no discharge, hus he oupu signal remains locked o peak value 25 29

26 Volage ranslaor v c v in v ou Volage doubler v in v ou v c 1 2 0<< 1 The diode is iniially OFF, and no curren is flowing in he circui 1 << 2 Aheimeinsan 1,v in =-V ON, and he diode urns ON The oupu volage is locked o V ON and he capaciance sars o charge (assume very small) > 2 A he ime insan 2, v in = V M +V ON, and laer he volage across he diode becomes lower han V ON, hus he diode urns OFF (keeping his sae) 26 29

27 Volage doubler Charges C 2 o nearly wice he peak inpu volage C 1 v A D 2 Several sages can be cascaded o produce very high volages v in D 1 C 2 v ou Ideal in applicaions requiring high volages a low currens 27 29

28 Volage muliplier Volage ripler By using a consan volage (baery V A ) under he volage ranslaor, he volage a node B is furher ranslaed (now he minimum is V A ) v in B v A v ou The consan volage VA can be realized by using a peak deecor v in v ou 28 29

29 Volage muliplier Example of Volage muliplier x