Introduction to Digital Circuits

Transcription

1 The NMOS nerer The NMOS Depleion oad 50 [ D ] µ A GS Resisance characerisic of Q GS 0.5 GS 0 GS 0.5 GS.0 GS.5 [ ] DS GS i 0 Q Q Depleion load Enhancemen drier Drain characerisic of he load MOSFET Q

2 D OH O 0.5 D DS o ( ) f D D 0 oad line o A 5 Transfer characerisic of he inerer. B H 3.4 i D [ D ] µ A The drain characerisic of he drier MOSFET Q. oad line The NMOS nerer The NMOS Depleion oad GS 6.0 GS 5.0 GS 4.0 GS 3.0 [ ] DS

3 The NMOS nerer The NMOS Depleion oad OH 5.8 O H 3.4 Noise Margins NM H OH min H min NM max O max The addiional processing seps are required o fabricae boh depleion and enhancemen deices on he same chip. 3

4 Summary The NMOS nerer The NMOS Depleion oad The inear (Nonsauraed) oad The Sauraed Enhancemen oad Transfer characerisic of he inerer. 5 Depleion load W i inear load Sauraed load Sauraed load W W W 4 4 4

5 Propagaion Delay of an NMOS nerer The speed of NMOS inerer is limied by he load capaciors. hargin and discharging ime. + + Transiion ime Depleion load Q oad i R Deice capaciances : olage-dependen capaciors gae-o-drain drain-o-subsrae i i i D i Q drier o onrolled i D swich R ON npu Drier i o source-o-subsrae (a) (b) (a) An NMOS depleion-load inerer For pencil-and-paper calculaions all capaciie effecs can be summed o form a single oal capaciance o. (b) Equialen circui represenaion 5

6 Propagaion Delay of an NMOS nerer Assumpions: (swich is closed) When he drier fe Q is conducing, he swiching elemen has resisance R ON. (swich is open) When Q is OFF, we assume ha he open swich has infinie resisance R OFF. oad i + R onrolled swich i D i When inpu is (0), hen oupu is (). is charged o o npu R ON Drier (b) o 6

7 Propagaion Delay of an NMOS nerer npu ransiion is (0) o () Oupu ransiion is () o (0) o mus be discharged oward (0). ( ) ( ) ( 0) ( ) o R + ON ( ) ( 0) o R RON 0 ( 0) [ ( ) + ( 0) ] ph swich is closed τ H Time consan o ( R R ) ON 7

8 Propagaion Delay of an NMOS nerer Oupu ransiion is () o (0) ' o ( ) ( 0) + ( ) ( 0) ph [ ] [ ( ) + ( 0) ] ( ) ( ) The capacior discharge exponenially from () oward (0). (Assumpion) ' ( 0) [ ( ) + ( 0) ] ph ph τ R and R ON are consan can be calculaed from he analyical expression for he exponen cure. H Time consan o ( R R ) ON 8

9 Propagaion Delay of an NMOS nerer npu ransiion is () o (0) Oupu ransiion is (0) o () o mus be charged oward (). ( ) ( ) ON ( 0) ( 0) ( ) ( ) o R + o R RON ph [ ( ) + ( 0) ] swich is open ( 0) 9

10 Propagaion Delay of an NMOS nerer The capacior is charged exponenially from (0) oward (). Oupu ransiion is (0) o () (Assumpion) ph R is consan can be calculaed from he analyical expression for he exponen cure. Time consan τ H o R Since R >> R ON >> ph ph n pracical circuis, resisances R and R ON depends on olage. We mus use approximaion, based on he amoun of charge ransferred o (or from) o. 0

11 Approximaie calculaions for ph Propagaion Delay of an NMOS nerer + Discharge curren is : i is ime-arying a is aerage alue of during ime ineral Q is change of charge on o i a i Q i D i during ime ineral o o onrolled swich npu oad i i D R ON Drier R i o ph o a [ ( ) ( 0) ] When ph [ ( ) ( 0) ]

12 i Approximaie calculaions for i D i [ ] ' OH + O OH ph ( ) ( ) ' ' [ i ( ) + i ( )] a 0 OH o [ ( ) + ( 0) ] Propagaion Delay of an NMOS nerer O ( 0) ph a [( ) ( ) ] i i + i i ' D OH D

13 Propagaion Delay of an NMOS nerer Approximaie calculaions for ( ) ( ) [ ] ' ph i ( ) + i ( ) OH a o 0 O [ ( ) + ( 0) ] ' ph ( 0) O swich is open ph o a [ ( ) ( 0) ] a [( ) ( ) ] i i + i i ' D O D 3

14 The NMOS NOR Gae H H A B Y Sae Sae 0 0 H H 0 0 o OH O O O Sae The ruh able of he -inpu NMOS NOR gae. Y A + B A Depleion load B driers + Y oad onrolled swiches A B Driers + R Y (a) An NMOS NOR gae. (b) dealized represenaion of he NMOS NOR gae. 4

15 The NMOS NAND Gae A B Y Sae Sae ( 0) 0 ( 0) 0 0 ( ) ( 0) 0 ( ) 0 ( ) ( ) ( 0) 0 0 ( ) ( ) ( ) ( 0) 0 0 Sae The ruh able of he -inpu NMOS NAND gae. o Depleion load A + Y oad onrolled swiches A + R Y Y A B B driers (a) An NMOS NAND gae. B (b) dealized represenaion of he NMOS NAND gae. 5

16 Assumpions : MOSFETs are perfecly mached. λ K TON N N λ P K P TOP µ 0 W Where µ is mobiliy of charge carrier: elecron or hole Elecrons has higher mobiliy i + Q Q PMOS load NMOS drier The MOS nerer omplemenary Meal-Oxide-Semiconducor circuis irually no saic power dissipaion + A A W PMOS W.5 NMOS The circui diagram of a MOS inerer. Equialen represenaion of he MOS inerer. 6

17 The MOS nerer Drain characerisics wih hannel-engh Modulaion D Ohmic region (inear) Boundary > GS TO DS Sauraion region < GS TO DS Subhreshold GS < TO DS Drain characerisics of n-channel enhancemen MOSFET 7

18 The MOS nerer + PMOS linear NMOS off PMOS linear NMOS sauraed OH i Q PMOS load TO PMOS and NMOS sauraed TO Q NMOS drier PMOS sauraed NMOS linear The circui diagram of a MOS inerer. O H / PMOS off NMOS linear TO i 8

19 Ohmic Region D k W Boundary Region [ ( ) ] GS > GS GS W k TO D DS TO TO DS DS DS DS k µ n 0 The MOS nerer Enhancemen-mode MOSFET W/ aspec raio W channel widh channel lengh TO hreshold olage k process parameer µ n elecron mobiliy 0 gae capaciance per uni area ff/µm Typical alues of parameer k Sauraion Region < GS TO DS 0 o 50 µ A DS k W ( ) ( + λ ) GS TO DS Early olage /λ Millman/Grabel 9

20 Ohmic Region D KP W > [ ] ( ) GS GS TO TO DS DS DS The MOS nerer SPE MODE (large signal) Enhancemen-mode MOSFET Sauraion Region DS KP W < GS ( ) GS TO TO DS KP µ n 0 Typical alues : TO 0.7 KP 30 µa/ Sauraion Region wih channel-lengh modulaion DS KP W GS TO ( ) ( + λ ) DS 0

21 i i i D D KP KP N W W Sauraion Region N ( ) ( + λ ) i TO < GS o TO DS ( ) [ + ( )] P i TO λ P ( ) i ( ) where D i D i i o o Assumpion: MOSFETs are idenical k GS DS i o SG i The MOS nerer SD SG Q + PMOS load o i SD Swiching-poin olage (ideal) TO GS Q NMOS drier DS The slope of he ransfer characerisic a swiching-poin can be calculaed from small-signal gain / i. TO PMOS and NMOS sauraed i The circui diagram of a MOS inerer. /

22 The MOS nerer o Unloaded olage gain : o A m + i ( g g )( r r ) m d d + i - G - g m gs G + gs gs S + S - g m gs r r d d + o - Small-signal model of he push-pull sage Assumpion: MOSFETs are idenical A g m r d Slope f we use "ideal" MOSFETs, hen ( λ 0) A gmrd when rd / PMOS and NMOS sauraed i

23 The MOS nerer KP P W P < KP N W N KP P W P KP N W N KP P W P > KP N W N / i 3

24 Power Dissipaion of MOS ogic Toal Power Dissipaion : P P + P + o dync dp P saic Dynamic Power onsumpion P dync P dp Dissipaion due o load capaciances Dissipaion due o direc - pah curren Saic Power onsumpion P saic eakage currens 4

25 Power Dissipaion of MOS ogic Dynamic Power onsumpion Pdync + i i Energy-consuming ransiion harge Discharge Sored energy in capaciance during low-o-high ransiion: E ( ) d d i 0 o 0 o Q U 5

26 Power Dissipaion of MOS ogic Dynamic Power onsumpion Pdync Energy, aken from supply during low-o-high ransiion: E d d o ( ) d d i 0 0 Energy, dissipaed by PMOS during low-o-high ransiion: E E E PMOS Energy (sored in ), dissipaed by NMOS during high-o-low ransiion: E E 6

27 Power Dissipaion of MOS ogic Dynamic Power onsumpion Pdync Swiching aciiy f 0 frequency of energy consuming ransiions Power consumpion for inerer P dync f 0 For more complex gaes and circuis P dync EFF f EFF is aerage capaciance swiched eery clock cycle. 7

28 Power Dissipaion of MOS ogic Dynamic Power onsumpion Pdp Dissipaion Due o Direc - Pah urrens (For inerer) i PEAK T i SHORT Energy in one cycle (ime period T)? 8

29 Power Dissipaion of MOS ogic Dynamic Power onsumpion Pdp Dissipaion Due o Direc - Pah urrens Time when boh deices are conducing i SHORT sc Approximaion PEAK TO TO PEAK sc PEAK sc E dp + E T dp P dp Simple approximaion Assumpion: Rise and fall imes are equal. sc PEAK f PEAK sc s 9

30 Power Dissipaion of MOS ogic Dynamic Power onsumpion Pdp 90% PEAK sc s TO r( f ) ( ) TO TO Shor-circui power dissipaion can be modeled by adding a load capaciance sc in parallel wih. 0% TO r sc "Shor-circui capaciance" sc s Edp Pdp sc PEAK f sc T f where Q sc sc PEAK sc 30

31 Power Dissipaion of MOS ogic Saic Power onsumpion Psaic Saic Power onsumpion P saic The saic (or seady-sae) power dissipaion of a circui is expressed by he relaion : P sa sa sa is he curren ha flows beween he supply rails in he absence of swiching aciiy. Typical leakage curren per uni drain area : 0 00 pa/ µ m + (For inerer) million gaes 0.5µm drain area.5 0.5mW ow o Howeer, leakage curren depends on he emperaure. doubles on eery 0 T a 85 eakage currens increase by a facor of 60 oer heir room emperaure alues. Drain eakage urren Subhreshold curren 3

32 Power Dissipaion of MOS ogic Toal Power onsumpion Po o ( + ) f leak P P P P + dync + dp + saic peak sc 0 apaciie power dissipaion is by far he dominan facor 3

33 The End 33