NCV4279A. 5.0 V Micropower 150 ma LDO Linear Regulator with DELAY, Adjustable RESET, and Sense Output

Transcription

1 5. Micropower 5 ma LDO Linear Regulator with DELAY, Adjustable RESET, and Sense Output The NC4279A is a 5. precision micropower voltage regulator with an output current capability of 5 ma. The output voltage is accurate within ±2.% with a maximum dropout voltage of.5 at ma. Low quiescent current is a feature drawing only 5 A with a. ma load. This part is ideal for any and all battery operated microprocessor equipment. Microprocessor control logic includes an active reset output RO with delay and a SI/SO monitor which can be used to provide an early warning signal to the microprocessor of a potential impending reset signal. The use of the SI/SO monitor allows the microprocessor to finish any signal processing before the reset shuts the microprocessor down. The active Reset circuit operates correctly at an output voltage as low as.. The Reset function is activated during the power up sequence or during normal operation if the output voltage drops outside the regulation limits. The reset threshold voltage can be decreased by the connection of an external resistor divider to the R ADJ lead. The regulator is protected against reverse battery, short circuit, and thermal overload conditions. The device can withstand load dump transients making it suitable for use in automotive environments. The device has also been optimized for EMC conditions. If the application requires pullup resistors at the logic outputs Reset and Sense Out, the NC4269A with integrated resistors can be used. Features 5. ± 2.% Output Low 5 A Quiescent Current Active Reset Output Low Down to Q =. Adjustable Reset Threshold 5 ma Output Current Capability Fault Protection +6 Peak Transient oltage 4 Reverse oltage Short Circuit Thermal Overload Early Warning through SI/SO Leads Internally Fused Leads in SO 4 Package ery Low Dropout oltage Electrical Parameters Guaranteed Over Entire Temperature Range These are Pb Free Devices NC Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC Q Qualified and PPAP Capable 4 MARKING DIAGRAMS 8 SO A5 D SUFFIX ALYW CASE 75 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week, G = Lead Free Indicators PIN CONNECTIONS I SI R ADJ D SO 4 D2 SUFFIX CASE 75A 8 SO 8 NC4279A5G AWLYWW SO RO ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. 4 Q 4 R ADJ SI D I Q RO SO SO 4 Semiconductor Components Industries, LLC, 23 May, 23 Rev. 4 Publication Order Number: NC4279A/D

2 I Reference and Trim Error Amplifier Current and Saturation Control Q D RO or Reference SO R ADJ SI + Figure. Block Diagram PACKAGE PIN DESCRIPTION Package Pin Number SO 8 SO 4 Pin Symbol Function 3 R ADJ Reset Threshold Adjust; if not used to connect to. 4 2 D Reset Delay; To Set Time Delay, Connect to with a Capacitor 5 3, 4, 5, 6,,, 2 Ground 6 7 RO Reset Output; This is an Open Collector Output. Leave Open if Not Used. 7 8 SO Sense Output; This is an Open Collector Output. If not used, keep open. 8 9 Q 5 Output; Connect to with a F Capacitor, ESR <. 3 I Input; Connect to Directly at the IC with a Ceramic Capacitor. 2 4 SI Sense Input; If not used, Connect to Q. 2

3 MAXIMUM RATINGS (T J = 4 C to 5 C) Parameter Symbol Min Max Unit Input to Regulator I I I 4 Internally Limited 45 Internally Limited Input Peak Transient oltage I 6 Sense Input SI I SI 4 45 ma Reset Threshold Adjust RADJ.3 I RADJ 7 ma Reset Delay D.3 ID Internally Limited 7 Internally Limited Ground I q 5 ma Reset Output RO.3 I RO Internally Limited 7 Internally Limited Sense Output SO.3 I SO Internally Limited 7 Internally Limited Regulated Output Q.5 IQ 7. ma Junction Temperature Storage Temperature T J T STG C C Input oltage Operating Range Junction Temperature Operating Range I T J C LEAD TEMPERATURE SOLDERING AND MSL Parameter Symbol alue Unit MSL, 8 Lead, 4 Lead, LS Temperature 26 C Peak (Notes 3) MSL Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. This device series incorporates ESD protection and exceeds the following ratings: Human Body Model (HBM) 4. k per AEC Q 2. Machine Model (MM) 2 per AEC Q Latchup Current Maximum Rating: 5 ma per AEC Q Lead free: 6 5 Sec above 27 C, 4 Sec Max at Peak, 265 C Peak. THERMAL CHARACTERISTICS Characteristic Test Conditions (Typical alues) Unit SO 8 Package (Note 4) Junction to Pin 4 ( JL4, L4 ) 53.8 C/W Junction to Ambient Thermal Resistance (R JA, JA ) 7.9 C/W SO 4 Package (Note 4) Junction to Pin 4 ( JL4, L4 ) 8.4 C/W Junction to Ambient Thermal Resistance (R JA, JA ).6 C/W 4. 2 oz copper, 5 mm 2 copper area,.5 mm thick FR4 3

4 ELECTRICAL CHARACTERISTICS ( 4 C T J 5 C, I = 3.5 unless otherwise specified) REGULATOR Characteristic Symbol Test Conditions Min Typ Max Unit Output oltage Q ma I Q ma; 6 I Current Limit I Q ma Current Consumption; I q = I I I Q I q I Q = ma, RO, SO High 9 25 A Current Consumption; I q = I I I Q I q I Q = ma, RO High, SO Low (Note 5) A Current Consumption; I q = I I I Q I q I Q = ma, RO, SO High A Current Consumption; I q = I I I Q I q I Q = 5 ma, RO, SO High ma Dropout oltage dr I Q = ma (Note 6).25.5 Load Regulation Q I Q = 5 ma to ma 2 m Line Regulation Q I = 6 to 26 ; I Q = ma 3 m RESET GENERATOR Reset Switching Threshold RT Reset Adjust Switching Threshold RADJ,TH Q > Reset Output Saturation oltage RO,SAT Q < RT, R RO = 2 k..4 Upper Delay Switching Threshold UD Lower Delay Switching Threshold LD Saturation oltage on Delay Capacitor D,SAT Q < RT. Charge Current I D,C D = A Delay Time L H t d C D = nf 7 28 ms Delay Time H L t RR C D = nf 3.5 s INPUT OLTAGE SENSE Sense Threshold High SI,High Sense Threshold Low SI,Low Sense Output Saturation oltage SO,Low SI <.2 ; Q > 3 ; R SO = 2 k..4 Sense Input Current I SI... A 5. Including 2 k external SO pull up resistor current. 6. Dropout voltage = I Q measured when the output voltage has dropped m from the nominal value obtained at 3.5 input. 4

5 I I I Q I Q F C I 47 nf R ADJ R SO C Q 22 F R RO I I SI SI RADJ D RO SO I RADJ Q SI I D I q RO SO RADJ C D nf D R ADJ2 Figure 2. Measuring Circuit I t Q < t RR RT D d dt I D CD t UD LD t td t RR RO RO,SAT t Power on Reset Thermal Shutdown oltage Dip at Input Undervoltage Secondary Spike Overload at Output Figure 3. Reset Timing Diagram 5

6 Sense Input oltage SI,High SI,Low t Sense Output oltage High Low Figure 4. Sense Timing Diagram t 6

7 TYPICAL PERFORMANCE CHARACTERISTICS I = 3.5 D = I = 3.5 I D,C. ( A) 8 6 D, () UD LD T J ( C) Figure 5. Charge Current I D, C vs. Temperature T J T J ( C) Figure 6. Switching oltage UD and LD vs. Temperature T J T J = 25 C.6.5 dr (m) 3 2 T J = 25 C T J = 4 C DRADJ,TH, () I Q (ma) T J ( C) Figure 7. Drop oltage dr vs. Output Current I Q Figure 8. Reset Adjust Switching Threshold RADJ,TH vs. Temperature T J I q (ma) R L = 33 Q, () 8 6 R L = R L = 5 R L = R L = I () I () Figure 9. Current Consumption I q vs. Input oltage I Figure. Output oltage Q vs. Input oltage I 7

8 TYPICAL PERFORMANCE CHARACTERISTICS.6.5 I = I = 3.5 SI, ().4.3 Sense Output High Sense Output Low Q, () T J ( C) Figure. Sense Threshold SI vs. Temperature T J T J ( C) Figure 2. Output oltage Q vs. Temperature T J 35 3 I Q (m) T J = 25 C T J = 25 C I () Figure 3. Output Current I Q vs. Input oltage I 8

9 TYPICAL PERFORMANCE CHARACTERISTICS I q, (ma) I = 3.5 T J = 25 C I q, (ma) I = 3.5 T J = 25 C I Q (ma) Figure 4. Current Consumption I q vs. Output Current I Q I Q (ma) Figure 5. Current Consumption I q vs. Output Current I Q I Q = ma 25 T J = 25 C T J = 25 C 2 I Q = A I q, (ma) 4 3 I q, ( A) 5 2 I Q = 5 ma I Q = ma I () I () Figure 6. Current Consumption I q vs. Input oltage I Figure 7. Current Consumption I q vs. Input oltage I 9

10 TYPICAL THERMAL CHARACTERISTICS JA ( C/W) COPPER HEAT SPREADER AREA (mm 2 ) SO 8 Std Package NC4279,. oz SO 8 Std Package NC4279, 2. oz SO 4 w/6 Thermal Leads NC4279,. oz SO 4 w/6 Thermal Leads NC4279, 2. oz Figure 8. Junction to Ambient Thermal Resistance ( JA ) vs. Heat Spreader Area R(t) ( C/W) PULSE TIME (s) Single Pulse (SO 8 Std Package) PCB = 5 mm 2, 2. oz Single Pulse (SO 4 w/6 Thermal Leads) PCB = 5 mm 2, 2. oz LA (SO 8) LA (SO 4) Figure 9. R(t) vs. Pulse Time

11 APPLICATION DESCRIPTION OUTPUT REGULATOR The output is controlled by a precision trimmed reference. The PNP output has drive quiescent current control for regulation while the input voltage is low, preventing over saturation. Current limit and voltage monitors complement the regulator design to give safe operating signals to the processor and control circuits. RESET OUTPUT (RO) A reset signal, Reset Output, RO, (low voltage) is generated as the IC powers up. After the output voltage Q increases above the reset threshold voltage RT, the delay timer D is started. When the voltage on the delay timer D passes UD, the reset signal RO goes high. A discharge of the delay timer D is started when Q drops and stays below the reset threshold voltage RT. When the voltage of the delay timer D drops below the lower threshold voltage LD the reset output voltage RO is brought low to reset the processor. The reset output RO is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC, thereby guaranteeing that RO is valid for Q as low as.. RESET ADJUST (R ADJ ) The reset threshold RT can be decreased from a typical value of 4.65 to as low as 3.5 by using an external voltage divider connected from the Q lead to the pin RADJ, as shown in Figure 2. The resistor divider keeps the voltage above the RADJ,TH (typical.35 ) for the desired input voltages, and overrides the internal threshold detector. Adjust the voltage divider according to the following relationship: RT RADJ, TH (RADJ RADJ2) RADJ2 (eq. ) If the reset adjust option is not needed, the R ADJ pin should be connected to causing the reset threshold to go to its default value (typically 4.65 ). RESET DELAY (D) The reset delay circuit provides a delay (programmable by capacitor C D ) on the reset output lead RO. The delay lead D provides charge current I D,C (typically 6.5 A) to the external delay capacitor C D during the following times:. During Powerup (once the regulation threshold has been exceeded). 2. After a reset event has occurred and the device is back in regulation. The delay capacitor is set to discharge when the regulation ( RT, reset threshold voltage) has been violated. When the delay capacitor discharges to LD, the reset signal RO pulls low. SETTING THE DELAY TIME The delay time is set by the delay capacitor C D and the charge current I D. The time is measured by the delay capacitor voltage charging from the low level of DSAT to the higher level UD. The time delay follows the equation: td [CD (UD D, SAT)] ID (eq. 2) Example: Using C D = nf. Use the typical value for D,SAT =.. Use the typical value for UD =.8. Use the typical value for Delay Charge Current I D = 6.5 A. td [ nf (.8. )] 6.5 A 26.2 ms (eq. 3) BAT I Q DD C I * C D. F D NC4279A R ADJ SI R ADJ R ADJ2 R SI R RO R SI2 R SO C Q ** F (2.2 F) Microprocessor SO RO I/O I/O *C I required if regulator is located far from the power supply filter. ** C Q minimum cap required for stability is 2.2 F while higher over/under shoots may be expected. Cap must operate at required temperature range. Figure 2. Application Diagram

12 SENSE INPUT (SI) / SENSE OUTPUT (SO) OLTAGE MONITOR An on chip comparator is available to provide early warning to the microprocessor of a possible reset signal. The output is from an open collector driver. The reset signal typically turns the microprocessor off instantaneously. This can cause unpredictable results with the microprocessor. The signal received from the SO pin will allow the microprocessor time to complete its present task before shutting down. This function is performed by a comparator referenced to the band gap voltage. The actual trip point can be programmed externally using a resistor divider to the input monitor SI (Figure 2). The values for R SI and R SI2 are selected for a typical threshold of.2 on the SI Pin. SIGNAL OUTPUT Figure 2 shows the SO Monitor timing waveforms as a result of the circuit depicted in Figure 2. As the output voltage ( Q ) falls, the monitor threshold ( SILOW ), is crossed. This causes the voltage on the SO output to go low sending a warning signal to the microprocessor that a reset signal may occur in a short period of time. T WARNING is the time the microprocessor has to complete the function it is currently working on and get ready for the reset shutdown signal. When the voltage on the SO goes low and the RO stays high the current consumption is typically 56 A at ma load current. Q SI SI,Low RO SO T WARNING Figure 2. SO Warning Waveform Time Diagram STABILITY CONSIDERATIONS The input capacitor C I in Figure 2 is necessary for compensating input line reactance. Possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately. in series with C I. The output or compensation capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures ( 25 C to 4 C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer s data sheet usually provides this information. The F output capacitor C Q shown in Figure 2 should work for most applications; however, it is not necessarily the optimized solution. Stability is guaranteed at CQ is min 2.2 F and max ESR is. There is no min ESR limit which was proved with MURATA s ceramic caps GRM3MR7A225KA (2.2 F,, X7R, 26) and GRM3CR7A6KA ( F,, X7R, 26) directly soldered between output and ground pins. CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR The maximum power dissipation for a single output regulator (Figure 2) is: PD(max) [I(max) Q(min)]IQ(max) I(max)Iq (eq. 4) where: I(max) is the maximum input voltage, Q(min) is the minimum output voltage, I Q(max) is the maximum output current for the application, and I q is the quiescent current the regulator consumes at I Q(max). Once the value of P D(max) is known, the maximum permissible value of R JA can be calculated: R JA = (5 C T A ) / P D (eq. 5) The value of R JA can then be compared with those in the package section of the data sheet. Those packages with R JA s less than the calculated value in equation 2 will keep the die temperature below 5 C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. The current flow and voltages are shown in the Measurement Circuit Diagram. HEATSINKS A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of R JA : R JA R JC R CS R SA (eq. 6) where: R JC = the junction to case thermal resistance, R CS = the case to heat sink thermal resistance, and R SA = the heat sink to ambient thermal resistance. R JC appears in the package section of the data sheet. Like R JA, it too is a function of package type. R CS and R SA are functions of the package type, heatsink and the interface between them. These values appear in data sheets of heatsink manufacturers. Thermal, mounting, and heatsinking considerations are discussed in the ON Semiconductor application note AN4/D, available on the ON Semiconductor website. 2

13 ORDERING INFORMATION NC4279A5DG Device Output oltage Package Shipping SO 8 (Pb Free) 98 Units/Rail NC4279A5DR2G NC4279A5D2G 5. SO 8 (Pb Free) SO 4 (Pb Free) 25 Tape & Reel 55 Units/Rail NC4279A5D2R2G SO 4 (Pb Free) 25 Tape & Reel For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. 3

14 PACKAGE DIMENSIONS SOIC 8 CASE 75 7 ISSUE AK Y B X 8 A 5 4 S.25 (.) M Y M K NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION.5 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.5) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION THRU 75 6 ARE OBSOLETE. NEW STANDARD IS Z H G D C.25 (.) M Z Y S X S SEATING PLANE. (.4) N X 45 M J MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D G.27 BSC.5 BSC H J K M 8 8 N S SOLDERING FOOTPRINT* SCALE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 4

15 PACKAGE DIMENSIONS T SEATING PLANE G A B 4X.58 P 7 PL SOIC 4 CASE 75A 3 ISSUE J.25 (.) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION.5 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.5) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES C R X 45 F DIM MIN MAX MIN MAX A B C D D 4 PL K M J F G.27 BSC.5 BSC.25 (.) M T B S A S J K M 7 7 P SOLDERING FOOTPRINT* R X 7.4 4X PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NC4279A/D