SRAM AS5C512K8. 512K x 8 SRAM HIGH SPEED SRAM with REVOLUTIONARY PINOUT. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS FEATURES

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1 512K x 8 SRAM HIGH SPEED SRAM with REVOLUTIONARY PINOUT AVAILABLE AS MILITARY SPECIFICATIONS SMD SMD MIL-STD-883 FEATURES Ultra High Speed Asynchronous Operation Fully Static, No Clocks Multiple center power and ground pins for improved noise immunity Easy memory expansion with CE\ and OE\ options All inputs and outputs are TTL-compatible Single +5V Power Supply +/- 10% Data Retention Functionality Testing Cost Efficient Plastic Packaging Extended Testing Over -55ºC to +125ºC for plastics Plastic 36 pin PSOJ is fully compatible with the Ceramic 36 pin SOJ and offered in lead free finish TSOPII in Copper Lead Frame for Superior Thermal Performance 2 RoHS Compliant Options Available OPTIONS MARKING Timing 12ns access ns access ns access ns access ns access ns access ns access -45 Operating Temperature Ranges Full Military (-55 o C to +125 o C) /883C Military (-55 o C to +125 o C) XT Industrial (-40 o C to +85 o C) IT Package(s) Ceramic LCC EC Ceramic Flatpack F Plastic SOJ (Lead Free) 1 DJ Ceramic SOJ (attached formed lead) ECJ Ceramic SOJ SOJ Plastic TSOPII (44pin, 400mil) DGC 2 Plastic TSOPII (RoHS Compliant) DGCR 2 2V data retention/low power 3 L Notes: 1. Pb finish also available, contact factory 2. Contact factory for Copper Lead Frame Products 3. Not available for parts in DGC & DGCR packages. 1 A0 A1 A2 A3 A4 CE I/O0 I/O1 VCC GND I/O2 I/O3 WE A5 A6 A7 A8 A9 PIN ASSIGNMENT (Top View) SRAM 36-Pin SOJ (DJ, ECJ & SOJ) 36-Pin CLCC (EC) 44-Pin TSOPII (DGC & DGCR) Pin Flat Pack (F) A18 A17 A16 A15 OE I/O7 I/O6 GND VCC I/O5 I/O4 A14 A13 A12 A11 A10

2 GENERAL DESCRIPTION The is a high speed SRAM. It offers flexibility in high-speed memory applications, with chip enable (CE\) and output enable (OE\) capabilities. These features can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ and OE\ go LOW. As a option, the device can be supplied offering a reduced power FUTIONAL BLOCK DIAGRAM SRAM standby mode, allowing system designers to meet low standby power requirements. This device operates from a single +5V power supply and all inputs and outputs are fully TTL-compatible. The DJ offers the convenience and reliability of the SRAM and has the cost advantage of a durable plastic. The DJ is footprint compatible with 36 pin CSOJ package of the SMD TSOPII with copper lead frame offers superior thermal performance. VCC GND A0-A18 INPUT BUFFER ROW DECODER 4,194,304-BIT MEMORY ARRAY 1024 ROWS X 4096 COLUMNS I/O CONTROLS DQ8 DQ1 CE\ COLUMN DECODER OE\ WE\ *POWER DOWN *On the low voltage Data Retention option. PIN FUTIONS TRUTH TABLE MODE OE\ CE\ WE\ I/O POWER STANDBY X H X HIGH-Z STANDBY READ L L H Q ACTIVE NOT SELECTED H L H HIGH-Z ACTIVE WRITE X L L D ACTIVE X = Don t Care A0 - A18 WE\ CE\ OE\ Address Input s Write Enable Chip Enable Output Enable I/O - I/ O Data Inputs/Output s 0 7 V CC V SS Power Ground No Connection 2

3 ABSOLUTE MAXIMUM RATINGS* Voltage on Vcc Supply Relative to Vss Vcc...-.5V to +7.0V Storage Temperature (Plastic) C to +150 C Storage Temperature (Ceramic) C to +125 C Short Circuit Output Current (per I/O)...20mA Voltage on any Pin Relative to Vss...-.5V to Vcc+1V Maximum Junction Temperature** C Power Dissipation...1W *Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow, and humidity. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55 o C < T A < +125 o C & -40 o C < T A < +85 o C ; Vcc = 5V +10%) MAX DESCRIPTION CONDITIONS SYM UNITS NOTES WE\=CE\<V IL ; Vcc = MAX Power Supply Current: Operating f = MAX = 1/t RC Outputs Open I CCSP ma 3 "L" Version Only I CCLP ma CE\ > V IH, All other inputs < V IL, Vcc = MAX, f = 0, Outputs Open I SBTSP ma Power Supply Current: Standby "L" Version Only I SBTLP ma CE\ > Vcc -0.2V; Vcc = MAX V IN <Vss +0.2V or I SBCSP ma V IN >Vcc -0.2V; f = 0 "L" Version Only I SBCLP ma DESCRIPTION CONDITIONS SYM MIN MAX UNITS NOTES Input High (Logic 1) Voltage V IH 2.2 Vcc +0.5 V 1 Input Low (Logic 0) Voltage V IL V 1, 2 Input Leakage Current 0V < V IN < Vcc I LI -2 2 μa Output(s) Disabled Output Leakage Current -2 2 μa 0V < V OUT < Vcc I LO Output High Voltage I OH = -4.0 ma V OH V 1 Output Low Voltage I OL = 8 ma V OL V 1 Supply Voltage V CC V 1 CAPACITAE PARAMETER CONDITIONS SYMBOL MAX UNITS NOTES Input Capacitance T A = 25 o C, f = 1MHz C I 8 pf 4 Output Capactiance V IN = 0 Co 10 pf 4 3

4 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (-55 o C < T A < +125 o C or -40 o C to +85 o C; Vcc = 5V +10%) DESCRIPTION SYM MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES READ CYCLE Read Cycle Time t RC ns Address Access Time t AA ns Chip Enable Access Time t ACE ns Output Hold From Address Change t OH ns Chip Enable to Output in Low-Z t LZCE ns 4, 6, 7 Chip Disable to Output in High-Z t HZCE ns 4, 6, 7 Output Enable Acess Time t AOE ns Output Enable to Output in Low-Z t LZOE ns 4, 6, 7 Output Disable to Output in High-Z t HZOE ns 4, 6, 7 WRITE CYCLE WRITE Cycle Time t WC ns Chip Enable to End of Write t CW ns Address Valid to End of Write t AW ns Address Setup Time t AS ns Address Hold From End of Write t AH ns WRITE Pulse Width t WP ns Data Setup Time t DS ns Data Hold Time t DH ns Write Disable to Output in Low-Z t LZWE ns 4, 6, 7 Write Enable to Output in High-Z t HZWE ns 4, 6, 7 4

5 AC TEST CONDITIONS Input pulse levels... Vss to 3.0V Input rise and fall times... 3ns Input timing reference levels V Output reference levels V Output load... See Figures 1 Q 167 ohms 1.73V Q 167 ohms 1.73V C=30pF C=5pF Fig. 1 Output Load Equivalent Fig. 2 Output Load Equivalent and 2 NOTES 1. All voltages referenced to V SS (GND) V for pulse width < 20ns 3. I CC is dependent on output loading and cycle rates. 4. This parameter is guaranteed but not tested. 5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. t LZCE, t LZWE, t LZOE, t HZCE, t HZOE and t HZWE are specified with CL = 5pF as in Fig. 2. Transition is measured ±200mV from steady state voltage. 7. At any given temperature and voltage condition, t HZCE is less than t LZCE, and t HZWE is less than t LZWE. 8. WE\ is HIGH for READ cycle. 9. Device is continuously selected. Chip enables and output enables are held in their active state. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. t RC = Read Cycle Time. 12. Chip enable and write enable can initiate and terminate a WRITE cycle. 13. Output enable (OE\) is inactive (HIGH). 14. Output enable (OE\) is active (LOW). 15. ASI does not warrant functionality nor reliability of any product in which the junction temperature exceeds 150 C. Care should be taken to limit power to acceptable levels. DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only) DESCRIPTION CONDITIONS SYM MIN MAX UNITS NOTES Vcc for Retention Data CE\ > V CC -0.2V V IN > V CC -0.2 or 0.2V V DR 2 V Data Retention Current Vcc = 2.0V I CCDR 2 ma Chip Deselect to Data t CDR 0 ns 4 Operation Recovery Time t R 10 ms 4, 11 5

6 LOW V CC DATA RETENTION WAVEFORM DATA RETENTION MODE V CC 4.5V 4.5V V DR >2V t CDR t R V IH - CE\ V IL - V DR READ CYCLE NO. 1 8, 9 (Address Controlled, CE\ = OE\ = V IL, WE\ = V IH ) ADDRESS t RC VALID t OH t AA I/O, DATA IN & OUT Previous Data Valid Data Valid READ CYCLE NO. 2 2 (WE\ = V IH ) ADDRESS t RC t AOE t LZOE t HZOE CE\ t LZCE t ACE t HZCE I/O, DATA IN & OUT High-Z t PU Data Valid t PD Icc Don t Care Undefined 6

7 WRITE CYCLE NO (CE Controlled) ADDRESS CE\ t AS t WC t AW t CW t AH WE\ t WP1 t DS t DH I/O, DATA IN Data Valid I/O, DATA OUT High-Z High-Z 12, 13 WRITE CYCLE NO. 2 (Write Enabled Controlled) ADDRESS t WC t AW CE\ t CW t AH t AS WE\ t WP1 t DH I/O, DATA IN Data Valid I/O, DATA OUT High-Z High-Z 7

8 7,12, 14 WRITE CYCLE NO. 3 (WE Controlled) ADDRESS t WC CE\ t AW t CW t AH WE\ t AS t WP2 t DS t DH DATA IN Data Valid DATA OUT Data Undefined t HZWE High-Z t LZWE 8

9 MECHANICAL DEFINITIONS 44-Pin TSOPII (Package Designators DGC & DGCR) SRAM N N/2+1 E1 E Notes: 1. Controlling dimension: millimieters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within inches at the seating plane. 1 N/2 D. ZD A SEATING PLANE e b A1 L α C N=44 Leads Symbol Millimeters Inches Ref. Std. Min Max Min Max A A b C D E E e 0.80 BSC BSC L ZD 0.81 REF REF α 0 o 5 o 0 o 5 o 9

10 MECHANICAL DEFINITIONS* Micross Case #210 (Package Designator EC) SMD , Case Outline N P Pin 1 identifier area A R L2 1 D 36 L e B D1 E A1 SMD SPECIFICATIONS SYMBOL MIN MAX A A B D D E e L BSC TYP L P R TYP *All measurements are in inches. 10

11 MECHANICAL DEFINITIONS* Micross Case #307 (Package Designator F) SMD , Case Outline T L E Pin 1 identifier area 36 1 e b D D1 Bottom View S Top View c A E2 Q SMD SPECIFICATIONS SYMBOL MIN MAX A b c D D E E e BSC L Q *All measurements are in inches. 11

12 MECHANICAL DEFINITIONS* Micross Case Package Designator: SOJ SMD , Case Outline M 12

13 MECHANICAL DEFINITIONS* Micross Case #503 (Package Designator ECJ) SMD , Case Outline M P A L2 L TYP 1 36 e D1 D A2 b E2 A1 E SMD SPECIFICATIONS SYMBOL MIN MAX A A A b D D E E e BSC L L P *All measurements are in inches. 13

14 MECHANICAL DEFINITIONS* Micross Case #903 (Package Designator DJ) *All measurements are in inches. 14

15 ORDERING INFORMATION 36-Pin Ceramic Flat Pack 36-Pin Ceramic SOJ Package EXAMPLE: F-25/XT EXAMPLE: ECJ-15/IT Device Number Package Speed Package Speed Options** Process Device Number Type ns Type ns Options** Process F -12 L /* SOJ [ECJ] -12 L /* F -15 L /* SOJ [ECJ] -15 L /* F -17 L /* SOJ [ECJ] -17 L /* F -20 L /* SOJ [ECJ] -20 L /* F -25 L /* SOJ [ECJ] -25 L /* F -30 L /* SOJ [ECJ] -30 L /* F -45 L /* SOJ [ECJ] -45 L /* *Consult Factory for ECJ package option, SOJ is new standard. 36-Pin CLCC 36-Pin Plastic SOJ EXAMPLE: EC-35/XT EXAMPLE: DJ-20/XT Device Number Package Speed Package Speed Options** Process Device Number Type ns Type ns Options** Process EC -12 L /* DJ L /* EC -15 L /* DJ L /* EC -17 L /* DJ L /* EC -20 L /* DJ L /* EC -25 L /* DJ L /* EC -30 L /* DJ L /* EC -45 L /* DJ L /* +Lead Free (Pb finish is also available, consult factory) 44-Pin TSOPII - Sn/Pb Lead Finish 44-Pin TSOPII - RoHS Compliant - NiPdAu Lead Finish EXAMPLE: DGC-12/XT EXAMPLE: DGCR-12/IT Device Number Package Speed Package Speed Process Device Number Type ns Type ns Process DGC -12 /* DGCR -12 /* DGC -15 /* DGCR -15 /* *AVAILABLE PROCESSES IT = Industrial Temperature Range XT = Extended Temperature Range 883C = Full Military Processing -40 o C to +85 o C -55 o C to +125 o C -55 o C to +125 o C **OPTIONS DEFINTIONS L = 2V Data Retention / Low Power (Consult Factory) ** L Version is not currently an available option for parts in DGC & DGCR package. 15

16 MICROSS TO DSCC PART NUMBER CROSS REFEREE FOR SMD * Micross Package Designator EC SRAM Micross Package Designator ECJ Micross Part # SMD Part # Micross Part # SMD Part # EC-12L QNA ECJ-12L QMA EC-12L QNA ECJ-12L QMA EC QNA ECJ QMA EC-15L QNA ECJ-15L QMA EC-20L QNA ECJ-20L QMA EC-25L QNA ECJ-25L QMA EC-35L QNA ECJ-35L QMA EC-45L QNA ECJ-45L QMA EC MNA ECJ MMA EC-20L MNA ECJ-20L MMA EC MNA ECJ MMA EC-25L MNA ECJ-25L MMA EC MNA ECJ MMA EC-35L MNA ECJ-35L MMA EC MNA ECJ MMA EC-45L MNA ECJ-45L MMA Micross Package Designator F Micross Part # SMD Part # F-12L QTA F-12L QTA F QTA F-15L QTA F-20L QTA F-25L QTA F-35L QTA F-45L QTA F MTA F-20L MTA F MTA F-25L MTA F MTA F-35L MTA F MTA F-45L MTA * Micross part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. 16

17 MICROSS TO DSCC PART NUMBER CROSS REFEREE FOR SMD * Micross Package Designator EC Micross Package Designator ECJ Micross Part # SMD Part # Micross Part # SMD Part # EC-12/H HNA ECJ-12/H HZA EC-12L/H HNA ECJ-12L/H HZA EC-15/H HNA ECJ-15/H HZA EC-17/H HNA ECJ-17/H HZA EC-17L/H HNA ECJ-17L/H HZA EC-20/H HNA ECJ-20/H HZA EC-20L/H HNA ECJ-20L/H HZA EC-25/H HNA ECJ-25/H HZA EC-25/H HNA ECJ-25/H HZA EC-25L/H HNA ECJ-25L/H HZA EC-25L/H HNA ECJ-25L/H HZA EC-35/H HNA ECJ-35/H HZA EC-35/H HNA ECJ-35/H HZA EC-35L/H HNA ECJ-35L/H HZA EC-35L/H HNA ECJ-35L/H HZA EC-45/H HNA ECJ-45/H HZA EC-45/H HNA ECJ-45/H HZA EC-45L/H HNA ECJ-45L/H HZA EC-45L/H HNA ECJ-45L/H HZA EC-55/H HNA ECJ-55/H HZA EC-55L/H HNA ECJ-55L/H HZA EC-12/H H ECJ-12/H HZC EC-12L/H H ECJ-12L/H HZC EC-15/H H ECJ-15/H HZC EC-17/H H ECJ-17/H HZC EC-17L/H H ECJ-17L/H HZC EC-20/H H ECJ-20/H HZC EC-20L/H H ECJ-20L/H HZC EC-25/H H ECJ-25/H HZC EC-25/H H ECJ-25/H HZC EC-25L/H H ECJ-25L/H HZC EC-25L/H H ECJ-25L/H HZC EC-35/H H ECJ-35/H HZC EC-35/H H ECJ-35/H HZC EC-35L/H H ECJ-35L/H HZC EC-35L/H H ECJ-35L/H HZC EC-45/H H ECJ-45/H HZC EC-45/H H ECJ-45/H HZC EC-45L/H H ECJ-45L/H HZC EC-45L/H H ECJ-45L/H HZC EC-55/H H ECJ-55/H HZC EC-55L/H H ECJ-55L/H HZC * Micross part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. 17

18 MICROSS TO DSCC PART NUMBER CROSS REFEREE FOR SMD * Micross Package Designator F Micross Part # SMD Part # F-12/H HUA F-12L/H HUA F-15/H HUA F-17/H HUA F-17L/H HUA F-20/H HUA F-20L/H HUA F-25/H HUA F-25/H HUA F-25L/H HUA F-25L/H HUA F-35/H HUA F-35/H HUA F-35L/H HUA F-35L/H HUA F-45/H HUA F-45/H HUA F-55/H HUA F-55L/H HUA F-45L/H HUA F-45L/H HUA F-12/H F-12L/H F-15/H F-17/H F-17L/H F-20/H F-20L/H F-25/H F-25/H F-25L/H F-25L/H F-35/H F-35/H F-35L/H F-35L/H F-45/H F-45/H F-55/H F-55L/H F-45L/H F-45L/H HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC HUC * Micross part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. 18

19 DOCUMENT TITLE 512K x 8 SRAM HIGH SPEED SRAM with REVOLUTIONARY PINOUT REVISION HISTORY Rev # History Release Date Status 7.1 Updated 36 lead SOJ Drawing September 2008 Release 7.2 Added Micross Information January 2010 Release 7.3 Expanded package offering to include March 2011 Release Copper Lead Frames and RoHS compliancy, pages 1&14, changed elect. char. limits: From: To: I CCSP 225mA for all speeds 100mA for -12,-15 & mA for -20 & mA for mA for -45 I CCLP 180mA for all speeds 75mA for -12,-15 & mA for -20 & mA for mA for -45 I SBTSP 60mA for all speeds 20mA for all speeds I SBTLP 30mA for all speeds 10mA for all speeds I SBCSP 25mA for all speeds 15mA for all speeds I SBCLP 10mA for all speeds 5mA for all speeds I LI ±10µA ±2µA C I 12pF 8pF C O 14pF 10pF t AH 1ns for all speeds 0ns for all speeds t HZWE 25ns -35 & 30ns ns -35 & 20ns Updated Data Retention Electrical August 2012 Release Characteristics (L Version Only) I CCDR max. from 800 ua to 4.5 ma 7.5 Updated Data Retention Electrical January 2013 Release Characteristics (L Version Only) I CCDR max. from 4.5mA to 2mA 19

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