Low-Cost, Low-Voltage, Quad, SPST, CMOS Analog Switches

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1 ; Rev 1; 3/96 ow-ost, ow-voltage, Quad, SPST, General escription The 4066/4066 quad, SPST, MOS analog switches are designed to provide superior performance over the industry-standard devices. These new switches feature guaranteed operation from +2.0V to +16V and are fully specified at 3V, 5V, and 12V. oth parts offer 45Ω on-resistance and 2Ω channel-to-channel matching at 12V, plus 4Ω flatness over the specified signal range. ach device is controlled by TT/MOS input levels and can be used as a bilateral switch or multiplexer/ demultiplexer. ow off leakage current (0p for the 4066) and low power consumption (0.5µW) make the 4066/ 4066 ideal for battery-operated equipment. These parts are also suitable for low-distortion audio applications. oth devices are available in 14-pin IP and SO packages, as well as a 16-pin QSOP. S protection is greater than 2000V per Method pplications attery-operated quipment udio and Video Signal Routing ow-voltage ata-cquisition Systems Sample-and-Hold ircuits ommunication ircuits Features Pin ompatible with 74H4066 Guaranteed On-Resistance: 170Ω max (3V supply) 45Ω max (12V supply) Guaranteed Match etween hannels: 4Ω max (4066) 2Ω max (4066) Guaranteed ow eakage urrents: 1n at +25 (4066) 0p at +25 (4066) Single-Supply Operation from +2.0V to +16V to GN Signal Handling TT/MOS-ogic ompatible ow Power onsumption: 0.5µW ow rosstalk: -86d ow Off Isolation: -58d ow istortion: 0.03% Wide andwidth: > 0MHz Ordering Information PRT TMP. RNG PIN-PKG 4066P 4066S to to to Plastic IP 14 Narrow SO 16 QSOP 4066/ 0 to +70 ice* Ordering Information continued at end of data sheet. * ontact factory for dice specifications. Pin onfigurations/truth Table 4066/4066 TOP VIW NO1 OM1 NO2 OM2 IN IN1 IN4 NO4 OM4 ON/OFF ONTRO INPUT H TRUTH T STT OF NOG SWITH OFF ON NO1 OM1 N.. NO2 OM IN1 IN4 NO4 OM4 IN3 6 9 OM3 IN N.. GN 7 8 NO3 IN3 7 OM3 IP/SO N.. = NO INTRN ONNTION GN 8 QSOP 9 NO3 Maxim Integrated Products 1 For free samples & the latest literature: or phone

2 4066/4066 SOUT IMUM RTINGS (Voltages referenced to GN) V to +17V V IN_, V OM_, V NO (Note 1) V to (V V) urrent (any terminal)...30m Peak urrent (any terminal)...0m S per Method >2000V ontinuous Power issipation (T = +70 ) Plastic IP (derate.00mw/ above +70 )...800mW Narrow SO (derate 8.00mW/ above +70 )...640mW QSOP (derate 9.52mW/ above +70 )...762mW Stresses beyond those listed under bsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. xposure to absolute maximum rating conditions for extended periods may affect device reliability. TRI HRTRISTIS Single +12V Supply ( = 12V ±%, GN = 0V, V INH = 4.0V, V IN = 0.8V, T = T to T, unless otherwise noted.) On-Resistance Flatness (Note 5) R FT(ON) = 12V, I OM = 2m, V NO = V, 5V, 1V RIP (derate 9.09mW/ above +70 )...727mW Operating Temperature Ranges 4066 / to / to MJ/4066MJ to +125 Storage Temperature Range to +150 ead Temperature (soldering, sec) Note 1: Signals on NO_, OM_, or IN_ exceeding or GN are clamped by internal diodes. imit forward-diode current to maximum current rating. PRMTR SYMO ONITIONS TYP (Note 2) UNITS NOG SWITH nalog Signal Range V OM, V NO (Note 3) 0 V = 12V, On-Resistance R ON I OM = 2m, T = T, 55 Ω V NO = V to T M 75 = 12V, On-Resistance Match R ON I OM = 2m, etween hannels (Note 4) V NO = V T = T to T 6 Ω T = T to T = 12V, NO or N Off eakage I NO(OFF) V OM = 0V, urrent (Note 6) V NO = V T = T, -6 6 to T M = 12V, OM Off eakage urrent I OM(OFF) V OM = 0V, (Note 6) V NO = V T = T, -6 6 to T M = 12V, OM On eakage urrent I OM(ON) V OM = V, (Note 6) V NO = V T = T, to T M Ω n n n 2

3 TRI HRTRISTIS Single +12V Supply (continued) ( = 12V ±%, GN = 0V, V INH = 4.0V, V IN = 0.8V, T = T to T, unless otherwise noted.) PRMTR OGI INPUT Input urrent with Input Voltage High Input urrent with Input Voltage ow YNMI SYMO ONITIONS TYP (Note 2) UNITS I INH IN = 5.0V, all others = 0.8V µ I IN IN = 0.8V, all others = 5.0V µ 25 0 Turn-On Time t ON V OM = V, Figure 2 T = T to T Turn-Off Time t OFF V OM = V, Figure 2 T = T to T 0 Signal = 0dbm, Figure 4, On-hannel andwidth W T 0 MHz 50Ω in and out = +25 harge Injection (Note 3) V = 1.0nF, V GN = 0V, T T 1 p R GN = 0Ω, Figure 3 = +25 R = 50Ω, = 5pF, Off Isolation (Note 7) V ISO -58 d f = 1MHz, Figure 4 rosstalk (Note 8) V T R = 50Ω, = 5pF, f = 1MHz, Figure 5-86 d NO apacitance (OFF) f = 1MHz, Figure 6 9 pf OM Off apacitance OM(OFF) f = 1MHz, Figure 6 9 pf OM On apacitance OM(ON) f = 1MHz, Figure 6 22 pf SUPPY Power-Supply Range V Supply urrent I+ V IN = 0V or, all channels on or off T = T to T µ Total Harmonic istortion TH T = T to T 0.03 % ns ns 4066/4066 3

4 4066/4066 TRI HRTRISTIS Single +5V Supply ( = 5V ±%, V- = 0V ±%, GN = 0V, V INH = 2.4V, V IN = 0.8V, T = T to T, unless otherwise noted.) PRMTR NOG SWITH nalog Signal Range SYMO ONITIONS TYP (Note 2) V OM, (Note 3) 0 V V NO = 4.5V, On-Resistance R ON I OM = -1.0m, T = T, 52 0 V NO = 3.5V to T M 125 = 5V, On-Resistance Match R ON I OM = -1.0m, etween hannels (Note 4) V NO = 3V T = T to T 12 = 5V, On-Resistance Flatness 4 6 R (Notes 3, 5) FT(ON) I OM = -1.0m, V NO = 1V, 3V T = T to T = 5.5V, NO Off eakage I urrent (Note 6) NO(OFF) V OM = 0V, V NO = 4.5V T = T, -6 6 to T M = 5.5V, OM Off eakage urrent I (Note 6) OM(OFF) V OM = 0V, V NO = 4.5V T = T, -6 6 to T M = 5.5V, OM On eakage urrent I (Note 6) OM(ON) V OM = 5V, V NO = 4.5V T = T, to T M YNMI Turn-On Time t ON V NO = 3V T = T to T 175 Turn-Off Time t OFF V NO = 3V T = T to T 125 On-hannel andwidth harge Injection (Note 3) SUPPY UNITS Signal = 0dm, W 0 MHz 50Ω in and out, Figure 4 V Q GN = 0V, R GN = 0V, T 2 p = 1.0nF, Figure 3 = +25 Positive Supply urrent I+ = 5.5V, V IN = 0V or, all channels on or off -1 1 µ Ω Ω Ω n n n ns ns 4

5 TRI HRTRISTIS Single +3V Supply ( = 2.7V to 3.3V ±%, GN = 0V, V INH = 2.4V, V IN = 0.8V, T = T to T, unless otherwise noted.) PRMTR SYMO ONITIONS TYP (Note 2) UNITS NOG SWITH nalog Signal Range V OM, V NO (Note 3) 0 V = 3V, hannel On-Resistance R ON I OM = -1.0m, 170 Ω V NO = 1.5V T = T to T 225 YNMI Turn-On Time (Note 3) t ON = 3V, V NO or V N = 1.5V T = T to T 230 ns Turn-Off Time (Note 3) t OFF = 3V, V NO or V N = 1.5V T = T to T 200 ns harge Injection (Note 3) Q = 1.0nF, V GN = 0V, R GN = 0V 2 p SUPPY Positive Supply urrent I+ = 3.6V, V IN = 0V or, all channels on or off µ 4066/4066 Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note 4: R ON = R ON (max) - R ON (min). Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. Note 6: eakage parameters are 0% tested at maximum-rated hot temperature and guaranteed by correlation at +25. Note 7: Off Isolation = 20log (V OM / V NO), V OM = output, V NO = input to off switch. Note 8: etween any two switches. 5

6 4066/4066 Typical Operating haracteristics (, unless otherwise noted.) RON (Ω) ON-RSISTN vs. V OM V OM (V) : = 2.5V : = 3.0V : = 5V : = V : = 15V V- = 0V RON (Ω) ON-RSISTN vs. V OM N TMPRTUR : T = -55 : : T = +85 : T = +125 = 5V V OM (V) OFF KG (n) = 5.5V V OM = 0V V NO = 4.5V OFF KG URRNT vs. TMPRTUR TMPRTUR ( ) ON KG (n) ON KG URRNT vs. TMPRTUR VT (p) : = 12V : = 5V : = 3V HRG INJTION vs. V OM I+ (µ) = 5.5V SUPPY URRNT vs. TMPRTUR I TMPRTUR ( ) V OM (V) TMPRTUR ( ) OSS (d) FRQUNY RSPONS ON RSPONS OFF ISOTION ON PHS PHS (degrees) TH (%) 0 1 TOT HRMONI ISTORTION vs. FRQUNY = 12V 5Vp-p SIGN 600Ω IN N OUT = 5V INPUT = 0dm 50Ω IN N OUT FRQUNY (MHz) k k 20k FRQUNY (Hz) 6

7 Pin escription IP/SO 1, 3, 8, 11 2, 4, 9, 13, 5, 6, PIN QSOP 1, 4, 9, 13 2, 5,, 12 3, 11 15, 6, 7, NM NO1NO4 OM1OM4 N.. IN1IN4 GN Not internally connected ogic ontrol Inputs Ground Positive Supply Voltage pplications Information Overvoltage Protection Proper power-supply sequencing is recommended for all MOS devices. o not exceed the absolute maximum ratings, because stresses beyond the listed ratings may cause permanent damage to the devices. lways sequence on first, followed by the logic inputs. If power-supply sequencing is not possible, add two small signal diodes in series with supply pins for overvoltage protection (Figure 1). dding diodes reduces the analog signal range to 1V below and 1V above GN, but low switch resistance and low leakage characteristics are unaffected. evice operation is unchanged, and the difference between and GN should not exceed 17V. FUNTION nalog Switch Normally Open Terminal (bidirectional) nalog Switch ommon Terminal (bidirectional) V g NO POSITIV SUPPY OM /4066 Figure 1. Overvoltage Protection Using Two xternal locking iodes 7

8 4066/4066 Test ircuits/timing iagrams SWITH V OM INPUT OGI INPUT OM IN GN 0V NO R 300Ω INUS FIXTUR N STRY PITN. V OUT = V OM ( R ) R + R ON SWITH OUTPUT 35pF V OUT OGI INPUT SWITH OUTPUT V INH 0V 0V 50% V OUT t ON t OFF t R < 20ns t F < 20ns 0.9 x V 0UT 0.9 x V OUT Figure 2. Switching Time V OUT R GN OM NO V OUT V OUT V GN GN IN IN OFF ON Q = ( V OUT )( ) OFF V IN Figure 3. harge Injection 8

9 Test ircuits (continued) SIGN GNRTOR 0dm NYZR R OM nf NO OM GN IN V IN OR V INH SIGN GNRTOR 0dm NYZR V IN OR V INH R nf N02 OM1 IN1 GN N01 IN2 OM Ω V IN OR V INH 4066/4066 Figure 4. Off Isolation/On-hannel andwidth Figure 5. rosstalk nf OM PITN MTR f = 1MHz NO GN IN V IN OR V INH Figure 6. hannel Off/On apacitance 9

10 4066/4066 _Ordering Information (continued) PRT TMP. RNG PIN-PKG 4066P 4066S 4066MJ -40 to to to Plastic IP 14 Narrow SO 14 RIP** 4066P 0 to Plastic IP 4066S 0 to Narrow SO to QSOP 4066/ 0 to +70 ice* 4066P -40 to Plastic IP 4066S -40 to Narrow SO to QSOP 4066MJ -55 to RIP** * ontact factory for dice specifications. ** ontact factory for availability. OM1 hip Topography NO2 OM2 NO1 IN1 IN4 NO4 OM4 0.8" (2.74mm) IN2 OM3 IN3 GN NO " (1.65mm) TRNSISTOR OUNT: 69 SUSTRT ONNT TO

11 4066/4066 ow-ost, ow-voltage, Quad, SPST, 11 Package Information IM e e e INHS MIIMTRS Plastic IP PSTI U-IN-IN PKG (0.300 in.) IM PKG. P P P P P N INHS MIIMTRS PINS e e e IM 1 e H INHS MIIMTRS Narrow SO SM-OUTIN PKG (0.150 in.) IM INHS MIIMTRS PINS H e 1 0.1mm 0.004in.

12 4066/4066 Package Information (continued) e N S 1 H 2 IM 1 2 e H h N S α INHS MIIMTRS S VRITIONS S S S VRITIONS S VRITIONS h x 45 α IM S S S S PINS INHS QSOP QURTR SM-OUTIN PKG MIIMTRS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 Maxim Integrated Products, 120 San Gabriel rive, Sunnyvale, (408) Maxim Integrated Products Printed US is a registered trademark of Maxim Integrated Products.

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