35Ω, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

Transcription

1 ; Rev 3; 2/3 35, Low-Voltage, SPST/SPDT General Description The low on-resistance (R ON ), low-voltage analog switches operate from a single +2.V to +5.5V supply. The / are single-pole/single-throw (SPST) analog switches, and the is a single-pole/double-throw (SPDT) analog switch. The is a normally open () switch, and the is a normally closed () switch. When powered from a 2.7V supply, these devices feature 35 (max) R ON, with 2 (max) R ON matching and 13 (max) flatness. The offer fast switching speeds (t ON = 8 max, t = 25 max). The offers a break-before-make function. The digital logic inputs are 1.8V logic compatible from a +2.7V to +3.3V supply and are TTL/CMOS compatible from a +4.5V to +5.5V supply. The // are packaged in the chip-scale package (UCSP ), significantly reducing the required PC board area. The device occupies only a 1.5mm 1.2mm area. The 3 2 array of solder bumps are spaced with a.5mm bump pitch. Applicatio MP3 Players Battery-Operated Equipment Relay Replacement Audio and Video Signal Routing Communicatio Circuits PCMCIA Cards Cellular Phones Hard Drives Modems 6-Bump,.5mm Pitch, UCSP R ON 35 max (+3V Supply) 2 max (+5V Supply) 2 max R ON Match Between Channels 13 max R ON Flatness Over Signal Range Low Leakage Currents Over Temperature 1 (max) at T A = +25 C Fast Switching: t ON = 8, t = 25 Guaranteed Break-Before-Make () +2.V to +5.5V Single-Supply Operation Rail-to-Rail Signal Handling Low Crosstalk: -75dB (1kHz) High Off-Isolation: -75dB (1kHz) 1.8V CMOS Logic Compatible -3dB Bandwidth: >2MHz Features Ordering Information PART TEMP P/BUMP- TOP RANGE PACKAGE MARK EBT-T -4 C to +85 C 6 UCSP AAL EBT-T -4 C to +85 C 6 UCSP AAM EBT-T -4 C to +85 C 6 UCSP AAN Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. UCSP is a trademark of Maxim Integrated Products, Inc. Pin Configuratio/Functional Diagrams/Truth Table TOP VIEW B1 A1 B1 A1 B1 A1 B2 A2 B2 A2 B2 A2 ON B3 A3 B3 A3 B3 A3 1 ON SWITCHES SHOWN FOR LOGIC "" Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATGS All Voltages Referenced to,...-.3v to +6V,, (Note 1)...-.3V to ( +.3V) Continuous Current,,...±2mA Peak Current,, (pulsed at 1ms, 1% duty cycle)...±4ma Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Single +3V Supply Continuous Power Dissipation (T A = +7 C) 3 2 UCSP (derate 1.1mW/ C at +7 C)...88mW Operating Temperature Range...-4 C to +85 C Storage Temperature Range C to +15 C Bump Temperature (soldering) Infrared (15s) C Vapor Phase (6s) C Note 1: Signals on,, and exceeding are clamped by an internal diode. Limit forward-diode current to maximum current rating. ( = +2.7V to +3.3V, V IH = +1.4V, V IL =.5V, T A = T M to T MAX, unless otherwise noted. Typical values are at +3V and T A = +25 C.) (Notes 2, 8) PARAMETER SYMBOL CONDITIONS T A M TYP MAX U N I T S ANALOG SWITCH Analog Signal Range V, V, V T M to T MAX V On-Resistance R ON V or V = 1.5V = +2.7V, I = 1mA, On-Resistance Match Between Channels ( only) (Note 4) On-Resistance Flatness (Note 5), Off-Leakage Current (Note 3) Off-Leakage Current (Note 3) (, only) On-Leakage Current (Note 3) DYNAMIC CHARACTERISTICS R ON R FLAT(ON) I (), I () I _() I _(ON) +25 C 3 35 T M to T MAX 4 = +2.7V, I = 1mA, +25 C 1 2 V or V = 1.5V T M to T MAX 3 = +2.7V, I = 1mA, +25 C 1 13 V or V = 1V, 1.5V, 2V T M to T MAX 15 = +3.6V; V =.3V, +25 C -.5 ± V; V or V = 3.3V,.3V T M to T MAX -1 1 = +3.6V; V =.3V, +25 C -.5 ± V; V or V =.3V, 3.3V T M to T MAX -1 1 = +3.6V; V =.3V, +25 C -.5 ± V; V or V =.3V, 3.3V, or floating T M to T MAX -2 2 Turn-On Time (Note 3) t ON R L = 3, C L = 35pF, = +2.7V; V, V = 1.5V, +25 C 5 8 Figure 1 T M to T MAX 11 2

3 ELECTRICAL CHARACTERISTICS Single +3V Supply (continued) ( = +2.7V to +3.3V, V IH = +1.4V, V IL =.5V, T A = T M to T MAX, unless otherwise noted. Typical values are at +3V and T A = +25 C.) (Notes 2, 8) PARAMETER SYMBOL CONDITIONS T A M TYP MAX UNITS Turn-Off Time (Note 3) t R L = 3, C L = 35pF, = +2.7V; V, V = 1.5V, Figure 1 Break-Before-Make Time ( only) (Note 3) Charge Injection On-Channel -3dB Bandwidth t BBM Q BW +25 C 2 25 T M to T MAX 4 = +3.3V; V, V = 1.5V, +25 C 15 Figure 2 T M to T MAX 2 V GEN =, R GEN =, C L = 1.nF, Figure 3 Signal = dbm, 5 in and out, Figure 4 Off-Isolation (Note 6) V ISO C L = 5pF, Figure 4 f = 1kHz, R L = 5, Crosstalk ( only) (Note 7) Total Harmonic Distortion, Off-Capacitance V CT f = 1kHz, R L = 5, C L = 5pF, Figure 4 THD f = 2Hz to 2kHz, 2Vp-p, R L = C 8 pc +25 C 2 MHz +25 C -75 db +25 C -75 db +25 C.14 % C (), C () f = 1MHz, Figure C 15 pf Off-Capacitance C () f = 1MHz, Figure C 15 pf Switch On-Capacitance C (ON) f = 1MHz, Figure C 3 pf DIGITAL I/O Input Logic High V IH T M to T MAX 1.4 V Input Logic Low V IL T M to T MAX.5 V Input Leakage Current I V = or T M to T MAX -1 1 µa POWER SUPPLY Power-Supply Range T M to T MAX V Supply Current I+ = +3.3V, V = or T M to T MAX 1 µa ELECTRICAL CHARACTERISTICS Single +5V Supply ( = +4.5V to +5.5V, V IH = +2.4V, V IL =.8V, T A = T M to T MAX, unless otherwise noted. Typical values are at +5V and T A = +25 C.) (Notes 2, 8) PARAMETER SYMBOL CONDITIONS T A M TYP MAX U N I T S ANALOG SWITCH V Analog Signal Range, V V, V = +4.5V, I +25 C 15 2 On-Resistance R = 1mA, ON V or V = 1V, 3.5V T M to T MAX 25 On-Resistance Match ( only) (Note 4) R ON = 4.5V, I = 1mA, +25 C 1 3 V or V = 1V, 3.5V T M to T MAX 4 3

4 ELECTRICAL CHARACTERISTICS Single +5V Supply (continued) ( = +4.5V to +5.5V, V IH = +2.4V, V IL =.8V, T A = T M to T MAX, unless otherwise noted. Typical values are at +5V and T A = 25 C.) (Notes 2, 8) PARAMETER SYMBOL CONDITIONS T A M TYP MAX U N I T S On-Resistance Flatness (Note 5), Off-Leakage Current (Note 3) Off-Leakage Current (, only) (Note 3) On-Leakage Current (Note 3) R FLAT(ON) I (), I () = +4.5V, I = 1mA, +25 C 3 4 V or V = 1V, 2.25V, 3.5V T M to T MAX 5 = +5.5V; V = 1V, 4.5V; +25 C -.5 ±.1.5 V or V = 4.5V, 1V T M to T MAX C -.5 ±.1.5 = +5.5V; V I = 1V, 4.5V; _() V or V = 4.5V, 1V T M to T MAX -1 1 = +5.5V; V = 1V, 4.5V; +25 C -.5 ±.1.5 I _(ON) V or V = 1V, 4.5V, or floating T M to T MAX -2 2 Turn-On Time (Note 3) t ON R L = 3, C L = 35pF, = +5.5V, V, V = 3V, +25 C 3 4 Figure 1 T M to T MAX 5 Turn-Off Time (Note 3) t R L = 3, C L = 35pF, = +5.5V, V, V = 3V, +25 C 15 2 Figure 1 T M to T MAX 25 Break-Before-Make Time ( only) (Note 3) DIGITAL I/O t BBM R L = 3, C L = 35pF, = +5.5V, V, V = 3V, +25 C 9 Figure 2 T M to T MAX 2 Input Logic High V IH 2.4 V Input Logic Low V IL.8 V Input Leakage Current I V = or -1 1 µa SUPPLY Power-Supply Range V Supply Current I+ = +5.5V, V = or 1 µa Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note 4: R ON = R ON(MAX ) - R ON(M), between switches. Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 6: Off-Isolation = 2log 1 (V / V ), V = output, V = input to off switch. Note 7: Between switches. Note 8: UCSP parts are 1% tested at +25 C only, and guaranteed by correlation at the full-rated temperature. 4

5 (T A = +25 C, unless otherwise noted.) RON () ON/-LEAKAGE CURRENTS (pa) ON-RESISTAE vs. V = +2V V (V) = +2.7V = +3.3V = +5V ON/-LEAKAGE CURRENT vs. TEMPERATURE ON-LEAKAGE -LEAKAGE /7/8 toc1 MAX 4696/7/8 toc4 RON () CHARGE JECTION (pc) ON-RESISTAE vs. V ( = +3V) T A = +85 C T A = -4 C T A = +25 C V (V) 5 CHARGE JECTION vs. V = +3V Typical Operating Characteristics = +5V /7/8 toc2 /7/8 toc5 RON () ton/ () ON-RESISTAE vs. V ( = +5V) T A = +85 C T A = +25 C T A = -4 C V (V) TURN-ON/ TIME vs. SUPPLY VOLTAGE t t ON /7/8 toc3 /7/8 toc TEMPERATURE ( C) V (V) (V) ton/ () TURN-ON/ TIME vs. TEMPERATURE t = +3V t ON = +3V t ON = +5V t = +5V /7/8 toc7 SUPPLY CURRENT (pa) V = SUPPLY CURRENT vs. SUPPLY VOLTAGE /7/8 toc8 LOGIC THRESHOLD VOLTAGE (V) LOGIC THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE V RISG V FALLG /7/8 toc9 TEMPERATURE ( C) SUPPLY VOLTAGE (V) (V) 5

6 (T A = +25 C, unless otherwise noted.) LOSS (db) FREQUEY RESPONSE ON-LOSS P/BUMP FREQUEY (Hz) -ISOLATION 1k 1k 1M 1M 1M 1G NAME Pin/Bump Description FUTION B1 B1 B1 Positive Supply Voltage Input B2 B2 B2 Digital Control Input B3 B3 B3 Ground Typical Operating Characteristics (continued) /7/8 toc1 A1 A3 Analog Switch, Normally Closed Terminal A2, A3 A2, A3 A2 Analog Switch, Common Terminal A1 A1 Analog Switch, Normally Open Terminal THD (%) TOTAL HARMONIC DISTORTION vs. FREQUEY R L = 6 = +5V V = 2V P-P f = 2kHz 1 1 1k 1k 1k FREQUEY (Hz) /7/8 toc11 Applicatio Information Logic Inputs Where the have a +3.3V supply, may be driven low to and driven high to 5.5V. Driving rail-to-rail minimizes power coumption. Logic inputs accept up to +5.5V regardless of supply voltage. Analog Signal Levels Analog signals that range over the entire supply voltage ( to ) are passed with very little change in R ON (see Typical Operating Characteristics). The switches are bidirectional, so the,, and terminals are both inputs or outputs. Power-Supply Sequencing and Overvoltage Protection CAUTION: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to devices. Proper power-supply sequencing is recommended for all CMOS devices. Always apply before applying analog signals, especially if the analog signal is not current limited. If this sequencing is not possible, and if the analog inputs are not current limited to <2mA, add a small-signal diode (D1) as shown in Figure 6. Adding a protection diode reduces the analog range to a diode drop (about.7v) below (for D1). R ON increases slightly at low supply voltages. Maximum supply volt- 6

7 age () must not exceed +6V. Protection diode D1 also protects agait some overvoltage situatio. No damage will result on the circuit in Figure 6 if the supply voltage is below the absolute maximum rating and if a fault voltage up to the absolute maximum rating is applied to an analog signal terminal. LOGIC PUT V OR R L 3 C L CLUDES FIXTURE AND STRAY CAPACITAE. = V N_ ( R L R L + R ON ) C L 35pF UCSP Applicatio Information For the latest application details on UCSP cotruction, dimeio, tape carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile as well as the latest information on reliability testing results, go to Maxim s website at for the Application Note UCSP A Wafer-Level Chip-Scale Package. LOGIC PUT SWITCH OUTPUT V IH V IL Test Circuits/Timing Diagrams 5% t ON t tr < 5 tf < 5.9 V UT.9 LOGIC PUT WAVEFORMS VERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure 1. Switching Time V N_ R L 3 C L 35pF LOGIC PUT V IH V IL 5% tr < 5 tf < 5 LOGIC PUT.9 C L CLUDES FIXTURE AND STRAY CAPACITAE. t D Figure 2. Break-Before-Make Interval ( only) 7

8 V GEN Figure 3. Charge Injection 5 OR R GEN OR 1nF V IL TO V IH V Test Circuits/Timing Diagrams (continued) C L 1nF MEAS 5 NETWORK ANALYZER REF ON ON Q = ( )(C L ) -ISOLATION = 2log V ON-LOSS = 2log V CROSSTALK = 2log V DEPENDS ON SWITCH CONFIGURATION; PUT POLARITY DETERMED BY SENSE OF SWITCH. MEASUREMENTS ARE STANDARDIZED AGAST SHORTS AT IC TERMALS. -ISOLATION IS MEASURED BETWEEN AND "" OR TERMAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN AND "ON" OR TERMAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 4. Off-Isolation/On-Channel Bandwidth, Crosstalk 1nF POSITIVE SUPPLY D1 CAPACITAE METER f = 1MHz or V IL OR V IH V g Figure 5. Channel Off/On-Capacitance Figure 6. Overvoltage Protection Using External Blocking Diodes TRANSISTOR COUNT: 5 Chip Information 8

9 Package Information (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to 6L, UCSP.EPS Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.