SGM :1 CMOS Analog Signal Multiplexer

Transcription

1 8:1 CMOS nalog Signal Multiplexer GENERL DESCRIPTION The is a CMOS analog IC configured as an 8-channel multiplexer. This CMOS device can operate from 2.5V to 5.5V single supplies. Each switch can handle rail-to-rail analog signals. The off-leakage current is only 1n (TYP) at +25. ll digital inputs can support 1.8V logic control I/O. The is available in Green SOIC-16, SSOP-16, TSSOP-16 and TQFN L packages. It operates over an ambient temperature range of -40 to +85. PPLICTIONS FETURES Guaranteed On-Resistance 48Ω (TYP) with +5V Supply Guaranteed On-Resistance Match Between Channels Low Off-Leakage Current 1n (TYP) at +25 Low On-Leakage Current 1n (TYP) at +25 Optimized Rise Time and Fall Time of, B, C Control Pins to Reduce Clock Feedthrough Effect 2.5V to 5.5V Single-Supply Operation 1.8V Logic Compatible High Off-Isolation: -83dB (R L =, f = 1MHz) -40 to +85 Operating Temperature Range vailable in Green SOIC-16, SSOP-16, TSSOP-16 and TQFN L Packages Battery-Operated Equipment udio and Video Signal Routing Low-Voltage Data-cquisition Systems Communications Circuits utomotive JNURY 2015 REV.. 1

2 8:1 CMOS nalog Signal Multiplexer PCKGE/ORDERING INFORMTION MODEL PCKGE DESCRIPTION SPECIFIED TEMPERTURE RNGE ORDERING NUMBER PCKGE MRKING PCKING OPTION SOIC to +85 YS16G/TR YS16 Tape and Reel, 2500 SSOP to +85 YQS16G/TR TSSOP to +85 YTS16G/TR YQS16 YTS16 Tape and Reel, 3000 Tape and Reel, 4000 TQFN L -40 to +85 YTQ16G/TR 48751TQ Tape and Reel, 4000 NOTE: = Date Code and Vendor Code. Green (RoHS & HSF): defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If you have additional comments or questions, please contact your SGMICRO representative directly. BSOLUTE MIMUM RTINGS to V to 6V Voltage into ny Terminal (1) V to ( + 0.3V) Continuous Current into ny Terminal... ±20m Peak Current, _ (Pulsed at 1ms, 10% duty cycle)... ±40m Junction Temperature Storage Temperature Range to +150 Lead Temperature (Soldering, 10s) ESD Susceptibility HBM V MM V NOTE: 1. Voltages exceeding or on any signal terminal are clamped by internal diodes. Limit forward-diode current to maximum current rating. RECOMMENDED OPERTING CONDITIONS Supply Voltage Range V to 5.5V Operating Temperature Range to +85 OVERSTRESS CUTION Stresses beyond those listed may cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational section of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ESD SENSITIVITY CUTION This integrated circuit can be damaged by ESD if you don t pay attention to ESD protection. SGMICRO recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DISCLIMER reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. JNURY

3 8:1 CMOS nalog Signal Multiplexer PIN CONFIGURTIONS (TOP VIEW) (TOP VIEW) ENBLE 6 11 ENBLE 4 EP 9 NC 7 LOGIC 10 B C NC C B SOIC-16/SSOP-16/TSSOP-16 TQFN L PIN DESCRIPTION FUNCTION TBLE ENBLE INPUT PIN SOIC-16/SSOP-16/TSSOP-16 TQFN L SELECT INPUTS C B NME ON SWITCHES H ll Switches Open L L L L -0 L L L H -1 L L H L -2 L L H H -3 L H L L -4 L H L H -5 L H H L -6 L H H H -7 FUNCTION 13, 14, 15, 12, 1, 5, 2, 4 11, 12, 13, 10, 15, 3, 16, nalog Switch Inputs nalog Switch Output Positive nalog and Digital Supply Voltage Input Digital ddress Input B Digital ddress B Input. 9 7 C Digital ddress C Input. 8 6 Ground. Connect to digital ground. 7 5 NC No Connect. 6 4 ENBLE Digital Enable Input. Normally connected to. Exposed Pad EP Exposed Pad. Connect EP to. = Don t care NOTE: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally well in either direction. JNURY

4 8:1 CMOS nalog Signal Multiplexer ELECTRICL CHRCTERISTICS ( = 5.0V, Full = -40 to +85, typical values are at T = +25, unless otherwise noted.) PRMETER SYMBOL CONDITIONS TEMP MIN TYP M UNITS NLOG SWITCH nalog Signal Range V _, V Full V On-Resistance R ON = 5.0V, I = 1m On-Resistance Match Between Channels R ON = 5.0V, I = 1m On-Resistance Flatness R FLT(ON) = 5.0V, I = 1m Full Full Full 28 _ Off Leakage Current I _(OFF) = 5.0V, V _ = 4.5V or 0V, V = 4.5V or 0V n Off Leakage Current I (OFF) = 5.0V, V _ = 4.5V or 0V, V = 4.5V or 0V n On Leakage Current I (ON) = 5.0V, V = 4.5V or 0V n DIGITL I/O Logic Input Logic Threshold High Logic Input Logic Threshold Low Input-Current High Input-Current Low DYNMIC CHRCTERISTICS V H, V BH, V CH, V ENBLE V L, V BL, V CL V ENBLE I H, I BH, I CH I ENBLE I L, I BL, I CL I ENBLE V V V, V B, V C, V ENBLE = n V, V B, V C, V ENBLE = 0V n ddress Transition Time t TRNS V _ = ±3V, R L = 300Ω, C L = 35pF, Test Circuit ns ENBLE Turn-On Time t ON V _ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns ENBLE Turn-Off Time t OFF V _ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns Internal, B, C Rise Time t R ns Internal, B, C Fall Time t F ns Break-Before-Make Time Delay t D V _ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns Charge Injection Q R S = 0Ω, C L = 1nF, Test Circuit pc Off Isolation O ISO R L =, f = 1MHz, Test Circuit db Input Off-Capacitance C _(OFF) V _ = 0V, f = 1MHz, Test Circuit pf Output Off-Capacitance C (OFF) V _ = 0V, f = 1MHz, Test Circuit pf Output On-Capacitance C (ON) V _ = 0V, f = 1MHz, Test Circuit pf -3dB Bandwidth BW R L = MHz Total Harmonic Distortion THD R L = 600Ω, 5V P-P, f = 20Hz to 20kHz % POWER SUPPLY Power Supply Range Full V Power Supply Current I CC = 5.0V, V, V B, V C, V ENBLE = or μ Ω Ω Ω JNURY

5 8:1 CMOS nalog Signal Multiplexer ELECTRICL CHRCTERISTICS (continued) ( = 3.3V, Full = -40 to +85, typical values are at T = +25, unless otherwise noted.) PRMETER SYMBOL CONDITIONS TEMP MIN TYP M UNITS NLOG SWITCH nalog Signal Range V _, V Full V On-Resistance R ON I = 1m Full 116 _ Off Leakage Current I _(OFF) V _ = 1V, 3V, V = 3V, 1V n Off Leakage Current I (OFF) V _ = 1V, 3V, V = 3V, 1V n On Leakage Current I (ON) V = 3V, 1V n DIGITL I/O Logic Input Logic Threshold High Logic Input Logic Threshold Low Input-Current High Input-Current Low DYNMIC CHRCTERISTICS V H, V BH, V CH, V ENBLE V L, V BL, V CL V ENBLE I H, I BH, I CH I ENBLE I L, I BL, I CL I ENBLE V V V, V B, V C, V ENBLE = n V, V B, V C, V ENBLE = 0V n ddress Transition Time t TRNS V _ = 3V/0V, R L = 300Ω, C L = 35pF, Test Circuit ns ENBLE Turn-On Time t ON V _ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns ENBLE Turn-Off Time t OFF V _ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns Internal, B, C Rise Time t R ns Internal, B, C Fall Time t F ns Break-Before-Make Time Delay t D V _ = 3V, R L = 300Ω, C L = 35pF, Test Circuit ns -3dB Bandwidth BW R L = MHz Charge Injection Q R S = 0Ω, C = 1nF, V S = 2.5V, Test Circuit pc POWER SUPPLY Power Supply Current I CC V, V B, V C, V ENBLE = or μ Ω JNURY

6 8:1 CMOS nalog Signal Multiplexer TYPICL PERFORMNCE CHRCTERISTICS = 5.0V, unless otherwise noted. 70 On Resistance vs. Input Voltage 0 Off Isolation vs. Frequency On Resistance (Ω) T = +85 T = -40 T = +25 Off Isolation (db) Input Voltage (V) Frequency (MHz) JNURY

7 8:1 CMOS nalog Signal Multiplexer TEST CIRCUITS V,V B,V C B C V 0V V,V B,V C 50% 0V V 0 90% 50% 90% ENBLE 300Ω 35pF 0V t TRNS t TRNS Test Circuit 1. ddress Transition Times (t TRNS) B C V V ENBLE ENBLE 300Ω 35pF Test Circuit 2. Switching Times (t ON, t OFF) V,V B,V C B C 0-7 3V V,V B,V C 50% 0V V 80% t R < 20ns t F < 20ns ENBLE 300Ω 35pF 0V t D Test Circuit 3. Break-Before-Make Time Delay (t D) JNURY

8 8:1 CMOS nalog Signal Multiplexer TEST CIRCUITS (continued) CHNNEL SELECT { B C _ V ENBLE 0V V ENBLE ENBLE C L =1nF Δ Δ IS THE MESURED VOLTGE DUE TO CHRGE TRNSFER ERROR Q WHEN THE CHNNEL TURNS OFF. Q = Δ C L Test Circuit 4. Charge Injection (Q) 10nF NETWORK NLYZER CHNNEL SELECT{ B C ENBLE _ V IN MES. REF. OFF-ISOLTION = 20log (/V IN) ON-LOSS = 20log (/V IN) MESUREMENTS RE STNDRDIZED GINST SHORT T SOCKET TERMINLS. OFF-ISOLTION IS MESURED BETWEEN COM ND "OFF" NO TERMINL ON ECH SWITCH. ON-LOSS IS MESURED BETWEEN COM ND "ON" NO TERMINL ON ECH SWITCH. SIGNL DIRECTION THROUGH SWITCH IS REVERSED; WORST VLUES RE RECORDED. Test Circuit 5. Off Isolation, On Loss CHNNEL SELECT { B C _ ENBLE 1MHz CPCITNCE NLYZER Test Circuit 6. Capacitance JNURY

9 8:1 CMOS nalog Signal Multiplexer PPLICTION INFORMTION Power-Supply Considerations Overview The construction is typical of most CMOS analog switch. It supports single power supply. and are used to drive the internal CMOS switches and set the limits of the analog voltage on any switch. Reverse ESD protection diodes are internally connected between each analog-signal pin and both and. If any analog signal exceeds or, one of these diodes will conduct. During normal operation, these and other reverse-biased ESD diodes leak, forming the only current drawn from or. Virtually all the analog leakage current comes from the ESD diodes. lthough the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either or and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the and pins constitutes the analog-signal-path leakage current. ll analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of either the same or opposite polarity. VCC 100Ω 0.01μF VCC * * _ * * *INTERNL PROTECTION DIODES Figure 1. Over-Voltage Protection Using External Resistor Over-Voltage Protection Proper power-supply sequencing is recommended for the CMOS device. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. lways sequence on first, followed by the logic inputs and analog signals. If power-supply sequencing is not possible, add one 100Ω resistor in series with the supply pin for over-voltage protection (Figure 1). JNURY

10 PCKGE INFORMTION PCKGE OUTLINE DIMENSIONS SOIC-16 D e 1.75 E1 E RECOMMENDED LND PTTERN (Unit: mm) L b 1 2 θ c Symbol In Millimeters In Inches MIN M MIN M b c D E E e 1.27 BSC BSC L θ T

11 PCKGE INFORMTION PCKGE OUTLINE DIMENSIONS SSOP-16 D E1 E b e RECOMMENDED LND PTTERN (Unit: mm) L 1 2 θ c In Millimeters In Inches Symbol MIN M MIN M b c D E E e BSC BSC L θ T

12 PCKGE INFORMTION PCKGE OUTLINE DIMENSIONS TSSOP-16 D E1 E e b RECOMMENDED LND PTTERN (Unit: mm) L 1 2 θ H c In Millimeters In Inches Symbol MIN M MIN M b c D E E e BSC BSC L H 0.25 TYP 0.01 TYP θ T

13 PCKGE INFORMTION PCKGE OUTLINE DIMENSIONS TQFN L D e N16 L D1 N1 E E1 k b N5 TOP VIEW BOTTOM VIEW SIDE VIEW RECOMMENDED LND PTTERN (Unit: mm) In Millimeters In Inches Symbol MIN M MIN M REF REF D D E E k MIN MIN b e TYP TYP L T

14 PCKGE INFORMTION TPE ND REEL INFORMTION REEL DIMENSIONS TPE DIMENSIONS P2 P0 W Q1 Q2 Q1 Q2 Q1 Q2 B0 Q3 Q4 Q3 Q4 Q3 Q4 Reel Diameter P1 0 K0 Reel Width (W1) DIRECTION OF FEED NOTE: The picture is only for reference. Please make the object as the standard. KEY PRMETER LIST OF TPE ND REEL Package Type Reel Diameter Reel Width W1 0 B0 K0 P0 P1 P2 W Pin1 Quadrant SOIC Q1 SSOP Q1 TSSOP Q1 TQFN L Q1 DD0001 T

15 PCKGE INFORMTION CRTON BO DIMENSIONS NOTE: The picture is only for reference. Please make the object as the standard. KEY PRMETER LIST OF CRTON BO Reel Type Length Width Height Pizza/Carton DD0002 T