High Voltage, Latch-Up Proof, 4-Channel Multiplexer ADG5204

Transcription

1 High Voltage, Latch-Up Proof, 4-Channel Multiplexer AG524 FEATURES Latch-up proof 3 pf off source capacitance 26 pf off drain capacitance.6 pc charge injection Low leakage:.4 na maximum at 85 C ±9 V to ±22 V dual-supply operation 9 V to 4 V single-supply operation 48 V supply maximum ratings Fully specified at ±15 V, ±2 V, +12 V, and +36 V VSS to V analog signal range APPLICATIONS Automatic test equipment ata acquisition Instrumentation Avionics Audio and video switching Communication systems FUNCTIONAL BLOCK IAGRAM S1 S2 S3 S4 AG524 1 OF 4 ECOERS A A1 EN Figure GENERAL ESCRIPTION The AG524 is a complementary metal oxide semiconductor (CMOS) analog multiplexer, comprising four single channels. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-andhold applications, where low glitch and fast settling are required. Fast switching speed together with high signal bandwidth make the AG524 suitable for video signal switching. The AG524 is designed on a trench process, which guards against latch-up. A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions. The AG524 switches one of four inputs to a common output,, as determined by the 3-bit binary address lines, A, A1, and EN. Logic on the EN pin disables the device. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action. PROUCT HIGHLIGHTS 1. Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions. 2. Ultralow Capacitance and <1 pc Charge Injection. 3. ual-supply Operation. For applications where the analog signal is bipolar, the AG524 can be operated from dual supplies up to ±22 V. 4. Single-Supply Operation. For applications where the analog signal is unipolar, the AG524 can be operated from a single rail power supply up to 4 V V Logic-Compatible igital Inputs. VINH = 2. V, VINL =.8 V. 6. No VL Logic Power Supply Required. Rev. Information furnished by Analog evices is believed to be accurate and reliable. However, no responsibility is assumed by Analog evices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog evices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 916, Norwood, MA , U.S.A. Tel: Fax: Analog evices, Inc. All rights reserved.

2 AG524 TABLE OF CONTENTS Features... 1 Applications... 1 Functional Block iagram... 1 General escription... 1 Product Highlights... 1 Revision History... 2 Specifications... 3 ±15 V ual Supply... 3 ±2 V ual Supply V Single Supply V Single Supply... 6 Continuous Current per Channel, Sx or... 7 Absolute Maximum Ratings...8 ES Caution...8 Pin Configurations and Function escriptions...9 Truth Table...9 Typical Performance Characteristics... 1 Test Circuits Terminology Trench Isolation Applications Information Outline imensions Ordering Guide REVISION HISTORY 5/11 Revision : Initial Version Rev. Page 2 of 2

3 SPECIFICATIONS ±15 V UAL SUPPLY V = 15 V ± 1%, VSS = 15 V ± 1%, GN = V, unless otherwise noted. AG524 Table 1. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to VSS V max On Resistance, RON 16 Ω typ VS = ±1 V, IS = 1 ma, see Figure Ω max V = V, VSS = 13.5 V On-Resistance Match 4.5 Ω typ VS = ±1 V, IS = 1 ma Between Channels, RON Ω max On-Resistance Flatness, RFLAT(ON) 38 Ω typ VS = ±1 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = V, VSS = 16.5 V Source Off Leakage, IS (Off).1 na typ VS = VS = ±1 V, V = 1 V, see Figure na max rain Off Leakage, I (Off).1 na typ VS = VS = ±1 V, V = 1 V, see Figure na max Channel On Leakage, I, IS (On).2 na typ VS = V = ±1 V, see Figure na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.2 μa typ VIN = VGN or V ±.1 μa max igital Input Capacitance, CIN 3 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 175 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1 V, see Figure 29 ton (EN) 155 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1 V, see Figure 31 toff (EN) 15 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1 V, see Figure 31 Break-Before-Make Time elay, t 8 ns typ RL = 3 Ω, CL = 35 pf 3 ns min VS1 = VS2 = 1 V, see Figure 3 Charge Injection, QINJ.6 pc typ VS = V, RS = Ω, CL = 1 nf, see Figure 32 Off Isolation 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 khz, see Figure 25 Channel-to-Channel Crosstalk 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 28 3 db Bandwidth 136 MHz typ RL = 5 Ω, CL = 5 pf, see Figure 27 Insertion Loss 6.8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 27 CS (Off) 3 pf typ VS = V, f = 1 MHz C (Off) 26 pf typ VS = V, f = 1 MHz C, CS (On) 3 pf typ VS = V, f = 1 MHz POWER REQUIREMENTS V = V, VSS = 16.5 V I 45 μa typ igital inputs = V or V 55 7 μa max ISS.1 μa typ igital inputs = V or V 1 μa max V/VSS ±9/±22 V min/max GN = V 1 Guaranteed by design; not subject to production test. Rev. Page 3 of 2

4 AG524 ±2 V UAL SUPPLY V = +2 V ± 1%, VSS = 2 V ± 1%, GN = V, unless otherwise noted. Table 2. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to VSS V max On Resistance, RON 14 Ω typ VS = ±15 V, IS = 1 ma, see Figure Ω max V = +18 V, VSS = 18 V On-Resistance Match 4.5 Ω typ VS = ±15 V, IS = 1 ma Between Channels, RON Ω max On-Resistance Flatness, RFLAT(ON) 33 Ω typ VS = ±15 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = +22 V, VSS = 22 V Source Off Leakage, IS (Off).1 na typ VS = ±15 V, V = 15 V, see Figure na max rain Off Leakage, I (Off).1 na typ VS = ±15 V, V = 15 V, see Figure na max Channel On Leakage, I, IS (On).2 na typ VS = V = ±15 V, see Figure na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.2 μa typ VIN = VGN or V ±.1 μa max igital Input Capacitance, CIN 3 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 16 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1 V, see Figure 29 ton (EN) 15 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1 V, see Figure 31 toff (EN) 15 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 1 V, see Figure 31 Break-Before-Make Time elay, t 75 ns typ RL = 3 Ω, CL = 35 pf 3 ns min VS1 = VS2 = 1 V, see Figure 3 Charge Injection, QINJ.6 pc typ VS = V, RS = Ω, CL = 1 nf, see Figure 32 Off Isolation 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 khz, see Figure 25 Channel-to-Channel Crosstalk 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 28 3 db Bandwidth 15 MHz typ RL = 5 Ω, CL = 5 pf, see Figure 27 Insertion Loss 6 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 27 CS (Off) 3 pf typ VS = V, f = 1 MHz C (Off) 26 pf typ VS = V, f = 1 MHz C, CS (On) 3 pf typ VS = V, f = 1 MHz POWER REQUIREMENTS V = +22 V, VSS = 22 V I 5 μa typ igital inputs = V or V 7 11 μa max ISS.1 μa typ igital inputs = V or V 1 μa max V/VSS ±9/±22 V min/max GN = V 1 Guaranteed by design; not subject to production test. Rev. Page 4 of 2

5 AG V SINGLE SUPPLY V = 12 V ± 1%, VSS = V, GN = V, unless otherwise noted. Table 3. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to V V max On Resistance, RON 34 Ω typ VS = V to 1 V, IS = 1 ma, see Figure Ω max V = 1.8 V, VSS = V On-Resistance Match 5 Ω typ VS = V to 1 V, IS = 1 ma Between Channels, RON Ω max On-Resistance Flatness, RFLAT(ON) 145 Ω typ VS = V to 1 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = 13.2 V, VSS = V Source Off Leakage, IS (Off).1 na typ VS = 1 V/1 V, V = 1 V/1 V, see Figure na max rain Off Leakage, I (Off).1 na typ VS = 1 V/1 V, V = 1 V/1 V, see Figure na max Channel On Leakage, I, IS (On).2 na typ VS = V = 1 V/1 V, see Figure na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.2 μa typ VIN = VGN or V ±.1 μa max igital Input Capacitance, CIN 3 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 24 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 8 V, see Figure 29 ton (EN) 25 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 8 V, see Figure 31 toff (EN) 16 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 8 V, see Figure 31 Break-Before-Make Time elay, t 14 ns typ RL = 3 Ω, CL = 35 pf 6 ns min VS1 = VS2 = 8 V, see Figure 3 Charge Injection, QINJ 1.2 pc typ VS = 6 V, RS = Ω, CL = 1 nf, see Figure 32 Off Isolation 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 25 Channel-to-Channel Crosstalk 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 28 3 db Bandwidth 16 MHz typ RL = 5 Ω, CL = 5 pf, see Figure 27 Insertion Loss 11 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 27 CS (Off) 3.5 pf typ VS = 6 V, f = 1 MHz C (Off) 29 pf typ VS = 6 V, f = 1 MHz C, CS (On) 33 pf typ VS = 6 V, f = 1 MHz POWER REQUIREMENTS V = 13.2 V I 4 μa typ igital inputs = V or V 65 μa max V 9/4 V min/max GN = V, VSS = V 1 Guaranteed by design; not subject to production test. Rev. Page 5 of 2

6 AG V SINGLE SUPPLY V = 36 V ± 1%, VSS = V, GN = V, unless otherwise noted. Table 4. Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to V V max On Resistance, RON 15 Ω typ VS = V to 3 V, IS = 1 ma, see Figure Ω max V = 32.4 V, VSS = V On-Resistance Match 4.5 Ω typ VS = V to 3 V, IS = 1 ma Between Channels, RON Ω max On-Resistance Flatness, RFLAT(ON) 35 Ω typ VS = V to 3 V, IS = 1 ma Ω max LEAKAGE CURRENTS V = 39.6 V, VSS = V Source Off Leakage, IS (Off).1 na typ VS = 1 V/3 V, V = 3 V/1 V, see Figure na max rain Off Leakage, I (Off).1 na typ VS = 1 V/3 V, V = 3 V/1 V, see Figure na max Channel On Leakage, I, IS (On).2 na typ VS = V = 1 V/3 V, see Figure na max IGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH.2 μa typ VIN = VGN or V ±.1 μa max igital Input Capacitance, CIN 3 pf typ YNAMIC CHARACTERISTICS 1 Transition Time, ttransition 18 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 18 V, see Figure 29 ton (EN) 17 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 18 V, see Figure 31 toff (EN) 17 ns typ RL = 3 Ω, CL = 35 pf ns max VS = 18 V, see Figure 31 Break-Before-Make Time elay, t 8 ns typ RL = 3 Ω, CL = 35 pf 3 ns min VS1 = VS2 = 18 V, see Figure 3 Charge Injection, QINJ.6 pc typ VS = 18 V, RS = Ω, CL = 1 nf, see Figure 32 Off Isolation 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 25 Channel-to-Channel Crosstalk 8 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 28 3 db Bandwidth 136 MHz typ RL = 5 Ω, CL = 5 pf, see Figure 27 Insertion Loss 6.7 db typ RL = 5 Ω, CL = 5 pf, f = 1 MHz, see Figure 27 CS (Off) 3 pf typ VS = 18 V, f = 1 MHz C (Off) 26 pf typ VS = 18 V, f = 1 MHz C, CS (On) 3 pf typ VS = 18 V, f = 1 MHz POWER REQUIREMENTS V = 39.6 V I 85 μa typ igital inputs = V or V 1 13 μa max V 9/4 V min/max GN = V, VSS = V 1 Guaranteed by design; not subject to production test. Rev. Page 6 of 2

7 AG524 CONTINUOUS CURRENT PER CHANNEL, Sx OR Table 5. Parameter 25 C 85 C 125 C Unit CONTINUOUS CURRENT, Sx OR PINS V = +15 V, VSS = 15 V TSSOP (θja = C/W) ma max LFCSP (θja = 3.4 C/W) ma max V = +2 V, VSS = 2 V TSSOP (θja = C/W) ma max LFCSP (θja = 3.4 C/W) ma max V = 12 V, VSS = V TSSOP (θja = C/W) ma max LFCSP (θja = 3.4 C/W) ma max V = 36 V, VSS = V TSSOP (θja = C/W) ma max LFCSP (θja = 3.4 C/W) ma max Rev. Page 7 of 2

8 AG524 ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted. Table 6. Parameter Rating V to VSS 48 V V to GN.3 V to +48 V VSS to GN +.3 V to 48 V Analog Inputs 1 VSS.3 V to V +.3 V or 3 ma, whichever occurs first igital Inputs 1 VSS.3 V to V +.3 V or 3 ma, whichever occurs first Peak Current, Sx or Pins 81 ma (pulsed at 1 ms, 1% duty cycle maximum) Continuous Current, Sx or 2 ata + 15% Operating Temperature Range 4 C to +125 C Storage Temperature Range 65 C to +15 C Junction Temperature 15 C Thermal Impedance, θja 16-Lead TSSOP, θja Thermal C/W Impedance (4-Layer Board) 16-Lead LFCSP, θja Thermal 3.4 C/W Impedance (4-Layer Board) Reflow Soldering Peak 26(+/ 5) C Temperature, Pb Free Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating can be applied at any one time. ES CAUTION 1 Overvoltages at the Sx and pins are clamped by internal diodes. Limit current to the maximum ratings given. 2 See Table 5. Rev. Page 8 of 2

9 NC NC NC EN 15 A 14 A1 13 NC AG524 PIN CONFIGURATIONS AN FUNCTION ESCRIPTIONS A 1 14 EN 2 13 A1 GN V SS 3 S1 4 S2 5 6 NC 7 AG524 TOP VIEW (Not to Scale) NC = NO CONNECT 12 V 11 S3 1 S4 9 NC 8 NC Figure 2. TSSOP Pin Configuration V SS 1 NC 2 S1 3 S2 4 AG524 TOP VIEW (Not to Scale) 12 GN 11 V 1 S3 9 S4 NOTES 1. NC = NO CONNECT. 2. EXPOSE PA TIE TO SUBSTRATE, V SS. Figure 3. LFCSP Pin Configuration Table 7. Pin Function escriptions Pin No. TSSOP LFCSP Mnemonic escription 1 15 A Logic Control Input EN Active High igital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, the Ax logic inputs determine the on switches. 3 1 VSS Most Negative Power Supply Potential. 4 3 S1 Source Terminal. Can be an input or an output. 5 4 S2 Source Terminal. Can be an input or an output. 6 6 rain Terminal. Can be an input or an output. 7 to 9 2, 5, 7, 8, 13 NC No Connect. These pins are open. 1 9 S4 Source Terminal. Can be an input or an output S3 Source Terminal. Can be an input or an output V Most Positive Power Supply Potential GN Ground ( V) Reference A1 Logic Control Input. N/A 1 EP Exposed Pad Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. 1 N/A means not applicable. TRUTH TABLE Table 8. EN A1 A S1 S2 S3 S4 X 1 X 1 Off Off Off Off 1 On Off Off Off 1 1 Off On Off Off 1 1 Off Off On Off Off Off Off On 1 X is don t care. Rev. Page 9 of 2

10 AG524 TYPICAL PERFORMANCE CHARACTERISTICS T A = 25 C V = +18V V SS = 18V T A = 25 C V = 32.4V V SS = V ON RESISTANCE (Ω) V = +2V V SS = 2V V = +22V V SS = 22V ON RESISTANCE (Ω) V = 36V V SS = V V = 39.6V V SS = V V S, V (V) V S, V (V) Figure 4. RON as a Function of V or VS, ual Supply Figure 7. RON as a Function of V or VS, Single Supply 25 T A = 25 C V = +9V V SS = 9V 25 V = +15V V SS = 15V 2 2 T A = +125 C ON RESISTANCE (Ω) 15 1 V = +16.5V V SS = 16.5V V = +15V V SS = 15V V = +13.2V V SS = 13.2V ON RESISTANCE (Ω) 15 1 T A = +85 C T A = +25 C T A = 4 C V S, V (V) Figure 5. RON as a Function of V or VS, ual Supply V S, V (V) Figure 8. RON as a Function of V or VS, for ifferent Temperatures, ±15 V ual Supply ON RESISTANCE (Ω) T A = 25 C V = 9V V SS = V V = 1.8V V SS = V V = 12V V SS = V V = 13.2V V SS = V ON RESISTANCE (Ω) T A = +125 C T A = +85 C T A = +25 C T A = 4 C V S, V (V) Figure 6. RON as a Function of V or VS, Single Supply V = +2V V SS = 2V V S, V (V) Figure 9. RON as a Function of V or VS, for ifferent Temperatures, ±2 V ual Supply Rev. Page 1 of 2

11 AG T A = +125 C 1 5 I I S (OFF) +, I S (ON) + + I (OFF) + ON RESISTANCE (Ω) T A = +85 C T A = +25 C T A = 4 C 5 V = 12V V SS = V V S, V (V) Figure 1. RON as a Function of V or VS for ifferent Temperatures, 12 V Single Supply LEAKAGE CURRENT (pa) 5 1 I (OFF) + I, I S (ON) 15 V = +2V V SS = 2V V BIAS = +15V/ 15V TEMPERATURE ( C) I S (OFF) + Figure 13. Leakage Current vs. Temperature, ±2 V ual Supply ON RESISTANCE (Ω) V = 36V V SS = V T A = +125 C T A = +85 C T A = +25 C T A = 4 C V S, V (V) Figure 11. RON as a Function of V or VS for ifferent Temperatures, 36 V Single Supply LEAKAGE CURRENT (pa) I S (OFF) + I S (OFF) + 1 V = 12V V SS = V V BIAS = 1V/1V TEMPERATURE ( C) I, I S (ON) + + I (OFF) + I (OFF) + I, I S (ON) Figure 14. Leakage Current vs. Temperature, 12 V Single Supply LEAKAGE CURRENT (pa) I (OFF) + I, I S (ON) + + I (OFF) + I, I S (ON) 6 V = +15V V SS = 15V V BIAS = +1V/ 1V TEMPERATURE ( C) I S (OFF) + I S (OFF) + Figure 12. Leakage Current vs. Temperature, ±15 V ual Supply LEAKAGE CURRENT (pa) I (OFF) + I,I S (ON) + + I (OFF) + 2 V = 36V I,I S (ON) V SS = V V BIAS = 1V/3V TEMPERATURE ( C) I S (OFF) + I S (OFF) + Figure 15. Leakage Current vs. Temperature, 36 V Single Supply Rev. Page 11 of 2

12 AG524 2 T A = 25 C V = +15V V SS = 15V 35 3 OFF ISOLATION (db) TIME (ns) V = +12V V SS = V V = +2V V SS = 2V V = +15V V SS = 15V V = +36V V SS = V k 1k 1M 1M 1M 1G FREQUENCY (Hz) TEMPERATURE ( C) Figure 16. Off Isolation vs. Frequency, ±15 V ual Supply Figure 19. Transition Time vs. Temperature 2 T A = 25 C V = +15V V SS = 15V 2 T A = 25 C V = +15V V SS = 15V CROSSTALK (db) BETWEEN S1 AN S2 ACPSRR (db) NO ECOUPLING CAPACITORS BETWEEN S1 AN S k 1k 1M 1M 1M 1G FREQUENCY (Hz) ECOUPLING CAPACITORS 12 1k 1k 1k 1M 1M FREQUENCY (Hz) Figure 17. Crosstalk vs. Frequency, ±15 V ual Supply Figure 2. ACPSRR vs. Frequency, ±15 V ual Supply CHARGE INJECTION (pc) T A = 25 C V = +15V V SS = 15V V = +2V V SS = 2V V = +12V V SS = V V = +36V V SS = V CAPACITANCE (pf) T A = 25 C V = +15V V SS = 15V SOURCE/RAIN ON RAIN OFF SOURCE OFF V S (V) V S (V) Figure 18. Charge Injection vs. Source Voltage Figure 21. Capacitance vs. Source Voltage, ual Supply Rev. Page 12 of 2

13 AG T A = 25 C V = +15V V SS = 15V ATTENUATION (db) k 1M 1M 1M 1G FREQUENCY (Hz) Figure 22. Bandwidth Rev. Page 13 of 2

14 AG524 TEST CIRCUITS I S (OFF) A Sx I (OFF) A NC Sx I (ON) A V S Figure 23. Off Leakage V NC = NO CONNECT V Figure 26. On Leakage V SS.1µFV.1µF V Sx V SS NETWORK ANALYZER 5Ω V S Sx V GN R L 5Ω I S V S WITH SWITCH INSERTION LOSS = 2 log WITHOUT SWITCH Figure 24. On Resistance Figure 27. Bandwidth V V SS.1µF.1µF V SS.1µFV.1µF V V SS Sx GN 5Ω NETWORK ANALYZER 5Ω R L 5Ω V S NETWORK ANALYZER R L 5Ω V S V S1 S2 GN V SS R L 5Ω OFF ISOLATION = 2 log V S Figure 25. Off Isolation CHANNEL-TO-CHANNEL CROSSTALK = 2 log V S Figure 28. Channel-to-Channel Crosstalk Rev. Page 14 of 2

15 AG524 V.1µF V SS.1µF V IN 2.4V V V SS A1 S1 A S2 S3 S4 EN GN R L 3Ω V S1 V S4 C L 35pF ARESS RIVE (V IN ) 3V V 5% 5% 9% 9% t TRANSITION t TRANSITION Figure 29. Address to Output Switching Times V.1µF V SS.1µF V IN 3Ω V A1 A V SS S1 S2 S3 S4 V S1 ARESS RIVE (V IN ) 3V V 2.4V EN GN R L 3Ω C L 35pF 8% 8% t Figure 3. Break-Before-Make Time elay, t V.1µF V SS.1µF V IN 3Ω A1 S1 V S V V SS A S2 S3 S4 EN GN R L 3Ω C L 35pF ENABLE RIVE (V IN ) 3V V OUTPUT V 5% 5%.9.1 t ON (EN) t OFF (EN) Figure 31. Enable-to-Output Switching elay V V SS V V SS Q INJ = C L V S R S Sx ECOER C L 1nF V IN SW OFF SW ON SW OFF GN A1 A2 EN V IN SW OFF Figure 32. Charge Injection SW OFF Rev. Page 15 of 2

16 AG524 TERMINOLOGY I The positive supply current. ISS The negative supply current. V, VS The analog voltage on Terminal and Terminal S. RON The ohmic resistance between Terminal and Terminal S. RFLAT(ON) Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. I (Off) The drain leakage current with the switch off. I, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic. VINH The minimum input voltage for Logic 1. IINL, IINH The input current of the digital input. CS (Off) The off switch source capacitance, which is measured with reference to ground. C (Off) The off switch drain capacitance, which is measured with reference to ground. C (On), CS (On) The on switch capacitance, which is measured with reference to ground. CIN The digital input capacitance. ttransition The delay time between the 5% and 9% points of the digital input and switch-on condition when switching from one address state to another. ton (EN) The delay between applying the digital control input and the output switching on. See Figure 31. toff (EN) The delay between applying the digital control input and the output switching off. See Figure 31. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Bandwidth The frequency at which the output is attenuated by 3 db. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. ACPSRR (AC Power Supply Rejection Ratio) The ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the device to avoid coupling noise and spurious signals that appear on the supply voltage pins to the output of the switch. The dc voltage on the device is modulated by a sine wave of.62 V p-p. Rev. Page 16 of 2

17 TRENCH ISOLATION In the AG524, an insulating oxide layer (trench) is placed between the NMOS and the PMOS transistors of each CMOS switch. Parasitic junctions, which occur between the transistors in junction isolated switches, are eliminated, and the result is a completely latch-up proof switch. In junction isolation, the N and P wells of the PMOS and NMOS transistors form a diode that is reverse-biased under normal operation. However, during overvoltage conditions, this diode can become forward-biased. A silicon controlled rectifier (SCR) type circuit is formed by the two transistors causing a significant amplification of the current that, in turn, leads to latch-up. By using trench isolation, this diode is removed, and the result is a latch-up proof switch. TRENCH NMOS PMOS P WELL N WELL BURIE OXIE LAYER HANLE WAFER Figure 33. Trench Isolation AG Rev. Page 17 of 2

18 AG524 APPLICATIONS INFORMATION The AG52xx family of switches and multiplexers provide a robust solution for instrumentation, industrial, automotive, aerospace, and other harsh environments that are prone to latch-up, which is an undesirable high current state that can lead to device failure and persists until the power supply is turned off. The AG524 high voltage multiplexer allows single-supply operation from 9 V to 4 V and dual-supply operation from ±9 V to ±22 V. Rev. Page 18 of 2

19 AG524 OUTLINE IMENSIONS BSC PIN BSC COPLANARITY MAX SEATING PLANE.2.9 COMPLIANT TO JEEC STANARS MO-153-AB-1 Figure Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) imensions shown in millimeters A PIN 1 INICATOR SEATING PLANE SQ 3.9 TOP VIEW.65 BSC MAX.2 NOM COPLANARITY.8.2 REF EXPOSE PA COMPLIANT TO JEEC STANARS MO-22-WGGC. Figure Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm 4 mm Body, Very Very Thin Quad (CP-16-17) imensions shown in millimeters BOTTOM VIEW 1 PIN 1 INICATOR SQ MIN FOR PROPER CONNECTION OF THE EXPOSE PA, REFER TO THE PIN CONFIGURATION AN FUNCTION ESCRIPTIONS SECTION OF THIS ATA SHEET C ORERING GUIE Model 1 Temperature Range Package escription Package Option AG524BRUZ 4 C to +125 C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14 AG524BRUZ-RL7 4 C to +125 C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14 AG524BCPZ-RL7 4 C to +125 C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP Z = RoHS Compliant Part. Rev. Page 19 of 2

20 AG524 NOTES 211 Analog evices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners /11() Rev. Page 2 of 2