Unit 3. 2 Combinational circuits

Transcription

1 Unit 3. 2 Combinational circuits Contents Bibliography Combinational circuits: concept, analysis and synthesis. Methods to simplify logical functions. Basic combinational circuits; Multiplexers Demultiplexers Decoders Encoders Comparators Digital fundamentals. Thomas Floyd. Prentice-Hall. Digital Design. M. Morris Mano. Prentice-Hall Introduction to Digital Logic Design. John P. Hayes. Addison-Wesley

2 Combinational Circuits (I) Concept: Circuits in which the outputs in a concrete instant are function exclusively of the inputs in that instant, i.e., they don t store information. Funciones Tablas de verdad Análisis Síntesis Circuito Lógico Combinacional Analysis: From the digital circuit, obtain the mathematical function that operates with the inputs to obtain the outputs. Synthesis: From the truth table or the function, implement the circuit. 2

3 Synthesis of combinational circuits From the problem statement obtain the truth table. From the truth table, obtain the canonical function (minterms or maxterms) Simplify the canonical function (via Boolean Algebra or Karnaugh maps). Design the circuit with the logical gates that correspond to the logical operations in the simplified function. 3

4 Methods to simplify logical functions (I) Boolean Algebra Apply Boolean postulates and rules to eliminate variables and obtain a simpler function. Example: f 1 (d,c,b,a) = d c b a + d c b a = d c b (a+a) = d c b 1 = d c b f 2 (d,c,b,a) = (d+c+b+a) (d+c+b+a) = (d+c+b b+a) = (d+c+a) Caveats: Depending on how the original function is expressed, the difficulty of this method can vary considerably; and sometimes it is not obvious when the simpler expression is obtained. 4

5 Methods to simplify logical functions (II) Karnaugh maps Algorithmic method based on extracting common factors systematically arranging the truth table in a special way called Karnaugh maps. Each map contains cells distributed in such a way that two adjacent cells represent canonical terms that differ just in one variable (their binary representation differs just in one bit) Common factor can be extarcted among two of this terms and by means of distributive property, a variable is eliminated. 5

6 Methods to simplify logical functions (III) Karnaugh map for two variable functions b a b a Three variables b a Four variables c b a d c

7 Methods to simplify logical functions (IV) Simplification procedure with Karnaugh maps 1.- Draw the right map (2, 3 or 4 variables). 2.- Write 1 in the corresponding cell for minterms or ( 0 ) for maxterms 3.- Group with a close curve the maximum number of adjacent elements (always a power of 2 2, 4, 8, 16). Repeat until no element left. 4.- Obtain a simplified term for each group: In each group, a variable whose value is 0 in half of the cells and 1 in the other half, disappears. For minterms, remaining variables are taken as natural (not complemented) if they are 1 and complemented if they are 0 (the opposite for Maxterms) If any bit has no adjacent cells it will yield a canonical term 7

8 Basic combinational circuits (I) Multiplexers Circuit with 2 n inputs, just one output and n selection inputs which select which input are transmitted to the output. E7 E6 Multiplexor Selección de datos { C1 C0 E5 E4 E3 E2 E1 E0 S Entrada de datos E3 E2 E1 E0 Multiplexor 4 a 1 S Salida de datos 8

9 Basic combinational circuits (II) Demultiplexers They perform the inverse operation: one input, 2 n outputs and n selection input which determines to which output the input is transmitted. E C1 C0 E Demultiplexor 1 a 4 S3 S2 S1 S0 9

10 Basic combinational circuits (III) Multiplexer/Demultiplexers basic application Multiplexor Demultiplexor Esta entrada controla la secuencia de conmutación Esta entrada controla la secuencia de conmutación 10

11 Basic combinational circuits (IV) Decoders (1) Circuits with n inputs that codify a binary number that specify which of the 2 n outputs will be active 2 to 4 Decoder E1 E0 Dec odificador 2 a 4 S3 S2 S1 S0 I E1 E0 S3 S2 S1 S X X I 11

12 Basic combinational circuits (V) Decoders (2) 3 to 8 decoder E2 E1 E0 Dec odificador 3 a 8 S7 S6 S5 S4 S3 S2 S1 S0 I E2 E1 E0 S7 S6 S5 S4 S3 S2 S1 S X X X I 12

13 Basic combinational circuits (VI) Encoder (1) They perform the inverse operation: N inputs and n-bit output representing in binary which input is active (N 2 n ). A priority among the inputs can be established / Codificador Salida Binaria Codificada 13

14 Basic combinational circuits (VII) Encoder (2) 8 to 3 encoder with priority I E7 E6 E5 E4 E3 E2 E1 E0 Codific ador 8 a 3 con prioridad S2 S1 S0 I E7 E6 E5 E4 E3 E2 E1 E0 S2 S1 S0 P1 P0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X P1 P0 14

15 Basic combinational circuits (VIII) Comparators Compares two n-bit numbers, A and B, and determines which is bigger or whether they are equal. Generally is has three outputs: A>B, A=B y A<B A3 A2 A Ay B C> C= C< A>B A=B A<B A0 B3 B C> C= C< A > B A = B A < B A >B X X X A <B X X X A = B A = B A = B B1 B0 Comparador de 4 bits 15

16 Adders (I) Half-adder It adds two bits yielding the addition and the carry Entradas Salidas Sumando Sumando Suma Acarreo a b S C salida S = a b a b C = a b salida 16 Fundamentals of Computer Technology

17 Adders (II) Full adder It adds as well an input carry Entradas Salidas Sumando Sumando Acarreo Suma Acarreo a b C entrada S C salida a b a b C entrada S= (a b) C entrada 17 Fundamentals of Computer Technology

18 Adders (III) Full adder built with 3 half adders a b a b C entrada S= (a b) C entrada (a b) C entrada C = a b + (a b) C salida entrada a b 18 Fundamentals of Computer Technology

19 Adders (IV) N-bit adder: connect full adders with the carry B A n-1 n-1 B A n-2 n-2 B A 1 1 B A C Sumador completo C n-2 Sumador completo Sumador completo Sumador completo C 1 C 0 C n-1 S n-1 S n-2 S 1 S 0 19 Fundamentals of Computer Technology

20 Addition/subtraction circuit Operations with sign in 2C complement Operando a Operando b Circuito complementador M Suma/resta C n-1 a a... a a n-1 n b b... b b n-1 n Sumador completo de n bits S S... S S n-1 n C Resultado Fundamentals of Computer Technology