A SiC-Based Converter as a Utility Interface for a Battery System

Transcription

1 A -Based Converer as a Uiliy nerface for a Baery Sysem Hui Zhang 1, Leon M. Tolber 1,, Burak Ozpineci, Madhu S. Chinhavali hzhang1@uk.edu, olber@uk.edu, ozpinecib@ornl.gov, chinhavalim@ornl.gov 1 Elecrical and Compuer Engineering The Universiy of Tennessee Knoxville, TN 3- Absrac The purpose of his work is o provide validaed models o esimae he performance of a -based converer as a uiliy inerface in baery sysems. Sysem design and modeling are described in deail. mulaions are done for boh a JFET converer and is counerpar based on he qualiy of esed devices. The simulaion resuls indicae ha in boh charging and discharging modes, he converer has a beer performance compared o he one. (1) Wih he same heasink size and ambien emperaure, grea advanages in efficiency and juncion emperaures were found in he -based converer. () Wih he same hermal limi, large savings in sysem weigh and volume combined wih a high efficiency were found in he based converer. Keywords licon carbide (), JFET, Schoky diode, inverer, modeling, baery.. NTOUCTON licon carbide (), as an alernaive choice of maerial for power elecronics, has been widely known. has advanages in elecrical breakdown field, hermal conduciviy, elecron sauraed drif velociy, and irradiaion olerance. These make he devices able o work a higher volage, emperaure, and frequency, and produce less power losses a he same ime. As a resul, a sysem composed of devices is more efficien and reliable. Therefore, power elecronics devices are expeced o subsiue for counerpars in highpower, high-emperaure, and high-frequency applicaions [1-]. A presen, mos applicaions focus on miliary, aerospace, and geohermal, where cos is no a criical facor. Uiliy and auomobiles are wo oher poenial applicaions, which are drawing more aenion. As he cos of devices decreases, here will be more applicaion areas for devices. Fig. 1. nverer inerface sysem srucure. Power Elecronics & Elecric Machinery esearch Cener Oak idge Naional Laboraory Knoxville, TN 33 A qualiaive descripion of devices is no enough o guide device designers and cusomers. evice, circui, and sysem models and specific quaniaive resuls for differen applicaions are required. n his work, simulaions of a based converer working as an inerface beween a baery bank and a uiliy were performed. Quaniaive advanages of his sysem compared o is counerpar were obained based on he qualiy of esed devices.. UTLTY NTEFACE SYSTEM ESGN The uiliy inerface sysem is composed of a baery bank and a converer. The baery bank is o be charged and discharged from he uiliy via he hree-phase, full-bridge converer (refer o Fig. 1). The converer works as a recifier during he charging of he baery, and an inverer for discharging. A. C Link olage The converer is conrolled by nusoidal Pulse Widh Modulaion sraegy (SPWM). The relaionship beween line volage, ll, and dc link volage, dc, can be expressed as (1), where M is modulaion index []. f M 1, he minimum dc link volage is for M = 1. For ll =, dc (min) = 3.. 3dc ll = M (1) B. Baery Bank The baery bank mus be designed o mee he minimum requiremen of he dc link volage. A Hawker Genesis brand, 13Ah raed lead acid baery (wih a nominal volage of 1) is considered here. s propery curves are shown in Fig. []. uring discharging, he oupu volage of he baery slowly decreases due o he decrease of open-circui volage of he baery. Thus, a he end of discharge, he open-circui volage of he baery is he minimum, and his deermines he number of baeries needed in series. As shown as Fig. (c), afer he baery is discharged o abou % sae of charge (SOC), here will be a sharp increase in baery discharge resisance. Consequenly, running he baery wih a SOC lower han % would require a large number of baeries in series. Specifically, he number of baeries in series can be 3% more when he baeries are discharged o % SOC insead of %

2 1 Capaciy vs. discharge rae 13. Open circui volage vs. SOC Baery model: SOC- oc nernal esisances Capaciy (Ah) 1 1 (a) oc () SOC (b) ngle device models: On-sae resisance swiching characerisics Converer sysem power loss models: Averaging echnique Temperaure Loop Thermal models: Equivalen circui 11 ischarge resisance vs. oc 1 Charge resisance vs. oc Parameers dis (miliohms) oc () (c) chr (miliohms) oc () SOC. Therefore, he opimum number of baeries in series is corresponding o he end of discharge a % SOC in his case. f he baery bank is discharged by a consan curren of 1 A, i can las.33 hours from full charge o % SOC. C. Converer The converer has a sandard 3-phase full-bridge opology wih six swiches and six ani-parallel diodes. To mee he requiremens of his sysem, he raings of hese devices mus be larger han he maximum of he curren and he volage ha hey are supposed o handle. The maximum volage occurs when he baeries are fully charged, and his value is larger han he nominal volage of baeries. The maximum curren occurs a he beginning of he discharge of baeries. Based on he above discussion and also considering he availabiliy of devices, he seleced devices are shown in Table. 1 1 (d) Fig.. Characerisics of Hawker Genesis baery (13Ah). evice ess Conrol Sraegy Fig. 3. Modeling mehodology for baery-converer sysem. esimae he sysem power loss under a specific conrol sraegy. Their inpus are device characerisics given by single device models and he sysem operaion variables (converer dc side volage, ac side curren, modulaion index, and power facor) calculaed by he baery model. Their oupus are he power losses of swiches and diodes. These power losses are inpu ino he hermal models o ge real-ime juncion emperaures of devices. A he same ime, he emperaures are fed back o he single device models in order o updae device characerisics. A brief summary of specific mahemaical models is presened in Appendix. More deails can be found in papers [-11]. B. Baery Model eveloping a baery model is beyond his work. is reasonable o use a basic equivalen circui shown in Fig. o describe he performance of baeries. This informaion is only needed o generae approximae volage and curren levels expeced from a ypical baery. The parameers of Hawker Genesis baeries used in his sysem are from []. TABLE. ECES USE N THE CONETES em olage raing Curren raing Par number JFETs 1 1A 1 E Schoky diodes 1 1A 3 Cree, CS11 GBT Module 1 3A Powerex, CM3Y-NF. MOELNG Fig. 3 shows he modeling mehodology of his sysem. The baery model and converer model are he wo basic componens. A. Converer Model The converer models have hree pars, namely single device models, converer power loss models, and hermal models. ngle device models are he basis of he converer models, which describe device characerisics in boh conducion and swiching periods under differen emperaures. The converer power loss models use an averaging echnique o Fig.. Hawker Genesis baery (13Ah, 1) and is equivalen circui.. SMULATONS AN SCUSSONS n his work, he uiliy has a line volage of rms, a frequency of Hz, and he converer was conrolled o produce curren a uniy power facor. The baery bank is composed of 13Ah Hawker Genesis baeries in series. The baery bank is discharged a a consan curren of 1 A from full charge o % SOC, and he power is delivered o he uiliy hrough he converer. ice versa, i is charged a a

3 consan volage of 11 from % SOC o full charge, and he power is provided by he uiliy hrough he converer. n boh discharge and charge processes, he converer works as an inerface. They are expeced o consume as lile power as possible. The power losses and efficiencies of he and converers based on he devices in Table were compued for differen condiions using he echnique presened in Par. Some parameers obained from device ess used in he simulaions are lised in Table Swiches Juncion Temperaure GBTs 3 JFETs 3 (a) JFETs/ GBTs 1 1 iodes Juncion Temperaure 3 TABLE. ECE CHAACTESTCS (AT OOM TEMPEATUE) Fig.. evice juncion emperaures during discharge. Characerisics GBT/JFET on-sae resisance. mω. mω (.1Ω/1) GBT/JFET volage drop when =.3. GBT/JFET ransconducance 1. S 1. S (. S 1) iode on-sae resisance. mω.1 mω (3.mΩ/3) iode reverse recovery charge 13µC.µC (nc 3) Using MATLAB mulink, wo ses of simulaions have been done for boh he -based and -based sysems for a charge cycle and a discharge cycle, respecively. n he firs se of simulaions, he ambien emperaures and he heasink sizes were he same for he and sysems. n he second se of simulaions, he heasinks were seleced o limi he maximum juncion emperaure o 1 C for boh he and devices. Based on he specific sysem informaion discussed previously, he baery sysem model worked ou he unknown sysem parameers required for power losses calculaion. As shown as Fig. (a), he peak curren flowing hrough he converers changed slowly during he discharge cycle. While i decreased quickly as he open-circui volage of he baery bank increased during he charge cycle, and he average of he charge curren is much lower han ha of he discharge curren (Fig. (b)). Thus, he charge cycle is much longer han he discharge cycle, and he power involved in he charge cycle is much lower han ha in he discharge cycle. esisance (ohm) 1 x On-resisance of Swiches GBTs JFETs 3 esisance (ohm) On-resisance of iodes. 3 a) JFETs/ GBTs Fig.. evice on-sae resisances during discharge. 3 Power Loss of Swiches GBTs JFETs Power Loss of iodes 3 a) JFETs/ GBTs Fig.. evice power losses during discharge (single device). Toal Power Loss of nveer Converer Efficiency 1 Peak AC Curren 3 Peak AC Curren Toal Loss (W) 1 Efficiency (%) (a) discharge 1 3 x 1 (b) charge Fig.. Sysem power losses and efficiency during discharge. Fig.. AC side curren under wo modes (% - % SOC). A. Wih he Same Heasink ze and Ambien Temperaure Wih variaion of he sysem variables, power losses, device juncion emperaures and parameers change dynamically. The change processes obained from simulaions are shown in Figs. - (for discharge) and Figs (for charge). uring discharge, he grea power savings of he Schoky diode due o lower on-sae resisance (Fig. (b)) and beer reverse recovery characerisics reduced he emperaure rise of he sysem dramaically (Fig. ). Temperaure has a significan effec on device characerisics, especially on he mobiliy of elecrons and holes ha dominaes he dependency on emperaure of he on-sae resisance of devices. Alhough he on-sae resisance of he JFET is larger han ha of he GBT a room emperaure (see Table ), a lower on-sae resisance was found in he JFET as shown in Fig. (a) because of is much lower juncion emperaure (see Fig. (a)).

4 This furher reduced sysem power losses and improved efficiency of he converer (see Fig. and Fig. ). Consequenly, he juncion emperaure rise of he devices is less han ha of he devices (refer o Appendix ). As shown in Fig. 3, he juncion emperaures coninued o affec he device characerisics, and repea he above dynamic process unil a seady sae is reached. uring charge, a similar process exiss. Again, he performance of he Schoky diode is much beer han ha of he diode in boh conducion and swiching saes (Figs. 1-1 (b)). For he JFET, is on-sae resisance is larger han ha of he GBT in mos of he period as shown in Fig. 11 (a). seems ha he conducion loss of he JFET should be larger. However, his is no he only conribuion o he conducion loss of a swich. The loss due o he volage drop across Schoky barrier or pn-juncion is also an imporan par, and i dominaes when curren is small (refer o he equaions in Appendix ). As he device characerisics provided in Table, he volage drop across he GBT a zero curren is much higher han ha of he JFET. So he conducion loss of he GBT due o his volage drop is relaively large. nce he curren during charge is small, his par of conducion loss dominaes he overall conducion loss. Tha is o say, he overall conducion loss of he JFET is smaller han ha of he GBT. As for swiching losses, he JFET can also compee wih he GBT because of no ail curren during urn off. Thus, he oal of power losses of he JFET is smaller han ha of he GBT as shown in Fig. 1(a). Combining he beer performances of he JFET and he Schoky diode, he converer is beer han he one under charge mode (see Fig. 13). No maer discharge mode or charge mode, he converer shows beer performance han he one in efficiency and juncure emperaure. More clearly, he specific improvemens are summarized in Table. Operaion Mode TABLE. COMPASON OF SC AN S CONETE Condiion A: Wih he same heasink size and ambien emperaure Average Average Average Juncion efficiency power loss emperaure improvemen reducion reducion ( C) (%) (kw) Energy savings in one cycle (kwh) ischarge / Charge / Condiion B: Wih he same maximum juncion emperaure (1 C) ischarge / Charge 1/...3 Noe: The wo numbers in column Juncion emperaure reduced are for JFET(GBT) and diode, respecively. B. Wih ifferen zes of Heasinks n high power applicaions, he size of a heasink could accoun for 1/3 of oal sysem volume. How o reduce he size of heasink is always an issue. To show he benefi of a converer in his aspec, he simulaion is designed o run he and devices o he same emperaure (1 C) by using differen sizes of heasinks. The resuls indicae ha he size of he heasink required by he converer is reduced o abou Toal Loss (W) esisance (ohm) Swiches Juncion Temperaure GBTs JFETs 1 3 x x 1 1/ of ha of he converer under he same cooling mehod (forced cooling wih fan) or / when he inverer is naurally cooled, and a he same ime he efficiency is improved by 3.1% for discharge,.% for charge. n addiion, when he average juncion emperaures of devices change from C / C (for he JFET/he Schoky diode, respecively) under Condiion A (in Table ) o C /11 C under Condiion B, he efficiency of he converer during discharge is lowed by only.%. This indicaes ha he influence of emperaure on he devices is 3 3 iodes Juncion Temperaure (a) JFETs/ GBTs Fig. 1. evice juncion emperaures during charge.. x 1-3 On-resisance of Swiches GBTs JFETs. 1 3 x (a) JFETs/ GBTs esisance (ohm) 11 x 1-3 On-resisance of iodes x 1 Fig. 11. evice on-sae resisances during charge. Power Loss of Swiches GBTs JFETs 1 3 x 1 (a) JFETs/ GBTs 1 1 Power Loss of iodes 1 3 x 1 Fig. 1. evice power losses during charge (single device). Toal Power Loss of nveer x 1 Efficiency (%) nverer Efficiency 1 3 x 1 Fig. 13. Sysem power losses and efficiency during charge.

5 very small. Thus, more benefis can be achieved if devices are used in high-emperaure applicaions.. CONCLUSONS n boh charging and discharging modes, he converer has a beer performance over he one. Wih he same exernal hermal condiion (he same heasink size and ambien emperaure), grea advanages in efficiency and juncion emperaures were found for he -based converer. On he oher hand, wih he same hermal limi, large savings in sysem weigh and volume combined wih a high efficiency were found in he -based converer. Therefore, his -based baery converer sysem is expeced o subsiue for is counerpar in sysems like auomobiles where weigh and volume are he criical facors, he converer can be designed wih a simple and compac cooling sysem. For solar sysems where efficiency and reliabiliy is more imporan, he converer can have a normal cooling sysem in order o achieve high efficiency and reliabiliy. Even hough devices are expensive, he large savings can make hem very cos-effecive. EFEENCES [1] L. M. Tolber, B. Ozpineci, S. K. slam, M. Chinhavali, Wide bandgap semiconducors for uiliy applicaions, ASTE nernaional Conference on Power and Energy Sysems (PES 3), February -, 3, Palm Springs, California, pp [] NEO, evelopmen of ulra low loss power devices echnology, pamphles/shindenryoku/developmen.pdf. [3] T. Ericsen, Fuure navy applicaion of wide bandgap power semiconducor devices, Proceedings of he EEE, vol., ssue, June, pp [] P. G. Neudeck, L. G. Maus, An overview of silicon carbide device echnology, Ninh Symposium on Space Nuclear Power Sysems, Albuquerque, New Mexico, Jan. 1-1, 1. [] N. Mohan, T. M. Undeland, W. P. obbins, Power Elecronics, nd Ediion, John Wiley & Sons nc., 1. APPENX. SYMBOLS iode volage when curren is GBT volage when curren is On resisance of diode J On resisance of JFET On resisance of GBT Peak forward curren J Curren densiy M Modulaion index φ Phase angle of curren f c Swiching frequency ail uraion of ail curren of GBT k Tail curren facor for GBT Peak reverse curren of diode rr everse recovery ime of diode S Snappiness facor of diode A Acive area of device E c ε Breakdown volage ielecric consan dc C bus volage g m Transconducance GH Highes gae volage GL Lowes gae volage h P j P d Threshold volage Power loss of JFET/GBT Power loss of diode jc Thermal resisance from juncion o case ch Thermal resisance from case o heasink ha Thermal resisance from heasink o ambien C Thermal capaciance []. Johnson, M. Keyser, Tesing, analysis, and validaion of a Hawker Genesis lead acid baery model in ASO, analysis/documens/hawker_validaion.hml, Mar. 1. [] H. Zhang, M. Chinhavali, B. Ozpineci, L. M. Tolber, Power losses and hermal modeling of H- JFET inverer, EEE ndusry Applicaions Sociey Annual Meeing, Ocober -,, Hong Kong, China, pp [] F. Blaabjerg, J. K. Pedersen, Opimized design of a complee hree phase PWM-S nverer, EEE Transacions on Power Elecronics, vol. 1, no. 3, May 1, pp. -. [] C. Wong, EMTP modling of GBT dynamic performance for power dissipaion esimaion, EEE Transacions on ndusry Applicaions, vol. 33, no. 1, Jan./Feb. 1, pp-1. [1]. Blasko,. Lukaszewski,. Sladky, On line hermal model and hermal managemen sraegy of a hree phase volage source inverer, EEE ndusry Applicaions Sociey Annual Meeing, Ocober 3-, 1, Phoenix, Arizona, pp [11] B. Ozpineci, Sysem mpac of licon Carbide Power Elecronics on Hybrid Elecric ehicle Applicaions, Ph. disseraion, The Universiy of Tennessee, Aug.. APPENX. MOELNG OF NETE 1. GBT Conducion loss: M cosφ Pcond, = + Mcosφ 3π d f c rr + d 3( S + 1) H G 1 π + an Swiching loss: G1 G1 fc J = H G π an + + G G + k dc ail 1 1 dc H = ε E c dca G 1 = gm( GH h) G = gm( h GL) 3 B. JFET Conducion loss: 1 1 Pcond, J = J + M cosφ 3π 3 d f c rr + J d 3( S + 1) G 1 π + an Swiching loss: G1 Hf G1 c J = G + π + an G G 3. iode Conducion loss: M cosφ Pcond, = Mcosφ 3π + Swiching loss: dc d Srr = fc S d S + 1. Thermal Model P j () j1 j jn j1 j jn J C j j C j1 C j C jn C ch C ha A H ch ha C j1 C j C jn P d ()