USB Power Delivery (Type-C PD) 45 W USB wall power adapter solution based on STCH02 and STUSB4700
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1 STEVL-USBPDH USB Power Delivery (Type-C PD) W USB wall power adapter solution based on STCH0 and STUSB00 Data brief Features USB wall power adapter input: VC to VC USB voltage output: V, V and V Current limit: for all voltage level profiles Load power limited to W Cable compensation Isolated quasi-resonant flyback Efficiency 0% (approx.) USB Type-C Power Delivery compatible USB-IF certified Description This board has been physically tested and validated; it is not for sale. This USB Power Delivery wall adapter is a USB- IF certified solution with a W isolated power supply with USB Power Delivery controller. This USB Type-C PD wall power adapter design is for universal line voltage applications based on the STCH0 Primary controller and STUSB00 USB PD controller. The V, V and V USB output voltage profiles all have a rating. The offline power supply is implemented in an isolated flyback topology based on the STCH0 quasi-resonant controller with ultra-low standby power consumption. The USB Power Delivery (PD) is managed by the STUSB00 and is Type-C compatible: power negotiation, Vbus discharge, protections, etc. are entirely managed by the IC. The USB power supply architecture connects a power board with a controller board. This design optimizes the form factor and lets you scale the power section up or down to suit different USB Power dapter applications. November 0 DocID00 Rev / For further information contact your local STMicroelectronics sales office
2 ~ ~ + - STEVL-USBPDH Figure : Power board schematic diagram UB SFH- Pin.00 Header Pin.00 Header J NEUTRL LINE J. Short out R LINE NEUTRL 00nF -X V C F.-F-0V RM 0pF C not in layout 0mH L R C D BP0M FB R 0 R C uf 0V D V 0 R Q BCC not in layout ZCDUX ZCD FB 00uH L Pin.00 Header Pin.00 Header J _OUT CC Pin.00 Header J _OUT J S Schematic values for V, V, V R R V:. 0 V: k 0 D Qc BSS VOUT_HI_LOD R % R 0 % uf 0V _OUT PDO C R R V:.. V:.k R. % R % 0 % strip line conn _OUT BV0 R C.nF -Y Rc _OUT PDO D R 0 U TLVH CC R REF R. % 0 % CC C R D I_PDO PDOPDO R0 CTHODE nf 0 P R C R R 00 % R 0.R R 0.R _OUT SFH- R uf-00v 00 C R D.nF -V C S 0uF-V k C S D.nF-00V D R 0 D QD B STSPLLH STTHR0 U D STCH0 FERD0H00STS _OUT R Q k STF0LN0 D D R TE R.k T0B Sumida R C R0 00nF DNW R k SENSE 0.0 SENSE U 0uF V C0 DRIN D D D D C R R0 T S S S S D R R R 0k QSW STS0PLLH / DocID00 Rev
3 STEVL-USBPDH Figure : Control board schematic diagram V C µ XR V C µ XR C µ XR R 00 SD P Header V R 00k % CC CC D ESDL V R 0k CC CC RESET 0 VREV VSYS VRE_V Vbus_en_src Vbus_disch SD LERT# ISEL_PDO ISEL_PDO SD 0 U STUSB00 VBUS_SENSE _B_SIDE VSEL_PDO VSEL_PDO DDR0 PDO Connect exposed PD to EP PDO R.0k % R k % R 0k R k C 0n R k U + - TSILT +V Out -V R 0 C 00n VOUT_HI_LOD CC CC PDOPDO P 0 strip line conn DocID00 Rev /
4 Revision history STEVL-USBPDH Revision history Table : Document revision history Date Version Changes -Oct-0 Initial version -Nov-0 Updated cover page image, description and Figure : "Control board schematic diagram". / DocID00 Rev
5 STEVL-USBPDH IMPORTNT NOTICE PLESE RED CREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. ll other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 0 STMicroelectronics ll rights reserved DocID00 Rev /
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