A1P50S65M2. ACEPACK 1 sixpack topology, 650 V, 50 A trench gate field-stop IGBT M series, soft diode and NTC. Datasheet. Features.
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1 Datasheet ACPACK 1 sixpack topology, 65 V, 5 A trench gate field-stop IGBT M series, soft diode and NTC Features ACPACK 1 ACPACK 1 power module DBC Cu Al 2 O 3 Cu Sixpack topology 65 V, 5 A IGBTs and diodes Soft and fast recovery diode Integrated NTC Applications Inverters Industrial Motor drives Description This power module is a sixpack topology in an ACPACK 1 package with NTC, integrating the advanced trench gate field-stop technology from STMicroelectronics. This new IGBT technology represents the best compromise between conduction and switching loss, to maximize the efficiency of any converter system up to 2 khz. Product status A1P5S65M2 Product summary Order code Marking A1P5S65M2 A1P5S65M2 Package ACPACK 1 Leads type Solder contact pins DS Rev 2 - February 218 For further information contact your local STMicroelectronics sales office.
2 lectrical ratings 1 lectrical ratings 1.1 IGBT Limiting values at T j = 25 C, unless otherwise specified. Table 1. Absolute maximum ratings of the IGBT Symbol Parameter Value Unit V CS Collector-emitter voltage (V G = ) 65 V I C Continuous collector current (T c = 1 C) 5 A I (1) CP Pulsed collector current (t p = 1 ms) 1 A V G Gate-emitter voltage ±2 V P TOT Total power dissipation of each IGBT (T C = 25 C, T J = 175 C) 28 W T JMAX Maximum junction temperature 175 C T Jop Operating junction temperature range under switching conditions -4 to 15 C 1. Pulse width limited by maximum junction temperature. Table 2. lectrical characteristics of the IGBT Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)CS Collector-emitter breakdown voltage I C = 1 ma, V G = V 65 V V C(sat) (terminal) Collector-emitter saturation voltage V G = 15 V, I C = 5 A V G = 15 V, I C = 5 A, T J = 15 C 2.3 V V G(th) Gate threshold voltage V C = V G, I C = 1 ma V I CS Collector cut-off current V G = V, V C = 65 V 1 µa I GS Gate-emitter leakage current V C = V, V G = ± 2 V ± 5 na C ies Input capacitance C V C = 25 V, f = 1 MHz, oes Output capacitance 17 pf C res Reverse transfer capacitance V G = V 415 pf 8 pf Q g Total gate charge V CC = 52 V, I C = 5 A, V G = ±15 V 15 nc t d(on) Turn-on delay time V CC = 3 V, I C = 5 A, 143 ns t r Current rise time R G = 6.8 Ω, V G = ±15 V, 16.5 ns (1) on Turn-on switching energy di/dt = 24 A/µs.14 mj t d(off) Turn-off delay time V CC = 3 V, I C = 5 A, 112 ns t f Current fall time R G = 6.8 Ω, V G = ±15 V, 149 ns (2) off Turn-off switching energy dv/dt = 76 V/µs 1.45 mj DS Rev 2 page 2/12
3 Diode Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time V CC = 3 V, I C = 5 A, 148 ns t r Current rise time R G = 6.8 Ω, V G = ±15 V, 19.2 ns (1) on Turn-on switching energy di/dt = 262 A/µs, T J = 15 C.311 mj t d(off) Turn-off delay time V CC = 3 V, I C = 5 A, 11 ns t f Current fall time R G = 6.8 Ω, V G = ±15 V, 221 ns (2) off Turn-off switching energy dv/dt = 58 V/µs, T J = 15 C 1.98 mj t SC Short-circuit withstand time V CC 36 V, V G 15 V, T Jstart 15 C 6 µs R THj-c R THc-h Thermal resistance junction-to-case Thermal resistance caseto-heatsink ach IGBT C/W ach IGBT, λ grease = 1 W/(m C).79 C/W 1. Including the reverse recovery of the diode. 2. Including the tail of the collector current. 1.2 Diode Limiting values at T j = 25 C, unless otherwise specified. Table 3. Absolute maximum ratings of the diode Symbol Parameter Value Unit V RRM Repetitive peak reverse voltage 65 V I F Continuous forward current at (T C = 1 C) 5 A I (1) FP Pulsed forward current (t p = 1 ms) 1 A T JMAX Maximum junction temperature 175 C T Jop Operating junction temperature range under switching conditions -4 to 15 C 1. Pulse width limited by maximum junction temperature. Table 4. lectrical characteristics of the diode Symbol Parameter Test conditions Min. Typ. Max. Unit V F (terminal) Forward voltage I F = 5 A I F = 5 A, T J = 15 C V t rr Reverse recovery time ns Q rr I rrm Reverse recovery charge Reverse recovery current I F = 5 A, V R = 3 V, V G = ±15 V, di/dt = 24 A/μs µc A rec Reverse recovery energy -.41 mj t rr Reverse recovery time - 26 ns Q rr Reverse recovery charge I F = 5 A, V R = 3 V, µc V G = ±15 V, di/dt = 262 A/μs, I rrm Reverse recovery current T J = 15 C - 58 A rec Reverse recovery energy mj DS Rev 2 page 3/12
4 NTC Symbol Parameter Test conditions Min. Typ. Max. Unit R THj-c R THc-h Thermal resistance junction-to-case Thermal resistance caseto-heatsink ach diode C/W ach diode, λ grease = 1 W/(m C) -.9 C/W 1.3 NTC Table 5. NTC temperature sensor, considered as stand-alone Symbol Parameter Test conditions Min. Typ. Max. Unit R 25 Resistance T = 25 C 5 kω R 1 Resistance T = 1 C 493 Ω ΔR/R Deviation of R % B 25/5 B-constant 3375 K B 25/8 B-constant 3411 K T Operating temperature range C Figure 1. NTC resistance vs temperature Figure 2. NTC resistance vs temperature, zoom R (Ω) GADG NTC R (Ω) GADG NTCZ max 6 min typ T C ( C) T C ( C) 1.4 Package Table 6. ACPACK 1 package Symbol Parameter Min. Typ. Max. Unit V isol Isolation voltage (AC voltage, t = 6 s) 25 V T stg Storage temperature C CTI Comparative tracking index 2 L s Stray inductance module P1 - W loop 28.7 nh R s Module single lead resistance, terminal-to-chip 3.9 mω DS Rev 2 page 4/12
5 lectrical characteristics (curves) 2 lectrical characteristics (curves) Figure 3. IGBT output characteristics (V G = 15 V, terminal) Figure 4. IGBT output characteristics (T J = 15 C, terminal) I c (A) 8 T J = 25 C IGBT TCH I C (A) V 17 V 15 V IGBT OC25 13 V 11 V 6 T J = 15 C V G = 9 V V C (V) V C (V) I C (A) Figure 5. IGBT transfer characteristics (V C = 15 V, terminal) 8 IGBT OC25 Figure 6. Switching energy vs gate resistance (mj) 4. IGBT SLG V CC = 3 V, I C = 5 A, V G = ±15 V ON (T J = 15 C) 6 T J = 25 C 3. OFF (T J = 15 C) ON (T J = 25 C) 4 2 T J = 15 C OFF (T J = 25 C) V G (V) R G (Ω) DS Rev 2 page 5/12
6 lectrical characteristics (curves) Figure 7. Switching energy vs collector current (mj) IGBT SLC V CC = 3 V, R G = 6.8 Ω, V G = ±15 V Figure 8. IGBT reverse biased safe operating area (RBSOA) I C (A) IGBT OC25 T J = 125 C, V G = ±15 V, R G = 6.8 Ω 3 OFF (T J = 15 C) OFF (T J = 25 C) ON (T J = 25 C) ON (T J = 15 C) I C (A) V C (V) Figure 9. Diode forward characteristics I F (A) 8 6 T J = 15 C IGBT DVF Figure 1. Diode reverse recovery energy vs diode current slope rec (mj) IGBT OC25 V C = 3 V, V G = ±15 V, I F = 5 A T J = 15 C 4 2 T J = 25 C VF (V).6.3 T J = 25 C di/dt (A/µs) Figure 11. Diode reverse recovery energy vs forward current Figure 12. Diode reverse recovery energy vs gate resistance rec IGBT RR (mj) V C = 3 V, V G = ±15 V, R G = 6.8 Ω rec (mj) IGBT RR V C = 3 V, V G = ±15 V, I F = 5 A T J = 15 C.9 T J = 15 C T J = 25 C.3 T J = 25 C I F (A) R G (Ω) DS Rev 2 page 6/12
7 lectrical characteristics (curves) Figure 13. Inverter diode thermal impedance Figure 14. IGBT thermal impedance Zth ( C/W) IGBT MT Zth ( C/W) IGBT MT Zth(typ.)JH Zth(typ.)JH 1 Zth(max.)JC 1 Zth(max.)JC JC RC - Foster thermal network i r i ( C/W) τ i(s) JC RC - Foster thermal network i r i ( C/W) τ i(s) JH RC - Foster thermal network i r i ( C/W) τ i(s) t (s) JH RC - Foster thermal network i ri ( C/W) τ i(s) t (s) DS Rev 2 page 7/12
8 Test circuits 3 Test circuits Figure 15. Test circuit for inductive load switching Figure 16. Gate charge test circuit C A A k k G L=1 µh + R G B B G C 3.3 µf D.U.T 1 µf V CC k k - k k AM15 4v 1 AM155v1 Figure 17. Switching waveform Figure 18. Diode reverse recovery waveform 9% VG 1% 9% VC Tr(Voff) Tcross 9% 1% 25 IC Td(on) Ton Tr(Ion) Td(off) Toff Tf 1% AM156v1 DS Rev 2 page 8/12
9 Topology and pin description 4 Topology and pin description Figure 19. lectrical topology and pin description P T1 G1 G3 G5 U V W T2 G2 G4 G6 U U V V W W Figure 2. Package top view with sixpack pinout DS Rev 2 page 9/12
10 Package information 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of COPACK packages, depending on their level of environmental compliance. COPACK specifications, grade definitions and product status are available at: COPACK is an ST trademark. 5.1 ACPACK 1 sixpack solder pins package information Figure 21. ACPACK 1 sixpack solder pins package outline (dimensions are in mm) 32. 'W W G4 V 'V U 'U 28.8 G6 G T1 T P 16. P 12.8 W W G5 V V G3 U U G BSC.64± ± ± ± ± RF 62.8±.5 48±.3 41± ±.2 53± ±.5 12±.35 Section B-B 2.3 RF ±.2 B 3.2 BSC B Detail A 2.5±.2 A A 3.5 RF x45 4.5±.1 GADG MT_ _4 The lead size includes the thickness of the lead plating material. Dimensions do not include mold protrusion. Package dimensions do not include any eventual metal burrs. DS Rev 2 page 1/12
11 Revision history Date Revision Changes 11-Oct Initial release. Table 7. Document revision history 16-Feb Updated features and removed maturity status indication from cover page. Updated Figure 13. Inverter diode thermal impedance and Figure 14. IGBT thermal impedance. Updated Figure 21. ACPACK 1 sixpack solder pins package outline (dimensions are in mm). Minor text changes DS Rev 2 page 11/12
12 IMPORTANT NOTIC PLAS RAD CARFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 218 STMicroelectronics All rights reserved DS Rev 2 page 12/12
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