NTP Clock Discipline Principles
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1 NTP Clck Discipline Principles David L. Mills University f Delaware mailt:mills@udel.edu Sir Jhn Tenniel; Alice s Adventures in Wnderland,Lewis Carrll 24-Aug-04 1
2 Traditinal apprach using phase-lck lp (PLL) Respnse t 10-ms Phase Step Respnse t 2-PPM Frequency Step Left graph shws the impulse respnse fr a 10-ms time step and 64-s pll interval using a traditinal linear PLL. Right graph shws the impulse respnse fr a 5-PPM frequency step and 64-s pll interval. It takes t lng t cnverge the lp using linear systems. A hybrid linear/nnlinear apprach may d much better. 24-Aug-04 2
3 Clck discipline design principles The clck discipline algrithm functins as a nnlinear, hybrid phase/frequency-lck (NHPFL) feedback lp. Detailed cmputer clck analysis yields the ptimum averaging interval depending n prevailing netwrk jitter and scillatr wander. Optimum value is determined in real time by measuring the jitter and wander separately. Clck state machine quickly cnverges time and frequency and suppresses transients resulting frm leap events, etc. Huff&puff algrithm crrects fr large utlyers and asymmetric delays Ppcrn spike suppressr clips nise spikes. 24-Aug-04 3
4 Clck discipline design apprach Phase nise due t netwrk jitter prevails at the lwer pll intervals, s a secnd-rder phase-lck lp (PLL) is the best frequency predictr. Frequency nise due t randm-walk scillatr wander prevails at the higher pll intervals, s a first-rder frequency-lck lp (FLL) is the best frequency predictr. A crafted heuristic algrithm is necessary t cmbine bth predictins. The NHPFL algrithm cmbines the time and frequency predictins in a seamless way fr pll intervals frm 16 secnds t 36 hurs. The PLL frequency adjustment is cmputed as the integral f past frequency ffsets. The FLL frequency adjustment is cmputed as the expnential average f past frequency ffsets. An additinal phase adjustment is necessary fr lp stabiility. The pll interval, which determines the lp time cnstant, is determined in respnse t measured jitter and wander. 24-Aug-04 4
5 Clck discipline algrithm NTP θ r + θ c Phase Detectr V d Clck Filter V s VFO Lp Filter x V c Clck Adjust y Phase/Freq Predictin V d is a functin f the NTP and VFO phase differences. V s depends n the stage chsen f the clck filter shift register. x is the phase crrectin and y the frequency adjustment cmputed by the predictin functins. The clck adjust prcess runs nce each secnd t adjust the VFO phase by V c. The lp behavir is determined by the lp filter parameters. 24-Aug-04 5
6 FLL/PLL predictin functins x Phase Crrect y FLL FLL Predict V s y Σ y PLL PLL Predict V s is the phase ffset prduced by the clck filter algrithm. x is the phase crrectin cmputed as the value f V s. y FLL is the frequency predictin cmputed as the average f past values f V s. y PLL is the frequency predictin cmputed as the integral f past values f V s. y FLL and y PLL are cmbined accrding t weight factrs determined by pll interval, update interval and Allan intercept. 24-Aug-04 6
7 Detailed calculatins The phase crrectin x and frequency predictins y PLL and y FLL are recalculated at each clck update. min( µ,2 y PLL = (4K 2 PLL τ ) θ τ ) 2 y FLL = K FLL θ max( µ, A The VFO adjustment V C is updated by the clck adjust prcess at nesecnd intervals. x dx = V y y dx x = x dx ζτ C = PLL + FLL + K PLL 2 x ) x = θ ζ = 1.2 ζ = 1 2 τ + 4 > A X therwise Cnstants Variables K PLL = 16 PLL gain τ pll interval (lg 2 ) K FLL = 8 FLL gain µ update interval A x = 1024s Allan intercept θ clck ffset θ ffset change since last update ζ damping factr 24-Aug-04 7
8 Pll adjust strategy Nte that as τ increases the phase nise φ P decreases with slpe 1, while the frequency nise φ F (τ << 1) increases with slpe Thus, the minimum errr is when φ P = φ F (τ << 1). (Remember that τ is lg 2 f the actual pll interval.) Thus, the strategy is: If φ P > φ F (τ << 1) and θ < K G φ P, increase the hysteresis cunter h by τ. If h > K H, set h = 0 and increase τ by ne. Else, decrease h by tw, in rder t adapt t rapid frequency changes. if h < -K H, set h = 0 and decrease τ by ne. Cnstants Variables K H = 30 hysteresis limit φ P average phase differences K G = 4 hysteresis threshld φ F average frequency differences h hysteresis cunter 24-Aug-04 8
9 State machine peratins There are three threshlds which affect the state machine. Panic threshld (1000 s): exit t the perating system if ffset exceeds. Step threshld (128 ms): ignre if ffset exceeds until steput. Steput threshld (900 s): interval within which step spikes are ignred. When the discipline is started fr the first time, set the time and calculate a pssibly large frequency crrectin. Subsequently when the discipline is started, set the time nly if the ffset exceeds the step threshld. When calculating the frequency crrectin, cntinue t the steput threshld in rder t prduce an accurate value, then set the time and frequency. Once the initial time and frequency have been set, run the HNPFL algrithm and the pll-adjust algrithm. Ignre transients greater than the step threshld, unless the steput threshld is exceeded. 24-Aug-04 9
10 Clck state machine transitin functin NSET FSET 0: n step 1: step 2: steput and n step 3: steput and step 0, 1: set time, sc 0: 1: set time 3: set time/freq 0, 1: FREQ 1: sc TSET 2: set freq, sc 0: PLL, sc 0: PLL, sc 2: 3: set time/freq 1: SYNC 0: PLL, sc SPIK 24-Aug-04 10
11 Frequency ffset and pll interval frm simulatr 24-Aug-04 11
12 Leap secnd insertin TAI UTC = 31 s B A 23:59:59 23:59:60 00:00:00 TAI UTC = 32 s 23:59:58 Hardware time is read frm the prcessr cycle cunter that increments in the lw nansecnd range. Sftware time may nt step backward; it must increment frward at least 1 ns fr every reading. The clck is stepped backward at leap secnd 23:59:59, but sftware time stays the same (A), unless the clck is read. At the end f the leap secnd 23:59:60 the clck is ahead (B) in nansecnds the number f times it was read. 24-Aug-04 12
13 Clck discipline algrithm perfrmance The algrithm cnverges time within 5 ms and frequency within 2 PPM in a very shrt time with pll intervals up t 10 (1024 s). Time t cnverge with n frequency file is less than 20 min. Time t cnverge with frequency file and n iburst is less than 4 min. Time t cnverge with frequency file and iburst is less than 10 s. Previus designs culd take days t achieve this perfrmance. Fllwing slides shw results frm a simulatr run fr typical LAN Initial scillatr frequency ffset -400 PPM with wander parameter 1 s/s. Initial time ffset 600 s with netwrk jitter parameter 1 ms. These are parameters typical fr 10 Mb Ethernets and cmputer scillatrs. The pll interval rapidly adapts t frequency changes. The frequency (blue) is in PPM. The pll interval (green) is in lg2(s) units. It increases slwly it jitter is greater than wander and decreases rapidly therwise. 24-Aug-04 13
14 Further infrmatin NTP hme page Current NTP Versin 3 and 4 sftware and dcumentatin FAQ and links t ther surces and interesting places David L. Mills hme page Papers, reprts and memranda in PstScript and PDF frmats Briefings in HTML, PstScript, PwerPint and PDF frmats Cllabratin resurces hardware, sftware and dcumentatin Sngs, pht galleries and after-dinner speech scripts Udel FTP server: ftp://ftp.udel.edu/pub/ntp Current NTP Versin sftware, dcumentatin and supprt Cllabratin resurces and junkbx Related prjects Current research prject descriptins and briefings 24-Aug-04 14
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