Applying Kirchoff s law on the primary circuit. V = - e1 V+ e1 = 0 V.D. e.m.f. From the secondary circuit e2 = v2. K e. Equivalent circuit :

Transcription

1

2 TRANSFORMERS Definitin : Transfrmers can be defined as a static electric machine which cnverts electric energy frm ne ptential t anther at the same frequency. It can als be defined as cnsists f tw electric circuits linked by a cmmn variable flux.

3

4 Thery f peratin : The primary cil f the transfrmer is cnnected t a supply f sine wave vltage. an alternating sine wave current will flw in the primary. thus the primary m.m.f ( N.I ) will prduce a cmmn flux ( g ) which is als alternating and in phase with the current accrding t Faraday s law the cmmn flux interesting tw cils will induce in them an alternating e.m.f ( e, e ). e e N d φ e - dt ( ) is an e.m.f f self inductin is an e.m.f f Mutual inductin e - N dφ dt ( ) frm, the transfrmatin rati e e K N N

5 Applying Kirchff s law n the primary circuit. V - e V+ e 0 e.m.f Frm the secndary circuit e v K e e Equivalent circuit : N N V.D V V

6 I 0 : 5 % f rated current. V E + I r + JI X V E + I r + JI X

7 Tansfrmer testing : Determinatin f parameters :

8 Cnnect the primary t a surce f alternating current at nmial vltage the secndary is pen circuit read the magnitude f ( I, V, P ) at n lad. The impeadence f the circuit at n lad. V I Z + Z Z << V Z 0 I Z Z Z Z << Z can be neglected p 0 r ( I ) r X Z + X Z r

9 -Anther methd: P V I is Z cs R φ V I 0 Z P VI cs φ φ cs Fr parallel circuit rm & JXm : Neglect Zm relatin t Z x I a I r φ r m Z I I cs V Ia sin φ cs φ sin φ - P V - V Xm Ir P V I

10 -Shrt circuit test:

11 Cnnect the primary t a reduced vltage ( frm 5 0 % f V ) until the primary current becmes near t the value f the full lad current f the primary. Shrt circuit the secndary winding. Measure ; ( V ) sh.c ( I ) sh.c ( P ) sh.c In the circuit Z, Z are cnnected in parallel Z is f the rder f ( 0 ) relative t Z S the effect f Z can be simplified t the shw figure ( c ). V I sh.c sh.c Z eq Where ; Zeq Req + Jxeq Req r + r x eq x + x

12 P φ ( ) sh.c sh.c x eq ( Z eq V)sh.c ( cs - sin φ I )sh.c ( csφ ) sh.c V P P I sh. c R eq Z eq r r X X r r K cs φ X x eq x k

13 D.C Test :

14 Cnnect the primary cil with a direct current supply. measure the applied vltage and the current. E I r hms The effect f X, X 0 will nt appear when using direct current X Ldi dt I is the cnst. relative t time ] als the effect f r will nt appear because it represent the eddy and hysteresis lsses which are nt existing in the case f direct current they appear nly when there is varialable flux in the cre. Similarly we can determine the resistance f the secndary ( r ) by cnnecting the battery t the terminals f the secndary cil.

15 Vltage regulatin : The vltage regulatin is defined as the change in the secndary vltage f a laded transfrmer when the lad is remved. while the primary vltage is cnstant at it s nminal value. E ( V ) n.l V lad In rder t enable the cmparisn between transfrmers f different wrking vltages, the vltage regulatin in usually expected as percent r a per unit value related t the secndary vltage at lad. usually the vltage regulatins is determined fr full lad cnditins. s t simplify equivalent circuit

16 ( ) V. - V ( ) n L L 00 % V.R V L ( ) V. - V ( ) n L L per unit V.R V L calculatin the effect f I0 is neglected and we get the fllwing simplified equivalent circuit and the crrespnding t it vectr diagram ( Kapp vectr diagram )

17 I neglected : I I Z q Req + JX eq ( r + r ) + J( X + X ) T calculate the vltage regulatin the fllwing value must be determined. V,I cs and Z eq. V V + IReq + JI Xeq V V + IReq + JI Xeq V ( ) ( ) Vcsφ IReq + V sinφ I Xeq Nte: ( V ) n.l V ε ε ε ( V ) n. l (V ) l (V ) l (K V ) n. l (KV ) l (KV ) l ( V ) n. l (V ) l (V ) l V V V -

18 where V is calculated by eq ( ) sme times the quantities knwn are V, I Cs g, Zeq in this case T find the vltage regulatin V we can calculated frm the gemetry as Nte : Parameters r, X, I, E as fllws : V ( ) V cs I R ( V sin I X ) eq + - eq φ φ Where ; I K I r k r, x k x E ke k N N E E V V I I

19 Transfrmer efficiency (η ) : P P utput input P in - lsses P in pcu ( r + r ) P cu I I I req I req This means that if the cu lsses are knwn at a certain lad ( current ), then the cpper lsses can be determined at anther lad. P P ( cu) ( cu) a b ( I ) a ( I )b I : nminal value ( full lad value ) usually the cpper lsses are determined frm a shrt circuit test at a current equal t the full lad r nminal value, accrdingly the equatin can be written as :

20 P ( Pcu) cu f. l ( I) ( I) f. l ( pcu) required ( pcu) I f. l If.l I let X If.l P cu required X ( Pcu) f.l Put ( K.V.A) ut csφ P ut + cnst. lss + culss ( K.V.A ) ut cs φ + P + Pcu ( K.V.A) ut csφ ( K.V.A) ut csφ + + cu p in - lsses p in P X ( K.V.A ) X ( K.V.A ) f.l csφ + f.l p Χ : P csφ + X ( p cu )f.l X ( K.V.A ) f.l csφ X ( K.V.A ) η f.l X ( cu ) f.l csφ p p

21

22 average efficiency fr the transfrmer during day ; η Ttal utput energy thrugh 4 hurs Ttal input energy thrugh 4 hurs the input energy f the transfrmer thrugh the day is equal t the Ttal ut put + Ttal lsses per/day. lsses are cnst. r magnetic ( P ) and are cnstant thrugh the day. the ( electrical r cu ) lsses are variable accrding t the lad ( I ). E.X : 00 K.V.A lighting transfrmer has a full lad lss f 3 K.V.A, the lsses being equally devided between irn and cpper. During a day the transfrmer perates, n full lad fr 3 hurs, ne half fr 4 hurs, the utput being negligible fr the reminder f the day calculate the all day efficiency.

23 Slutin : It shuld be nted that lighting transfrmers are taken t have a lad p.f f unity irn lsses fr 4 hurs.5 x 4 36 K.W.h ( cnst. lsses ) FL.cu lsses.5 K.W Cu lss fr 3 hurs n F.L.5 x k.w.h Cu lss fr half F.L.5 /4 k.w.h Cu lss fr 4 hurs at half the lad (.5 / 4 ) x 4.5 k.w.h Ttal lsses k.w.h Ttal utput ( 00 x3 ) + ( 50 x 4 ) 500 k.w.h η all day 500 x 00 / % Grup numbers : The grup number indicates the phase differience between primary and secndary ( H.T and L.T ) line vltages in electrical degrees. It is smetimes determined as a clck reading each hur is equivalent t 30 phase difference.

24 Y-Y Y cnnectis :

25

26 ( Y )

27 Parallel peratin : In pwer statin transfrmers are usually wrking in parallel in rder t enable the cnnectins r discnnectin f any number f them accrding t their required lad :- The fllwing cnditins must be fulfilled fr crrect parallel peratin :.the transfrmatins ratis must be the same.the grup number must be the same 3.the phase cnnectin must be in same sequence 4.shrt circuit impendence ( Zeq ) must be the same