Design Overview. Page 2. Page 3. Page 4. Page 5. LPC3154 Powering and Unused parts. LPC3154 Digital I/O. JTAG Interface

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1 Page Powering and Unused parts Design Overview Page Digital I/O LPC-Link External powering (+V) External powering (+.V) LPC00 Target Page JTAG Interface USB mini-b USB powering internal powering.v implementing JTAG interface JTAG interface LPC00 Expansion connector Page LPC00 with Expansion connector LED on GPIO External JTAG connector Can be disconnected LED on Superset of mbed connector Schematic page - Schematic page Schematic page - = UnLoaded = normally not mounted component. Default jumper settings are indicated in the schematic. However, always check jumper positions on actual boards since there is no guarantee that all jumpers are in default place.

2 Note: V rail is actually.v since internal regulator in default D PMEG00EJ D PMEG00EJ R 00K R 00K D PMBD000 u C C C TP_ C R TP_V TP_V TP_V C R C R C u u u n C C PSU_VBAT C C Power supply parts of H G E E H F C D D H G J G H D P P N P R J U A M H U A M U- PSU_VOUT PSU_VOUT PSU_VOUT PSU_VBAT PSU_VBAT PSU_VBAT PSU_VSSA_CLEAN PSU_LX PSU_LX PSU_VIN PSU_VSS PSU_VSSA UOS_VBAT UOS_VBUS UOS_VSS UOS_CX UOS_CX VDDI_0 VDDI_ VDDI_ VDDI_ VSSI_0 VSSI_ VSSI_ VSSI_ FSLOW_IN FSLOW_OUT RTC_INT RTC_BACKUP RTC_CLOCK_OUT RTC_VDD RTC_VSS CHARGE_VBUS CHARGE_VBAT CHARGE_BAT_SENSE CHARGE_VNTC CHARGE_CC_REF CHARGE_VSS VPP VDDE_0 VDDE_ VDDE_ VDDE_ VDDE_ VDDE_ VDDE_ VDDE_ VSSE_0 VSSE_ VSSE_ VSSE_ VSSE_ VSSE_ VSSE_ VSSE_ L L M K U L M J K K J K J C D M L U U A A G E N K U U A A L C 0n QP SI0X QN SI0X C C C C0 n n R C Production test connector OTP R OTP J Analog parts of Not used parts of C C IS_DATA_RX B A B C C R P P T R T R T N N N T R P U- ADC0B_VDDA ADC0B_A ADC0B_GPA0 ADC0B_GPA ADC0B_GPA ADC_MIC ADC_TINL ADC_TINR ADC_VINL ADC_VINR ADC_VREFP ADC_VREFN ADC_VREF ADC_VDDA ADC_VDDA ADC_A DAI_BCK0 DAI_WS0 DAI_DATA0 DAC_VREFP DAC_VREFN DAC_VDDA HP_OUTR HP_FCR HP_OUTL HP_FCL HP_VDDA NC HP_OUTC HP_VREF HP_A MDAO_CLK0 MDAO_BCK0 MDAO_WS0 MDAO_DATA0 F F C C B B C A D D E B T T R T C C J H H G F F E E D A C D E F G H K K L L L M B C D D U- EBI_D0 EBI_D EBI_D EBI_D EBI_D EBI_D EBI_D EBI_D EBI_D EBI_D EBI_D0 EBI_D EBI_D EBI_D EBI_D EBI_D EBI_DQM0_NOE EBI_NWE NAND_NCS0 NAND_NCS NAND_NCS NAND_NCS MNAND_RYBN0 MNAND_RYBN MNAND_RYBN MNAND_RYBN MLCD_DB0 MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB0 MLCD_DB MLCD_DB MLCD_DB MLCD_DB MLCD_DB EBI_A0_ALE EBI_A_CLE MLCD_RS MLCD_RW_WR MLCD_E_RD MLCD_CSB EBI_NCAS_BLOUT0 EBI_NRAS_BLOUT PWM_DATA CLOCK_OUT T P T R U P R T U P P U T U U R C A R T P R J J D0 M A B C F G P U B K B U- NC NC NC NC NC NC NC NC NC NC0 NC NC NC NC NC NC NC NC NC C G M B B A A B A

3 R USB.0 OTG Interface M C /00V LINE LINE D PRTRV0UX USB-DM USB-DP USB_ID R M R0 M C u C0 C ohm impedance routing, 0 ohm differential No tracks within 0 times trace width No via's and no sharp angles n n C L C C C R 0p BLMHG0SND 0 R C n C C R R T N N R T P N K P R T C0 A D C A D B R0 P0 P R U- USB_VDDA USB_VDDA_DRV USB_VDDA_PLL USB_DM USB_DP USB_ID USB_RREF USB_VSSA_REF USB_VSSA_TERM USB_A IC_SDA0 IC_SCL0 SPI_CS_IN UART_TXD MUART_CTS_N MUART_RTS_N Boot mode - USB via DFU class R GPIO0_BOOT0 GPIO_BOOT GPIO_BOOT R TRST_N TDI TMS TCK TDO JTAGSEL_ARM FFAST_IN FFAST_OUT VDDA VSSA RSTIN_N GPIO0 GPIO GPIO GPIO GPIO MGPIO MGPIO MGPIO MGPIO MGPIO MGPIO0 R R R R U T0 U U F U0 A0 B0 B C C0 E R T P D D D B C D B C JTAG--TRST JTAG--TDI JTAG--TMS JTAG--TCK JTAG--TDO JTAG--DBGEN R Y MHz C p C p K R K D BATC U ATDBD-SU LED RED R K K TP_RST R R R0 R R R R R R Starpoint at ball C on U GPIO0_BOOT0 GPIO_BOOT GPIO_BOOT GPIO_JTAG_SWD GPIO_SWD_TX GPIO_CLOCK GPIO_TMS GPIO_RESET_IN GPIO_RESET_OUT GPIO0_RESET_CNTRL Y Y R0 Placed on breakout section of pcb Not mounted R JTAG--TRSTY JTAG--TDIY JTAG--TMSY JTAG--TCKY JTAG--TDOY N_RESET-INY SI SO SCK CS# -JTAG U STMR RESET# SPI-FLASH RESET# WP# J 0 0 C LED R R R0 R GPIO_BOOT Q BSH

4 SWD/JTAG Interface SWDIO/TMS output cntrl SWDIO/TMS output GPIO_SWD_TX UA LVCAPW SWDIO input cntrl SWDIO input TMS output cntrl TMS output SWCLK/TCK output cntrl SWCLK/TCK output TDO input cntrl TDO input SWV input TDI output cntrl TDI output RESET input RESET output cntrl RESET output GPIO_JTAG_SWD GPIO_JTAG_SWD GPIO_TMS GPIO_CLOCK GPIO_JTAG_SWD GPIO_JTAG_SWD GPIO_RESET_IN GPIO0_RESET_CNTRL GPIO_RESET_OUT UD LVCAPW UA LVCAPW 0 UB LVCAPW UB LVCAPW UC LVCAPW UC LVCAPW 0 UA LVCAPW UD LVCAPW R 0 R 0 R 0 R 0 R 0 JTAG_TMS_SWDIO JTAG_TCLK_SWCLK JTAG_TDO_SWO JTAG_TDI JTAG_RESET JTAG_RTCK u C D PMEG00EA J 0 C R R UP J 0 R R R R R R R0 R R UP UP C C J not mounted, but can be if bridge wires below are cut. X JTAG_TMS_SWDIOX JTAG_TCLK_SWCLKX JTAG_TDO_SWOX JTAG_TDIX JTAG_RESETX X X X Bridge wires can be cut on pcb by removing solder paste. RTCK input IS_DATA_RX UB LVCAPW R0 0 J can connect to external SWD/JTAG interface if LPCXpresso target side (LPC00) is disconnected. UD LVCAPW UC LVCAPW 0

5 From LPC-Link Side LPC00 Target Side LPC00_V JTAG_TMS_SWDIOX JTAG_TCLK_SWCLKX JTAG_RESETX X R R R R K LPC-Link side Expansion Connector (superset of mbed pinning) X X -RED PIO0_-BLUE U LPC-TSSOP0 R VDD PIO0_0/ACMP_I/TDO PIO0_/ACMP_I/CLKIN/TDI C C0 SWDIO/PIO0_/TMS SWCLK/PIO0_/TCK PIO0_/WAKEUP RESET/PIO0_ X X PIO0_/VDDCMP PIO0_/XTALIN PIO0_/XTALOUT PIO0_0/SDA PIO0_/SCL PIO0_ PIO0_ PIO0_ PIO0_ VSS PIO0_ PIO0_ RGB-LED PIO0_-GREEN R K R R X X C pf RED ANODE Y MHz LED BLU X X R B G GRN C pf SJ SJ 0 0 PIO0_ SWDIO-PIO0_ SWCLK-PIO0_ PIO0_-ISP_TX PIO0_-RESET PIO0_ -RED PIO0_-XTALIN PIO0_-XTALOUT PIO0_0-SDA PIO0_-SCL PIO0_-ISP_EN PIO0_ PIO0_ PIO0_ PIO0_-BLUE PIO0_-GREEN PIO0_ PIO0_ Trimming pot. R X S A E R K mbed VIN (.-V) VB (battery supply) nr (reset) SPI-MOSI SPI-MISO SPI-SCK GPIO UART-TX / IC-SDA UART-RX / IC-SCL SPI-MOSI SPI-MISO SPI-SCL / UART-TX UART-RX AIN0 AIN AIN AIN / AOUT AIN AIN LPCXpresso VIN (.-.V) PIO0_ RESET PIO0_ MOSI PIO0_ MISO PIO0_ SCK PIO0_ SSEL PIO0_ TXD PIO0_0 RXD PIO0_ PIO0_ AIN PIO0_ PIO0_ SWDIO PIO0_ SWCLK X X PIO0_-RESET PIO0_ PIO0_ PIO0_-ISP_EN PIO0_ PIO0_-ISP_TX PIO0_ PIO0_ PIO0_ -RED SWDIO-PIO0_ SWCLK-PIO0_ Dual row holes (x), 00 mil spacing J- J- J- J- J- J- J- J- J- J-0 J- J- J- J- J- J- J- J- J- J-0 J- J- J- J- J- J- J- Prototype Area J- J- J-0 J- J- J- J- J- J- J- J- J- J-0 J- J- J- J- J- J- J- J- J- J-0 J- J- J- J- LPCXpresso X VOUT (+.V out) if self powered, else +.V input PIO0_ PIO0_ PIO0_0-SDA PIO0_0 IC-SDA PIO0_-SCL PIO0_ IC-SCL PIO0_ PIO0_ PIO0_-GREEN PIO0_ PIO0_-BLUE PIO0_ PIO_ PIO_ PIO_ PIO_ PIO_0 X mbed VOUT (.V out) VU (.0V USB out) IF+ IF- RD- (Ethernet) RD+ (Ethernet) TD- (Ethernet) TD+ (Ethernet) D- (USB) D+ (USB) CAN-RD CAN-TD UART-TX / IC-SDA UART-RX / IC-SCL PWMOUT0 PWMOUT PWMOUT PWMOUT PWMOUT PWMOUT UART header X X PIO0_-ISP_TX R R PIO0_-ISP_EN R J Not mounted CTS# -.V TXD (outp) RXD (inp) RTS# ISP-EN Use FTDI cable: CHD-DDHSP-0 (Do not use FTDI cable TTL-R-V, since out is +V on this cable) ISP-ENABLE jumper Ground ISP-EN to enable ISP mode PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD0 PAD PAD X PAD PAD PAD PAD PAD PAD PAD PAD0 PAD PAD PAD PAD