DSTINIs400/DSTINIs-00x Sockets Evaluation Board

Transcription

1 DSTINIs00/DSTINIs-00x Sockets Evaluation Board GENERAL DESCRIPTION The TINI sockets boards are motherboards designed to host the corresponding TINI evaluation module. The combination of the two boards allows full evaluation of the features of the target microprocessor. To evaluate the DS0C00, you only need to order the DS0C00-KIT. To evaluate the DS0C or DS0C, you must order both the DSTINIm# and the DSTINIs00# and use them together. The DSTINIm# is used to evaluate both the DS0C and DS0C. Although various boards support different evaluation modules, the most popular is the DSTINIs00#. It includes a -pin SODIMM connector and provides -Wire, CAN.0B, serial, and a /0 Ethernet PHY for connecting the DSTINIm00# or DSTINIm# to the physical world. The DSTINIm00# and DSTINIm# are designed as modules to be plugged into the -pin SODIMM connector on the DSTINIs00#. All are fully assembled and, when used together in the correct combinations, they form a complete evaluation system for the network microcontroller. The DSTINIm00# and DSTINIm# modules include the DS0C00 and DS0C network microcontrollers, a real-time clock, MB flash, MB static RAM, and support for an external Ethernet PHY for connecting to a wide variety of networks. Detailed information about the initial setup process and use of the TINI platform is contained in Application Note : Getting Started with the TINIm00 (DS0C00) Verification Module. ORDERING INFORMATION PART DSTINIs00 DSTINIs00# DSTINIs-00 DSTINIs-00 INPUT VOLTAGE* V DC regulated V DC regulated V to V DC USED WITH MODULE Replaced with DSTINIs00# DSTINIm00 DSTINI-MG, DSTINI- DSTINI-MG, DSTINI- DIMENSIONS cm x cm cm x cm cm x cm Note: The DSTINIm00 is an evaluation board and is only tested to prototype standards. It is not tested for use in a production product. *The user must supply an external power supply. # Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements. FEATURES Hosts the TINI Runtime Environment in Validated Hardware Design (in Conjunction with the DSTINIm00) /0 Base-T Ethernet Port Two Serial Ports Dual -Wire Network Ports CAN.0B Port.0V Single-Supply Operation (DSTINIm00) Fully Assembled and Tested Design COMPONENT LIST DESIGNATION QTY DESCRIPTION C pf capacitor (0) C, C, C, C μf tantalum capacitors (-) C, C, C, C, C, C, C, 0nF capacitors (0) C0, C C, C, C, C, C, C, nf capacitors (0) C, C, C C 0nF, V capacitor (0) C, C, C, C, C, C.0μF capacitors (0) C.μF capacitor (0) TINI and -Wire are registered trademarks of Maxim Integrated Products, Inc. of REV: 00

2 DSTINIs00/DSTINIs-00x Sockets Evaluation Board COMPONENT LIST (continued) DESIGNATION QTY DESCRIPTION C, C 0pF capacitor (0) C0, C, C nf, kv radial capacitors (ceramic disk) C, C pf capacitors (0) C0 0.μF ±%, 0V capacitor (0) D N0 D0-0 D BAT SOT D, D BATS SOT J SODIMM Molex -000 J.mm center,.mm outside barrel connector J J, J0, J, J Dual-row connectors, 0.0 square pins J RJ- modular jack J, J, J x -pin headers, 0. centers J DB serial female J DB serial male J Pad jumper J RJ modular jack L μh inductor Q BSS SIPMOS FET SOT R 0kΩ ±% resistor (0) R kω ±% resistor (0) R kω ±% resistor (0) R R, R, R, R, R.Ω ±% resistors (0) R, R Ω resistor (0) R.kΩ ±% resistor (0) R, R, R 0Ω resistors (0) DESIGNATION QTY DESCRIPTION R kω resistor (0) R Pad jumper R0 kω resistor (0) R Ω ±% resistor (0) R, R kω resistor (0) R kω resistor (0) T BelFuse S--T transformer U MAX PWM step-down regulator U Intel LXTALC Ethernet PHY U, U, U Dialight - LED U MAX0CAI transceiver U DS0B serial -Wire line driver U DS0 ESD protection diode U HVD0D CAN transceiver Y.000MHz, HCUS Z, Z, Z Ferrite bead, Fair-Rite 000Y UNPOPULATED COMPONENTS J DS0F ibutton Clip J, J, J, J0 Not used U MAXEUA linear regulator U DS0 -Wire -channel addressable switch U Not used ibutton is a registered trademark of Maxim Integrated Products, Inc. JUMPERS (DSTINIs00) Network Boot Jumper (J) JUMPER CONFIGURATION - DS0C00 attempts to boot through Ethernet using DHCP and TFTP DTR Reset Jumper (J) JUMPER CONFIGURATION - DTR reset communicates with the DS0C00 loader application. Quiet Boot Jumper (J) JUMPER CONFIGURATION - DS0C00 boots without sending loader information to serial port. of

3 DSTINIs00 Ethernet Configuration Jumpers (J, J, J) AUTO- SPEED NEGOTIATION (Mbps) DUPLEX J J J Disabled Half - (L) - (L) - (L) Full - (L) - (L) - (H) 0 Half - (L) - (H) - (L) Full - (L) - (H) - (H) Enabled 0 Only Half - (H) - (L) - (L) Full/Half - (H) - (L) - (H) /0 Half Only - (H) - (H) - (L) Full or Half - (H) - (H) - (H) PIN HEADERS CONNNECTOR J DESCRIPTION Recreated I/O Port. Latched from -Wire bus. Requires installation of DS0. See schematic. DSTINIs00/DSTINIs-00x Sockets Evaluation Board J0 J J CAN Bus. See schematic for pinout. SPI Bus. See schematic for pinout. Alternately provides connection to P. P. I C Bus. See schematic for pinout. Alternately provides connection to P.0 and P.. J, J, J0 Unused. No user-accessible pins available. QUICK START Recommended Equipment The sockets board requires an external power supply and cables as needed to access the desired features of the board. The V DC power supply is mandatory, but the other cables are required only if that feature is to be used. The specific example shown here is for a DSTINIm00#/DSTINIs00# system. Hardware: V DC Power Supply Input Voltage: per customer requirements Output Voltage: V DC ±% Output Current: >0mA Polarization: Positive Center Output Plug Type:.mm I.D. x.mm O.D. x mm female (P-) Example: Digi-Key ( part number T0-PP-ND (V input), V DC power Ethernet Cable: Note: There are two types of Ethernet cable. For connection to a router or hub, use a standard "straight-through" Ethernet cable. For direct connection to an Ethernet port on the back of a PC, use a "crossover" Ethernet cable. A crossover cable is specially made for two-computer networking. These cables can be purchased from almost any computer or electronics store. Example (straight-through): Radio Shack ( Cat E (ft) Network Cable, part number - Example (crossover): Radio Shack Cat E (m) Crossover Cable, part number -0 RS-C Serial Cable (DB Male to DB Female): This cable is straight-through, not a null-modem (crossover). These cables can be purchased from any computer or electronics store. of

4 DSTINIs00/DSTINIs-00x Sockets Evaluation Board Important Note Regarding U Component U is not placed on the product as supplied by Maxim, nor is it available for sale from Maxim. Inclusion of this component and related circuitry in the schematic is intended to demonstrate one method to add I/O expansion capability to the DSTINIs00, but the implementation details are left to the user; any modification of the product is not guaranteed or supported by Maxim. For more information on the possible uses of component U, refer to Application Note : Expanding TINI s I/O Capability and Application Note : TINIs00 External Serial Port Reference Design. MORE INFORMATION TINI platform details can be found at The TINI Specification and Developer s Guide (Addison-Welsey, 00) is an invaluable resource when developing with the TINI platform. Download a free copy from our website at ADDITIONAL RESOURCES For detailed information about the initial setup and use of the TINI platform, refer to Application Note : Getting Started with the TINIm00 (DS0C00) Verification Module at DS0C00 Network Microcontroller Data Sheet: DS0C Networked Microcontroller Data Sheet: DS0C00 Evaluation Kit (DS0C00-KIT): DSTINIm00 Networked Microcontroller Evaluation Board: DSTINIm Networked Microcontroller Evaluation Board: Microcontroller Website: SPI is a trademark of Motorola, Inc. of

5 REVISION HISTORY REVISION DATE DSTINIs00/DSTINIs-00x Sockets Evaluation Board PAGES DESCRIPTION CHANGED Updated the Component List., 00 Replaced the Auto Negotiation Jumper (J), /0Mb Ethernet Jumper (J), and Full-Duplex Jumper (J) sections with the DSTINIs00 Ethernet Configuration Jumpers (J, J, J) section. Added # to the end of DSTINIs00 references, 0 Updated Ordering Information table and added note that the DSTINIm00 is only tested to prototype standards. 000 Changed the DTR Reset Jumper (J) to DTR Reset Jumper (J) section. 00 In the Component List, changed the description for C, C, C, C; added (ceramic disk) to C0, C, C description., of Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.

6 D D C C B B A A P0 TxClk MDIO VCC TxD P P RxD RxD0 nrstout P0 COL TxEn P P P RxEr P MDC TxD nrstin P CRS P P P P R xclk R xdv RxD TxD RxD TxD0 P P P P nce0 nce nce D0 D D D D D D D npce npce npce0 npce nce nce nce nce nce P V0 V nrstin nrstout TxEn TxD[:0] TxClk RxDV RxClk RxEr RxD[:0] COL CRS MDC MDIO D[:0] LocalW nwr nrd ALE npsen A A A A A0 A npce[:0] nce[:] A A A A0 P P P0 P P P P0 P P P P P P P P P P P Size Document Number Rev Date: Sheet o f TINIs00 C TINIm00 Socket Board: TINI Module Connector B Wednesday, May, 00 Copyright (C) 00 Dallas Semiconductor / Maxim J DIMM GND GND VCC VCC A nrstin A nramen A A A A A A A0 npsen A A D D 0 D D D nflashen D A0 D A D0 P. 0 A P. A nramen A P. A P. P. P. 0 P. P.0 nrstout nea CRS TxEn COL RxEr RxDV MDC 0 MDIO GND GND TxD. TxD. TxD. TxD.0 GND GND TxClk 0 RxClk GND GND RxD.0 RxD. RxD. RxD. GND GND NC0 0 P.0 ALE P. P. P. npce NC npce P. npce0 0 NC npce nwr NC nrd NC P. NC NC NC0 0 NC NC NC NC P. P.0 A nce nce nce 0 nce0 P. P. A nce nce nce nce A NC A NC A NC NC LocalW NC vpullup NC NC0 0 NC NC NC NC NC NC NC NC NC NC0 0 NC NC NC NC NC NC NC NC NC NC0 0 VCC VCC GND GND

7 V0 V U L Z D D VCC VCC IN LX VDC +-% INPUT MALE MM POWER JACK Center Positive J C 0. uf + C uf 0. uf MAX C C 0. uf C + C uf C 0. uf V CONNECT FOR NET BOOT U P J OUT V C IN IN OUT C Pin RST SET.0uF.uF SHDN GND VCC MAXEUA EXTERNAL INTERRUPT B B J VCC P nextint P CONNECT FOR QUIET BOOT P DIAGNOSTIC PORT A J Copyright (C) 00 Dallas Semiconductor / Maxim A BSS R TINIm00 Socket Board: Power and Internals K Pin Size Document Number R e v A TINIs00 C Date: Thursday, May, 00 Sheet o f D C SHDN SYNC/PWM REF LIM FB BP uh R 0K % R K % C pf + C Bead uf + C uf N0 GND PGND Pin J Q Pin

8 D D C % % % % RJ- 0 pf. % 0.0 uf T R C TPIP R TxEn TX_EN TPIN TxClk R TX_CLK A_Gnd TxD TX_ER TxD[:0] 0 C. % TxD TXD R R 0 pf TxD TXD TxD0 TXD U TPOP. %. % TXD0 TPON 0 C R LXTALC 0.00 uf, kv C RxDV RX_DV C0 C C RxClk RX_CLK LED_CFG S T C RxEr RxD RX_ER LED_CFG 0.0 uf RxD RXD LED_CFG 0.00 uf, kv 0.00 uf, kv RxD RXD R J RxD0 RXD A_Gnd RBIAS Pad RXD0 RxD[:0] VCC MDC. K % U J MDC MDIO MDIO PHY MODE CONFIGURATION COL COL PAUSE R CRS CRS MDDIS TDI R MDINT TDO 0 nrstout K RESET TMS Pin R PWRDWN TCK 0 - Option TRST U VCC J B SLEW0 B SLEW XI R PHY MODE CONFIGURATION ADDR0 XO VCC Y 0 Pin MHz C C U VCC J VCC C 0.0 uf C 0. uf VCC Z BEAD C 0.0 uf A_Gnd C 0. uf /0-BASE-T ETHERNET PHY MODE CONFIGURATION A Copyright (C) 00 Dallas Semiconductor / Maxim A C C C C C C0 0.0 uf 0. uf 0.0 uf 0. uf 0.0 uf 0. uf R TINIm00 Socket Board: Ethernet Size Document Number R e v DECOUPLING CAPS FOR U 0 Ohm A TINIs00 C A_Gnd Date: Wednesday, May, 00 Sheet o f 0 GND GND GND GND GND GND GND GND GND GND GND GND GND TEST0 TEST VCCIO VCCIO VCCA VCCA 0 VCCD pf Z BEAD pf R 0 - R. Pin R. R. R. J

9 D D J C uf nshdn C uf C uf VCC + C uf TX0_ RX0_ DTR0_ C 0.0uF SERIAL PORT 0 DB FEMALE (DCE) C TX0 C P TIN TOUT P P P P0 P P DTR RTS TX RX0 RX CTS DTR0 DC D DCD_ P ROUT RIN B B TX_ SERIAL PORT CONNECT TO ENABLE RESET FROM DTR R0 K DTR_ RTS_ RX_ CTS_ J DB MALE (DTE) nrstin A Copyright (C) 00 Dallas Semiconductor / Maxim A TINIm00 Socket Board: Internal Serial Ports 0 and Size Document Number R e v A TINIs00 C Date: Wednesday, May, 00 Sheet o f C+ V+ VCC EN SHDN C+ C- C- + 0 TIN TIN TIN ROUT ROUT ROUT ROUT U MAX0CAI TOUT TOUT TOUT RIN RIN RIN RIN + GND V- + + J PAD JUMPER C uf

10 J I-BUTTON CLIP D D VCC LocalW DS0F D U POL VPP C C TX XOWIO P TXD OWIO C C RX P RXD NC NC NC A A J C 0.0 uf U DS0B BAT C 0. uf DS0 VCC J nextint VCC EXTERNAL -WIRE Pad Jumper B OWIO P0 B P P P + C I/O LINES WITH STROBE P NC P uf NC P NC P STRB J x A Copyright (C) 00 Dallas Semiconductor / Maxim A TINIm00 Socket Board: External -Wire Interface and DS0 Size Document Number R e v A TINIs00 C Date: Wednesday, May, 00 Sheet o f GND VDD RJ U GND VCC DS0

11 VCC J CONNECT TO TERMINATE C0 0. uf CAN BUS D D R J0 U C0TX P0 TXD CANH C0RX P RXD CANL VREF RS VCC SNHVD0 x C C npce[:0] npce0 npce npce npce SPI J x V0 V VCC VCC VCC VCC J J J J J B B nshdn R R VCC K K IC BUS Pad Jumper J R SDA P V K SCLK P VCC D VCC HEADER PINS, 0." BATS A Copyright (C) 00 Dallas Semiconductor / Maxim A TINIm00 Socket Board: Other I/O Size Document Number R e v A TINIs00 C Date: Wednesday, May, 00 Sheet o f GND VCC D BATS

12 V C C C V One 0 nf ceramic capacitor for each U V connection User I/O Date: Wednesday, May, 00 Sheet o f A A0 A A A A UIO XIO0 XIO A A A A0 UIO XIO XIO UIO XIO UIO0 UIO UIO UIO XIO XIO XIO TDO XIO UIO XIO UIO UIO UIO UIO 0nF 0nF 0nF D C C C nrstout 0nF 0nF J D 0nF 0nF 0nF UIO0 UIO UIO One 0 nf ceramic capacitor UIO for each U V connection UIO UIO UIO npsen IO GND UIO UIO nrd UIO0 IO IO XIO UIO UIO IO IO UIO0 UIO IO IO UIO UIO D[:0] D VAUX IO UIO UIO D IO IO0 0 UIO D IO GND UIO UIO D IO IO UIO UIO C D IO IO XIO UIO C D IO IO XIO UIO D IO IO UIO D0 IO 0 U IO XIO UIO IO XCC-VQ0C IO UIO nwr nce IO GND UIO UIO nce IO IO UIO UIO0 nce IO IO0 0 XIO UIO nce IO IO UIO UIO nce IO IO UIO IO Vb V V UIO UIO nce[:] 0 Vxx IO UIO UIO GND IO XIO UIO ALE UIO IO IO 0 UIO UIO UIO IO IO UIO UIO C IO IO UIO GND VIO V UIO0 UIO B Expanded I/O nf B UIO J XIO0 XIO One nf ceramic capacitor XIO for each U V connection UIO C0 C C XIO UIO V XIO nf nf nf 0 XIO UIO 0 Pin dual XIO C C One nf ceramic capacitor for XIO J0 each U V connection XIO nf nf XIO C C C XIO A XIO Pin nf nf nf A XIO A XIO TDO A0 XIO A XIO A0 A V Copyright (C) 00 Dallas Semiconductor / Maxim A A A A 0 Programmable I/O A nextint 0 Pin dual Size Document Number R e v P A DSTINIs00 C P C C Va IO IO IO IO0 GND IO IO IO IO IO IO VIO IO IO0 IO IO IO IO TDI IO TMS TCK IO IO0 GND 0 IO VIO IO IO IO IO IO IO IO IO0 0 IO VIO IO IO IO GND TDO IO IO IO0 0 IO IO IO IO