Study of DDR Asymmetric Rt/Ft in Existing IBIS-AMI Flow
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1 Study f DDR Asymmetric Rt/Ft in Existing IBIS-AMI Flw Asian IBIS Summit Tky, Japan Nvember 2th, 28 Wei-kai Shih, SPISim Wei-kai.Shih@spisim.cm Wei-hsing Huang, SPISim Wei-huang.Huang@spisim.cm
2 Agenda: Mtivatin Backgrund Asymmetric Rt/Ft AMI_Init AMI_GetWave Summary Q & A 2
3 Mtivatin IBIS-AMI analysis flws: Statistical: use impulse respnse and AMI_Init Time-dmain: use cnvlutin and mainly AMI_GetWave Existing applicatins fcused n SERDES Differential, centered arund V =. Symmetric rise-time (Rt) /fall-time (Ft) Hw DDR may wrk in existing AMI flw? Single-ended e.g. DQ Asymmetric Rt/Ft 3
4 Backgrund /2 Statistical AMI flw: [*] Impulse Respnse fr analg + channel (Linear Time Invariant, LTI) Samples -> PDF -> CDF -> BER/Eye 4 [*] IBIS Specificatin Sectin. ( CDF
5 Backgrund 2/2 Time-dmain AMI flw: Analg + channel s respnses t ne blck f bit-sequence Cnvlve with Tx/Rx s AMI_GetWave respectively 5
6 Asymmetric Rt/Ft t Impulse: Linear transfrm between Rt/Ft: Rise: y (t) = x t h t Fall: y 2 (t) = x 2 t h(t) Fall: x 2 (t) = x t Xfrm(t) => y 2 (t) = y t Xfrm(t) Simulatr knws y & y 2, thus Xfrm t. It can then recnstruct either y r y frm y 2 2 r y used in AMI_Init DC inf disappeared during differentiatin (t get impulse respnse). Has gap! Need specificatin change r new parameter t cnvert t single-ended. h(t) x (t) x 2 (t) y (t) y 2 (t) 6
7 Example: Matlab/Octave pseud-cde: Rise step respnse Fall step respnse (inverted) Nminal fall respnse Recnstructed fall respnse using rising respnse 7
8 Asymmetric Rt/Ft t Eye: Cnstruct different eyes prtins using eyes generated by rise respnse and fall respnse (different slew rate) Eye will be asymmetric as well. Nminal fall respnse Recnstructed fall respnse using rising respnse Real case: (IBIS + Lssy Channel) R F R F 8
9 ISI Eye Cnstructin with a Tree Structure 3 2 Cursr () - Let V n ab be the cntributin f ISI frm the nthpre cursr edge when the nth pre cursr=a and (n )th pre cursr=b, i.e. the nth pre cursr edge is an a b transitin When 2nd pre cursr lgic value =, cursr lgic value =, all pssible values fr the accumulated ISI frm 2nd and st pre cursrs can be put int a rw vectr : V 2 + V, V 2 + V. There are tw elements in the vectr due t tw pssible values f the st pre-cursr Extending t the 3 rd pre-cursr: When 3 rd pre-cursr =, there are 4 pssible accumulated ISI values V 3 + V 2 + V, V 3 + V 2 + V and V 3 + V 2 + V, V 3 + V 2 + V 9
10 Recursive Algrithm fr ISI Eye Cnstructin n n- n-2 Cursr () xxxxxxxxx W n ab : rw vectr cnsisting all pssible values f the accumulated ISI frm the nth pre cursr t cursr when lgic value f the nth pre cursr is a and lgic value at cursr is b W = V W = V W 2 = V 2 + V, V 2 + V W 2 = V 2 + V, V 2 + V. W n = V n + W n, V n + W n W n = V n + W n, V n + W n
11 PDF Cmputatin fr ISI Eye Wavefrm value PDF f the wavefrm value V n ab P Vn (ab)(v) = δ V V n ab Ntes W P W = P V () P W = P V () W n W n P Wn = 2 P W n P Vn V + 2 P W n P Vn P Wn = 2 P W n P Vn V + 2 P W n P Vn This is a Dirac delta when there is n jitter (ISI takes discrete value withut jitter) With jitter the Dirac delta will spread ut int a cntinuus distributin. But the recursive relatin remains same
12 Asymmetric Rt/Ft t GetWave: Result will be OK if: Bit-sequence wavefrm at Rx is simulated result frm bit-sequence input at Tx This may nt be the case mstly as it takes lnger t run. Simulated Result will have errrs if: Final wavefrm at Rx is frm ne bit simulated Rx respnse cnvlved with bit-sequence impulse at Tx Cnvlve with 2
13 Asymmetric Rt/Ft t GetWave: Bit using cnvlutin with symmetric Rt/Ft Glitch will happen fr asymmetric Rt/Ft 3
14 Asymmetric Rt/Ft t GetWave: Matlab/Octave pseud-cde: One bit respnses 4
15 Summary: Existing IBIS-AMI flw: Can be used fr driver with asymmetric Rt/Ft. Asymmetric effects can be handled within EDA tls/simulatr. Assuming AMI mdel des nt behave differently t rise/fall respnses. Statistical flw: Linear transfrm between rise/fall can be applied t mdel s respnse. Use rise and fall respnse t cnstruct eye. Tree/sequence based superpsitin will eliminate these glitches. 5 Time-dmain flw: Cnvlutin using ne bit pulse will have errrs. Using step repnse based superpsitin may avid such errrs.
16 EDA Expertise in Signal, Pwer Integrity & Simulatin 6 SPISim is an InSync member.
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