Comparing the Effects of Intermittent and Transient Hardware Faults on Programs
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1 Comparing the Effects of Intermittent and Transient Hardware Faults on Programs Jiesheng Wei, Layali Rashid, Karthik Pattabiraman and Sathish Gopalakrishnan Department of Electrical and Computer Engineering, the University of British Columbia
2 Motivation Consequences Gate Oxide Breakdown Electro-migration Crosstalk PolySi Gate Leak SiO2 Substrate Increase of intermittent faults [Constantinescu 03] Intermittent faults recur quickly [Nightingale 11] 2
3 Intermittent VS. Transient Faults Transient: burst length Time Intermittent: Time inactive time active time Permanent: Time 3
![Propagation of Intermittent Faults Intermittent Fault main: $SP[29]](/docs-images/93/111185428/images/4-0.jpg "$R1 ADDIU $SP[29],$SP[29],-24 SW $R30,16($SP[29]) Failure No effect")
4 Propagation of Intermittent Faults Intermittent Fault main: $SP[29] $R1 ADDIU $SP[29],$SP[29],-24 SW $R30,16($SP[29]) Failure No effect 4
5 Research Questions Do intermittent faults differ significantly with transients in their impact on software programs? If yes, how do the differences vary with the length (i.e., duration in cycles) of the fault? How do the differences vary with the micro-architectural unit in which the fault originates? 5
6 High-level Methodology Perform fault injection at µ-architectural level Study effect of the faults at software level Software level Architectural level µ-architectural level Failure Observation Observed failure: crash, hang, silent data corruption (SDC) Fault Injection Gate and circuit level 6
7 Outline Motivation and Overview Fault Model Experiment Setup Results Conclusion and Future Work 7
8 Outline Motivation and Overview Fault Model Experiment Setup Results Conclusion and Future Work 8
9 Fault Type Intermittent: stuck-at-0/1 for specified durations of time Transient: Burst length Time Intermittent: Time inactive time active time Burst length (fault length) Our model for intermittent: Time 9
10 Fault Injection Location Inject faults in a RISC processor from [Patterson 08] Inject only 1 bit of the selected signal 10
11 Outline Motivation and Overview Fault Model Experiment Setup Results Conclusion and Future Work 11
12 Experimental Infrastructure Fault injection framework: sim-outorder in SimpleScalar 12
13 Failure Detection Fault Fault injection Error Check Activation Crash Time No effect Failure Hang SDC 13
14 Benchmark Information 7 benchmark programs from Siemens suite [Hutchins 94] characteristics of the programs Lines of codes: < 1000 lines Dynamic instruction #: 9,000 ~ 240,000 14
15 Experimental Procedure Select a location Each location except Mult_o Select a type Bit-flip Stuck-at-0/1 Select a length 1 cycle 2, 5, 10, 25, 50, 100, 300, 800 cycles Run 1000 runs 15
16 Outline Motivation and Overview Fault Model Experiment Setup Results Conclusion and Future Work 16
17 Research Questions Review Do intermittent faults differ significantly with transients in their impact on software programs? If yes, how do the differences vary with the length (i.e., duration in cycles) of the fault? How do the differences vary with the micro-architectural unit in which the fault originates? 17
18 Impact of Faults on Programs Crash percentage: Stuck-at-1 > Transient > Stuck-at-0 Average crash percentage for different programs, 50 cycles for intermittent 18
19 Impact of Faults on Programs (cont.) SDC percentage: Similar to each other Average SDC percentage for different programs, 50 cycles for intermittent 19
20 Effects of Fault Length Intermittent: Crash percentage increases with the increase of fault length Average crash percentage for different lengths (print_tokens2) 20
21 Effects of Intermittent Fault Origin Crash percentage: Crash percentage different across different units The difference between two fault types are different across different units Crash percentage for different units(print_tokens2, 50 cycles) 21
22 Outline Motivation and Overview Fault Model Experiment Setup Results Conclusion and Future Work 22
23 Conclusion and Future Work Conclusion Do intermittent faults differ significantly with transients? Large difference in crash percentage Similar for hang and SDC percentages How do the differences vary with the fault length? Crash percentage increases with the increase of fault length How do the differences vary with the injected µ-architectural unit? The difference is dependent on fault origin location Future Work Consider other models for the two faults Develop intermittent-fault-tolerant software systems Study more complex processors 23
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