CRYOGENIC DRAM BASED MEMORY SYSTEM FOR SCALABLE QUANTUM COMPUTERS: A FEASIBILITY STUDY
|
|
- Hilary Tucker
- 6 years ago
- Views:
Transcription
1 CRYOGENIC DRAM BASED MEMORY SYSTEM FOR SCALABLE QUANTUM COMPUTERS: A FEASIBILITY STUDY MEMSYS-2017 SWAMIT TANNU DOUG CARMEAN MOINUDDIN QURESHI
2 Why Quantum Computers? 2 Molecule and Material Simulations Quantum computers provide large speedup for problems in material science, machine learning, and medicine Execution Time Billion Years Days Classical Computer Quantum Computer Problem Size Quantum Computers enable solutions to important problems
3 3 Qubits: Background State of a Classical Bit 1 or 0 two points on sphere Classical Bit Quantum computer use quantum bits (qubits) to encode the information
4 3 Qubits: Background State of a Classical Bit 1 or 0 two points on sphere Quantum Classical Bit Quantum computer use quantum bits (qubits) to encode the information
5 3 Qubits: Background State of a Classical Bit 1 or 0 two points on sphere Quantum Classical Bit State of a Quantum Bit Any point on the sphere Quantum computer use quantum bits (qubits) to encode the information
6 4 Organization of Quantum Computer Control Processor Qubits Quantum Computer
7 4 Organization of Quantum Computer Control Processor Qubits Quantum Computer
8 4 Organization of Quantum Computer Control Processor Qubits Quantum Computer
9 4 Organization of Quantum Computer Control Processor Qubits Quantum Computer Control Processor --Interface between Qubits & Programmer
10 5 Qubits are fickle No quantization small change in state lead to errors 1 Room temperature too noisy to operate 0 Classical Bit Quantum Bit Qubits are kept at extremely low temperature (~20mK)
11 5 Qubits are fickle No quantization small change in state lead to errors 1 Room temperature too noisy to operate 0 Classical Bit Quantum Bit Qubits are kept at extremely low temperature (~20mK)
12 5 Qubits are fickle No quantization small change in state lead to errors 1 Room temperature too noisy to operate 0 Classical Bit Quantum Bit Qubits are kept at extremely low temperature (~20mK)
13 Todays Quantum Computer Dilution Refrigerator 5 Qubit Chip (IBM) 20mK
14 Todays Quantum Computer Dilution Refrigerator 5 Qubit Chip (IBM) Qubits 20mK 5 Qubit Chip (IBM)
15 Cryogenic Control Processor 7 Control Processor 300K Qubits 20mK
16 Cryogenic Control Processor 7 Control Processor 300K Qubits 20mK
17 Cryogenic Control Processor 7 Control Processor 300K Large Thermal Gradient Metal Wires Thermal Leakage Qubits 20mK
18 Cryogenic Control Processor 7 Control Processor 300K Large Thermal Gradient Metal Wires Thermal Leakage Qubits 20mK
19 Cryogenic Control Processor 7 Control Processor 300K Control Processor 4K Large Thermal Gradient Metal Wires Thermal Leakage Qubits 20mK Qubits 20mK
20 Cryogenic Control Processor 7 Control Processor 300K Control Processor 4K Large Thermal Gradient Metal Wires Thermal Leakage Superconducting wires Low Leakage Qubits 20mK Qubits 20mK
21 Cryogenic Control Processor is essential for scalable Quantum Computer (Ref: D. Carmean, ISCA 16 Keynote) Cryogenic Control Processor 7 Control Processor 300K Control Processor 4K Large Thermal Gradient Metal Wires Thermal Leakage Superconducting wires Low Leakage Qubits 20mK Qubits 20mK
22 8 Memory for Quantum Computers Memory Control Processor Qubits Program Memory + Data Memory Stores Quantum Executable, Data, ECC-frames (~10s GB) Memory must be kept at cryo temperature to avoid large thermal gradient Josephson Junction technology works at 4K Limited memory density (only few Mb) Quantum Computer
23 8 Memory for Quantum Computers Memory Control Processor Qubits Program Memory + Data Memory Stores Quantum Executable, Data, ECC-frames (~10s GB) Memory must be kept at cryo temperature to avoid large thermal gradient Josephson Junction technology works at 4K Limited memory density (only few Mb) Quantum Computer
24 8 Memory for Quantum Computers Program Memory Data Memory Memory Control Processor Qubits Program Memory + Data Memory Stores Quantum Executable, Data, ECC-frames (~10s GB) Memory must be kept at cryo temperature to avoid large thermal gradient Josephson Junction technology works at 4K Limited memory density (only few Mb) Quantum Computer
25 8 Memory for Quantum Computers Program Memory Data Memory Memory Control Processor Qubits Program Memory + Data Memory Stores Quantum Executable, Data, ECC-frames (~10s GB) Memory must be kept at cryo temperature to avoid large thermal gradient Josephson Junction technology works at 4K Limited memory density (only few Mb) Quantum Computer Quantum computers require substantial memory capacity at cryo temperature
26 9 Does commodity DRAM work at cryogenic temperatures?
27 9 Does commodity DRAM work at cryogenic temperatures? Goal: To characterize DRAM at cryogenic temperature to understand the functionality and error patterns
28 10 Why Memory Fails at Cryogenic Temperature? Temperature
29 10 Why Memory Fails at Cryogenic Temperature? Temperature Carriers (e - )
30 10 Why Memory Fails at Cryogenic Temperature? Temperature Carriers (e - )
31 10 Why Memory Fails at Cryogenic Temperature? Temperature Carriers (e - ) Threshold Voltage
32 10 Why Memory Fails at Cryogenic Temperature? Temperature Carriers (e - ) Threshold Voltage Faults
33 10 Why Memory Fails at Cryogenic Temperature? Temperature Carriers (e - ) Threshold Voltage Faults At low temperatures, carrier freezeout can cause increase in threshold voltage worsens error rate
34 10 Why Memory Fails at Cryogenic Temperature? Temperature Carriers (e - ) Threshold Voltage Faults Minimum Operational Temperature (MOT) Minimum temperature for fault free operation At low temperatures, carrier freezeout can cause increase in threshold voltage worsens error rate
35 EXECUTIVE SUMMARY 11 Why Cryogenic DRAM? Experimental Setup & Challenges Observations
36 12 How to Test DRAM at Cryogenic Temperature? Conventional memory testing Memtest86 running on host, dedicated memory testers
37 12 How to Test DRAM at Cryogenic Temperature? Conventional memory testing Memtest86 running on host, dedicated memory testers Host machines or memory testers do not work at cryogenic temperatures
38 12 How to Test DRAM at Cryogenic Temperature? Conventional memory testing Memtest86 running on host, dedicated memory testers Host machines or memory testers do not work at cryogenic temperatures Need mechanism to reduce DIMM temperature without affecting tester
39 13 Isolated Cooling of DIMM Need cryogenic coolant Liquid Nitrogen (boils at 77K) Need isolated cooling of DIMMs Compact cryogenic heatsink
40 13 Isolated Cooling of DIMM Need cryogenic coolant Liquid Nitrogen (boils at 77K) Need isolated cooling of DIMMs Compact cryogenic heatsink
41 13 Isolated Cooling of DIMM Need cryogenic coolant Liquid Nitrogen (boils at 77K) Need isolated cooling of DIMMs Compact cryogenic heatsink DIMM is sandwiched between two heatsinks and can be cooled down to 80K
42 13 Isolated Cooling of DIMM Need cryogenic coolant Liquid Nitrogen (boils at 77K) Need isolated cooling of DIMMs Compact cryogenic heatsink DIMM is sandwiched between two heatsinks and can be cooled down to 80K Compact heatsink with Liquid Nitrogen provides isolated cooling of a DIMM
43 14
44 14
45 15 Challenges: Thermal Shock & Ice Condensation 300K Temperature (K) 80K Time Limit rate of cooling & use isolation chamber to reduce condensation
46 15 Challenges: Thermal Shock & Ice Condensation THERMAL SHOCK 300K Temperature (K) 80K Time Limit rate of cooling & use isolation chamber to reduce condensation
47 15 Challenges: Thermal Shock & Ice Condensation THERMAL SHOCK 300K Temperature (K) 80K Time Limit rate of cooling & use isolation chamber to reduce condensation
48 15 Challenges: Thermal Shock & Ice Condensation THERMAL SHOCK Temperature (K) 300K 80K Condensation Time Limit rate of cooling & use isolation chamber to reduce condensation
49 15 Challenges: Thermal Shock & Ice Condensation THERMAL SHOCK Temperature (K) 300K 80K Condensation Time Limit rate of cooling & use isolation chamber to reduce condensation
50 15 Challenges: Thermal Shock & Ice Condensation THERMAL SHOCK Temperature (K) 300K 80K Condensation Time Limit rate of cooling & use isolation chamber to reduce condensation
51 Experimental Methodology 16 Number of DIMMS 55 Verify memory functionality by using march-tests Number of Chips 750 Fault single bit fault in a burst Number of Vendors 5 MOT Minimum temperature at which no faults are observed
52 17 Minimum Operational Temperature for DIMMs Minimum Operating Temperature (K) % 90% 55% 18% % DIMMs are functional below 90K
53 17 Minimum Operational Temperature for DIMMs Minimum Operating Temperature (K) DIMM Failure! 100% 90% 55% 18% % DIMMs are functional below 90K
54 18 Chip Failures 8% Functional Chips 92% Faulty Chip 92% of chips worked at cryogenic conditions Pick cryogenic tolerant chips
55 Min Operational Temperature Vs Chip Capacity Mb 512 Mb 1 Gb 2 Gb 4 Gb Minimum Operating Temperature (K) MOT increases with capacity; capacity of chip is correlated to technology node
56 Min Operational Temperature Vs Chip Capacity Mb 512 Mb 1 Gb 2 Gb 4 Gb Minimum Operating Temperature (K) MOT increases with capacity; capacity of chip is correlated to technology node
57 20 Fault Granularity Single bit errors Uncorrelated faults Single bit fault % Linear codes (SECDED, BCH) are still effective Double bit fault 0.015% Uncorrelated faults Conventional ECC can be effective for Cryo DRAM
58 21 Transient Vs Permanent Faults Repeated faulty addresses = permanent error Unique faulty address = transient error DDR2 DDR3 DDR4 Permanent 64% Transient 36% Permanent 59% Transient 41% Permanen t 47% Transient 53% Permanent faults conventional sparing techniques can be used
59 22 Conclusion Quantum computers need dense memory at low temperature Does DRAM Work at cryogenic temperature? Experiments show most commodity DRAM chips work at 90K Error patterns are amenable to existing fault tolerance techniques
60 23 Questions?
61 23 Questions? Want to know more about quantum computers?
62 23 Questions? Want to know more about quantum computers? Please visit my paper presentation at MICRO 2017 In 2 weeks in Boston!
63 24 Backup slides
64 25
65 26
66 28 Most Chips Work at 80K 7% Faulty Chips per DIMM 92% Functional Chips One Faulty Chip Two Faulty Chips Three Faulty Chips Four Faulty Chips Only 8% of chips fail at 80K Pick cryo tolerant chips
IBM Systems for Cognitive Solutions
IBM Q Quantum Computing IBM Systems for Cognitive Solutions Ehningen 12 th of July 2017 Albert Frisch, PhD - albert.frisch@de.ibm.com 2017 IBM 1 st wave of Quantum Revolution lasers atomic clocks GPS sensors
More informationQuantum computing with superconducting qubits Towards useful applications
Quantum computing with superconducting qubits Towards useful applications Stefan Filipp IBM Research Zurich Switzerland Forum Teratec 2018 June 20, 2018 Palaiseau, France Why Quantum Computing? Why now?
More informationRevisiting Memory Errors in Large-Scale Production Data Centers
Revisiting Memory Errors in Large-Scale Production Da Centers Analysis and Modeling of New Trends from the Field Justin Meza Qiang Wu Sanjeev Kumar Onur Mutlu Overview Study of DRAM reliability: on modern
More informationDRAM Reliability: Parity, ECC, Chipkill, Scrubbing. Alpha Particle or Cosmic Ray. electron-hole pairs. silicon. DRAM Memory System: Lecture 13
slide 1 DRAM Reliability: Parity, ECC, Chipkill, Scrubbing Alpha Particle or Cosmic Ray electron-hole pairs silicon Alpha Particles: Radioactive impurity in package material slide 2 - Soft errors were
More informationThe Quantum Supremacy Experiment
The Quantum Supremacy Experiment John Martinis, Google & UCSB New tests of QM: Does QM work for 10 15 Hilbert space? Does digitized error model also work? Demonstrate exponential computing power: Check
More informationEECS150 - Digital Design Lecture 26 - Faults and Error Correction. Types of Faults in Digital Designs
EECS150 - Digital Design Lecture 26 - Faults and Error Correction April 25, 2013 John Wawrzynek 1 Types of Faults in Digital Designs Design Bugs (function, timing, power draw) detected and corrected at
More informationFeasibility of HTS DC Cables on Board a Ship
Feasibility of HTS DC Cables on Board a Ship K. Allweins, E. Marzahn Nexans Deutschland GmbH 10 th EPRI Superconductivity Conference Feasibility of HTS DC Cables on Board a Ship 1. Can superconducting
More informationThe D-Wave 2X Quantum Computer Technology Overview
The D-Wave 2X Quantum Computer Technology Overview D-Wave Systems Inc. www.dwavesys.com Quantum Computing for the Real World Founded in 1999, D-Wave Systems is the world s first quantum computing company.
More informationEECS150 - Digital Design Lecture 26 Faults and Error Correction. Recap
EECS150 - Digital Design Lecture 26 Faults and Error Correction Nov. 26, 2013 Prof. Ronald Fearing Electrical Engineering and Computer Sciences University of California, Berkeley (slides courtesy of Prof.
More informationUNIVERSITY OF MASSACHUSETTS Dept. of Electrical & Computer Engineering. Fault Tolerant Computing ECE 655
UNIVERSITY OF MASSACHUSETTS Dept. of Electrical & Computer Engineering Fault Tolerant Computing ECE 655 Part 1 Introduction C. M. Krishna Fall 2006 ECE655/Krishna Part.1.1 Prerequisites Basic courses in
More informationBuilding Quantum Computers: Is the end near for the silicon chip?
Building Quantum Computers: Is the end near for the silicon chip? Presented by Dr. Suzanne Gildert University of Birmingham 09/02/2010 What is inside your mobile phone? What is inside your mobile phone?
More informationPost Von Neumann Computing
Post Von Neumann Computing Matthias Kaiserswerth Hasler Stiftung (formerly IBM Research) 1 2014 IBM Corporation Foundation Purpose Support information and communication technologies (ICT) to advance Switzerland
More informationECE-470 Digital Design II Memory Test. Memory Cells Per Chip. Failure Mechanisms. Motivation. Test Time in Seconds (Memory Size: n Bits) Fault Types
ECE-470 Digital Design II Memory Test Motivation Semiconductor memories are about 35% of the entire semiconductor market Memories are the most numerous IPs used in SOC designs Number of bits per chip continues
More informationINTRODUCTION TO SUPERCONDUCTING QUBITS AND QUANTUM EXPERIENCE: A 5-QUBIT QUANTUM PROCESSOR IN THE CLOUD
INTRODUCTION TO SUPERCONDUCTING QUBITS AND QUANTUM EXPERIENCE: A 5-QUBIT QUANTUM PROCESSOR IN THE CLOUD Hanhee Paik IBM Quantum Computing Group IBM T. J. Watson Research Center, Yorktown Heights, NY USA
More information1500 AMD Opteron processor (2.2 GHz with 2 GB RAM)
NICT 2019 2019 2 7 1 RSA RSA 2 3 (1) exp $ 64/9 + *(1) (ln 0) 1/2 (ln ln 0) 3/2 (2) 2009 12 768 (232 ) 1500 AMD Opteron processor (2.2 GHz with 2 GB RAM) 4 (3) 18 2 (1) (2) (3) 5 CRYPTREC 1. 2. 3. 1024,
More informationphys4.20 Page 1 - the ac Josephson effect relates the voltage V across a Junction to the temporal change of the phase difference
Josephson Effect - the Josephson effect describes tunneling of Cooper pairs through a barrier - a Josephson junction is a contact between two superconductors separated from each other by a thin (< 2 nm)
More informationLecture 2: Metrics to Evaluate Systems
Lecture 2: Metrics to Evaluate Systems Topics: Metrics: power, reliability, cost, benchmark suites, performance equation, summarizing performance with AM, GM, HM Sign up for the class mailing list! Video
More informationQuantum Technology 101: Overview of Quantum Computing and Quantum Cybersecurity
Quantum Technology 0: Overview of Quantum Computing and Quantum Cybersecurity Warner A. Miller* Department of Physics & Center for Cryptography and Information Security Florida Atlantic University NSF
More informationQuantum Computing. Separating the 'hope' from the 'hype' Suzanne Gildert (D-Wave Systems, Inc) 4th September :00am PST, Teleplace
Quantum Computing Separating the 'hope' from the 'hype' Suzanne Gildert (D-Wave Systems, Inc) 4th September 2010 10:00am PST, Teleplace The Hope All computing is constrained by the laws of Physics and
More informationD-Wave: real quantum computer?
D-Wave: real quantum computer? M. Johnson et al., "Quantum annealing with manufactured spins", Nature 473, 194-198 (2011) S. Boixo et al., "Evidence for quantum annealing wiht more than one hundred qubits",
More informationLecture 5 Fault Modeling
Lecture 5 Fault Modeling Why model faults? Some real defects in VLSI and PCB Common fault models Stuck-at faults Single stuck-at faults Fault equivalence Fault dominance and checkpoint theorem Classes
More informationTradeoff between Reliability and Power Management
Tradeoff between Reliability and Power Management 9/1/2005 FORGE Lee, Kyoungwoo Contents 1. Overview of relationship between reliability and power management 2. Dakai Zhu, Rami Melhem and Daniel Moss e,
More informationLectures on Fault-Tolerant Quantum Computation
Lectures on Fault-Tolerant Quantum Computation B.M. Terhal, IBM Research I. Descriptions of Noise and Quantum States II. Quantum Coding and Error-Correction III. Fault-Tolerant Error-Correction. Surface
More informationMoores Law for DRAM. 2x increase in capacity every 18 months 2006: 4GB
MEMORY Moores Law for DRAM 2x increase in capacity every 18 months 2006: 4GB Corollary to Moores Law Cost / chip ~ constant (packaging) Cost / bit = 2X reduction / 18 months Current (2008) ~ 1 micro-cent
More informationCryogenic Characterization of 28 nm Bulk CMOS Technology for Quantum Computing
Cryogenic Characterization of 8 nm Bulk CMOS Technology for Quantum Computing Arnout Beckers, Farzan Jazaeri, Andrea Ruffino, Claudio Bruschini, Andrea Baschirotto, and Christian Enz Integrated Circuits
More informationQuantum Computation. Dr Austin Fowler Centre for Quantum Computer Technology. New Scientist, 10/11/07
Quantum Computation Dr Austin Fowler Centre for Quantum Computer Technology New Scientist, 10/11/07 Overview what is a quantum computer? bits vs qubits superpositions and measurement implementations why
More informationQuantum Computing Professor Andrew M. Steane Oxford University
Quantum Computing The Laws of ature, or How everything works Professor Andrew M. teane Oxford University Computers and how they work Popular Mechanics magazine, March 1949: "Where a calculator on the Eniac
More informationLecture 2, March 2, 2017
Lecture 2, March 2, 2017 Last week: Introduction to topics of lecture Algorithms Physical Systems The development of Quantum Information Science Quantum physics perspective Computer science perspective
More informationWhat is a quantum computer? Quantum Architecture. Quantum Mechanics. Quantum Superposition. Quantum Entanglement. What is a Quantum Computer (contd.
What is a quantum computer? Quantum Architecture by Murat Birben A quantum computer is a device designed to take advantage of distincly quantum phenomena in carrying out a computational task. A quantum
More informationHow can ideas from quantum computing improve or speed up neuromorphic models of computation?
Neuromorphic Computation: Architectures, Models, Applications Associative Memory Models with Adiabatic Quantum Optimization Kathleen Hamilton, Alexander McCaskey, Jonathan Schrock, Neena Imam and Travis
More informationShort Course in Quantum Information Lecture 8 Physical Implementations
Short Course in Quantum Information Lecture 8 Physical Implementations Course Info All materials downloadable @ website http://info.phys.unm.edu/~deutschgroup/deutschclasses.html Syllabus Lecture : Intro
More informationLEADING THE EVOLUTION OF COMPUTE MARK KACHMAREK HPC STRATEGIC PLANNING MANAGER APRIL 17, 2018
LEADING THE EVOLUTION OF COMPUTE MARK KACHMAREK HPC STRATEGIC PLANNING MANAGER APRIL 17, 2018 INTEL S RESEARCH EFFORTS COMPONENTS RESEARCH INTEL LABS ENABLING MOORE S LAW DEVELOPING NOVEL INTEGRATION ENABLING
More informationDesign Considerations for Integrated Semiconductor Control Electronics for a Large-scale Solid State Quantum Processor
Design Considerations for Integrated Semiconductor Control Electronics for a Large-scale Solid State Quantum Processor Hendrik Bluhm Andre Kruth Lotte Geck Carsten Degenhardt 1 0 Ψ 1 Quantum Computing
More informationPHASE CHANGE. Freezing Sublimation
Melting Graphic Organizer Deposition PHASE CHANGE Freezing Sublimation Boiling Evaporation Condensation PHASE CHANGE Phase change happens as the temperature changes. All matter can move from one state
More informationvon Neumann Architecture
Computing with DNA & Review and Study Suggestions 1 Wednesday, April 29, 2009 von Neumann Architecture Refers to the existing computer architectures consisting of a processing unit a single separate storage
More informationThis is a repository copy of Unite to build a quantum internet. White Rose Research Online URL for this paper:
This is a repository copy of Unite to build a quantum internet. White Rose Research Online URL for this paper: http://eprints.whiterose.ac.uk/98773/ Version: Accepted Version Article: Pirandola, Stefano
More informationKeywords: Superconducting Fault Current Limiter (SFCL), Resistive Type SFCL, MATLAB/SIMULINK. Introductions A rapid growth in the power generation
IJESRT INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY Performance of a 3.3kV Resistive type Superconducting Fault Current Limiter S.Vasudevamurthy 1, Ashwini.V 2 1 Department of Electrical
More informationESE 570: Digital Integrated Circuits and VLSI Fundamentals
ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 19: March 29, 2018 Memory Overview, Memory Core Cells Today! Charge Leakage/Charge Sharing " Domino Logic Design Considerations! Logic Comparisons!
More informationFault Tolerate Linear Algebra: Survive Fail-Stop Failures without Checkpointing
20 Years of Innovative Computing Knoxville, Tennessee March 26 th, 200 Fault Tolerate Linear Algebra: Survive Fail-Stop Failures without Checkpointing Zizhong (Jeffrey) Chen zchen@mines.edu Colorado School
More informationStatus and Progress of a Fault Current Limiting HTS Cable To Be Installed In The Consolidated Edison Grid
Status and Progress of a Fault Current Limiting HTS Cable To Be Installed In The Consolidated Edison Grid J. Yuan, J. Maguire, D. Folts, N. Henderson, American Superconductor D. Knoll, Southwire M. Gouge,
More informationScalable Cryogenic Control Systems for Quantum Computers
SCIENCE Electronic ZEA-2 Systems Engineering Needs and Challenges in Scalable Cryogenic Control Systems for Quantum Computers Central Institute of Engineering, Electronics and Analytics ZEA-2: Electronic
More informationMTJ-Based Nonvolatile Logic-in-Memory Architecture and Its Application
2011 11th Non-Volatile Memory Technology Symposium @ Shanghai, China, Nov. 9, 20112 MTJ-Based Nonvolatile Logic-in-Memory Architecture and Its Application Takahiro Hanyu 1,3, S. Matsunaga 1, D. Suzuki
More informationDetection of Variable Retention Time in DRAM
Portland State University PDXScholar Dissertations and Theses Dissertations and Theses Fall 11-19-2014 Detection of Variable Retention Time in DRAM Neraj Kumar Portland State University Let us know how
More informationIntel s approach to Quantum Computing
Intel s approach to Quantum Computing Dr. Astrid Elbe, Managing Director Intel Lab Europe Quantum Computing: Key Concepts Superposition Classical Physics Quantum Physics v Heads or Tails Heads and Tails
More informationEE115C Winter 2017 Digital Electronic Circuits. Lecture 6: Power Consumption
EE115C Winter 2017 Digital Electronic Circuits Lecture 6: Power Consumption Four Key Design Metrics for Digital ICs Cost of ICs Reliability Speed Power EE115C Winter 2017 2 Power and Energy Challenges
More information! Charge Leakage/Charge Sharing. " Domino Logic Design Considerations. ! Logic Comparisons. ! Memory. " Classification. " ROM Memories.
ESE 57: Digital Integrated Circuits and VLSI Fundamentals Lec 9: March 9, 8 Memory Overview, Memory Core Cells Today! Charge Leakage/ " Domino Logic Design Considerations! Logic Comparisons! Memory " Classification
More informationBuilding Blocks for Quantum Computing Part IV. Design and Construction of the Trapped Ion Quantum Computer (TIQC)
Building Blocks for Quantum Computing Part IV Design and Construction of the Trapped Ion Quantum Computer (TIQC) CSC801 Seminar on Quantum Computing Spring 2018 1 Goal Is To Understand The Principles And
More informationFrom Niels Bohr to Quantum Computing - from philosophical struggle to technological revolution
From Niels Bohr to Quantum Computing - from philosophical struggle to technological revolution IPAC 2017 Intel Pentium QuadCore processor, 3.5 GHz, 3 GB SDRAM. Quantum computer Processor unknown 1000 Hz
More informationTurbulence Simulations
Innovatives Supercomputing in Deutschland Innovative HPC in Germany Vol. 14 No. 2 Autumn 2016 Turbulence Simulations The world s largest terrestrial & astrophysical applications Vice World Champion HLRS
More informationDC Circuits I. Physics 2415 Lecture 12. Michael Fowler, UVa
DC Circuits I Physics 2415 Lecture 12 Michael Fowler, UVa Today s Topics Mention of AC Semiconductors and superconductors Battery emf, internal resistance Series and parallel resistances Kirchhoff s rules
More informationSupercondcting Qubits
Supercondcting Qubits Patricia Thrasher University of Washington, Seattle, Washington 98195 Superconducting qubits are electrical circuits based on the Josephson tunnel junctions and have the ability to
More informationChapter 1. Binary Systems 1-1. Outline. ! Introductions. ! Number Base Conversions. ! Binary Arithmetic. ! Binary Codes. ! Binary Elements 1-2
Chapter 1 Binary Systems 1-1 Outline! Introductions! Number Base Conversions! Binary Arithmetic! Binary Codes! Binary Elements 1-2 3C Integration 傳輸與介面 IA Connecting 聲音與影像 Consumer Screen Phone Set Top
More informationLogical error rate in the Pauli twirling approximation
Logical error rate in the Pauli twirling approximation Amara Katabarwa and Michael R. Geller Department of Physics and Astronomy, University of Georgia, Athens, Georgia 30602, USA (Dated: April 10, 2015)
More informationAnalysis of the Tradeoffs between Energy and Run Time for Multilevel Checkpointing
Analysis of the Tradeoffs between Energy and Run Time for Multilevel Checkpointing Prasanna Balaprakash, Leonardo A. Bautista Gomez, Slim Bouguerra, Stefan M. Wild, Franck Cappello, and Paul D. Hovland
More informationIBM Q: building the first universal quantum computers for business and science. Federico Mattei Banking and Insurance Technical Leader, IBM Italy
IBM Q: building the first universal quantum computers for business and science Federico Mattei Banking and Insurance Technical Leader, IBM Italy Agenda Which problems can not be solved with classical computers?
More informationQuantum Computing: Great Expectations
Quantum Computing: Great Expectations Quantum Computing for Nuclear Physics Workshop Dave Bacon dabacon@google.com In a Galaxy Seven Years Ago... 0.88 fidelity 0.78 fidelity (2010) fidelities: 14 qubits:
More informationA Quantum von Neumann Architecture for Large-Scale Quantum Computing
A Quantum von Neumann Architecture for Large-Scale Quantum Computing Matthias F. Brandl Institut für Experimentalphysik, Universität Innsbruck, Technikerstraße 25, A-6020 Innsbruck, Austria November 15,
More informationSelf-Check. change in pressure. 6. I can explain how the volume of a gas is changed by a change in temperature S. Coates
Self-Check YES NO 1. I can describe how atoms move in a solid, liquid, and gas 2. I can describe the speed/energy of the atoms in a solid, liquid, and gas. 3. I can explain how the distance between atoms
More informationLecture on Memory Test Memory complexity Memory fault models March test algorithms Summary
Lecture on Memory Test Memory complexity Memory fault models March test algorithms Summary Extracted from Agrawal & Bushnell VLSI Test: Lecture 15 1 % of chip area Importance of memories Memories dominate
More informationDeveloping a commercial superconducting quantum annealing processor
Developing a commercial superconducting quantum annealing processor 30th nternational Symposium on Superconductivity SS 2017 Mark W Johnson D-Wave Systems nc. December 14, 2017 ED4-1 Overview ntroduction
More informationEECS150 - Digital Design Lecture 23 - FFs revisited, FIFOs, ECCs, LSFRs. Cross-coupled NOR gates
EECS150 - Digital Design Lecture 23 - FFs revisited, FIFOs, ECCs, LSFRs April 16, 2009 John Wawrzynek Spring 2009 EECS150 - Lec24-blocks Page 1 Cross-coupled NOR gates remember, If both R=0 & S=0, then
More informationMotivation Subgradient Method Stochastic Subgradient Method. Convex Optimization. Lecture 15 - Gradient Descent in Machine Learning
Convex Optimization Lecture 15 - Gradient Descent in Machine Learning Instructor: Yuanzhang Xiao University of Hawaii at Manoa Fall 2017 1 / 21 Today s Lecture 1 Motivation 2 Subgradient Method 3 Stochastic
More informationSP-CNN: A Scalable and Programmable CNN-based Accelerator. Dilan Manatunga Dr. Hyesoon Kim Dr. Saibal Mukhopadhyay
SP-CNN: A Scalable and Programmable CNN-based Accelerator Dilan Manatunga Dr. Hyesoon Kim Dr. Saibal Mukhopadhyay Motivation Power is a first-order design constraint, especially for embedded devices. Certain
More information8.21 The Physics of Energy Fall 2009
MIT OpenCourseWare http://ocw.mit.edu 8.21 The Physics of Energy Fall 2009 For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms. 8.21 Lecture 10 Phase Change
More informationQuantum Computing: From Science to Application Dr. Andreas Fuhrer Quantum technology, IBM Research - Zurich
Quantum Computing: From Science to Application Dr. Andreas Fuhrer Quantum technology, IBM Research - Zurich IBM Research - Zurich Established in 1956 Focus: science & technology, systems research, computer
More informationQuantum entanglement in the 21 st century
Quantum entanglement in the 21 st century Algorithms Error Correction Matter Spacetime Three Questions About Quantum Computers 1. Why build one? How will we use it, and what will we learn from it? A quantum
More informationDesigning Information Devices and Systems I Fall 2015 Anant Sahai, Ali Niknejad Homework 8. This homework is due October 26, 2015, at Noon.
EECS 16A Designing Information Devices and Systems I Fall 2015 Anant Sahai, Ali Niknejad Homework 8 This homework is due October 26, 2015, at Noon. 1. Nodal Analysis Or Superposition? (a) Solve for the
More informationProspects for Superconducting Qubits. David DiVincenzo Varenna Course CLXXXIII
Prospects for Superconducting ubits David DiVincenzo 26.06.2012 Varenna Course CLXXXIII uantum error correction and the future of solid state qubits David DiVincenzo 26.06.2012 Varenna Course CLXXXIII
More informationStatistics and Quantum Computing
Statistics and Quantum Computing Yazhen Wang Department of Statistics University of Wisconsin-Madison http://www.stat.wisc.edu/ yzwang Workshop on Quantum Computing and Its Application George Washington
More informationSystem Roadmap. Qubits 2018 D-Wave Users Conference Knoxville. Jed Whittaker D-Wave Systems Inc. September 25, 2018
System Roadmap Qubits 2018 D-Wave Users Conference Knoxville Jed Whittaker D-Wave Systems Inc. September 25, 2018 Overview Where are we today? annealing options reverse annealing quantum materials simulation
More informationResource Efficient Design of Quantum Circuits for Quantum Algorithms
Resource Efficient Design of Quantum Circuits for Quantum Algorithms Himanshu Thapliyal Department of Electrical and Computer Engineering University of Kentucky, Lexington, KY hthapliyal@uky.edu Quantum
More informationQuantum Computing at IBM
Quantum Computing at IBM Ivano Tavernelli IBM Research - Zurich Quantum Computing for High Energy Physics CERN -Geneva November 5-6, 2018 Outline Why quantum computing? The IBM Q Hardware The IBM Q Software
More informationUnsupervised Machine Learning on a Hybrid Quantum Computer Johannes Otterbach. Bay Area Quantum Computing Meetup - YCombinator February 1, 2018
Unsupervised Machine Learning on a Hybrid Quantum Computer Johannes Otterbach Bay Area Quantum Computing Meetup - YCombinator February 1, 2018 Full Stack Quantum Computing Quantum Processor Hardware Cloud
More informationNanoelectronics. Topics
Nanoelectronics Topics Moore s Law Inorganic nanoelectronic devices Resonant tunneling Quantum dots Single electron transistors Motivation for molecular electronics The review article Overview of Nanoelectronic
More informationVMware VMmark V1.1 Results
Vendor and Hardware Platform: IBM System x3950 M2 Virtualization Platform: VMware ESX 3.5.0 U2 Build 110181 Performance VMware VMmark V1.1 Results Tested By: IBM Inc., RTP, NC Test Date: 2008-09-20 Performance
More informationChapter 15: Thermal Properties of Matter
Chapter 15 Lecture Chapter 15: Thermal Properties of Matter Goals for Chapter 15 To understand and learn to use the mole and Avogadro's number. To see applications for equations of state. To study the
More informationLogic BIST. Sungho Kang Yonsei University
Logic BIST Sungho Kang Yonsei University Outline Introduction Basics Issues Weighted Random Pattern Generation BIST Architectures Deterministic BIST Conclusion 2 Built In Self Test Test/ Normal Input Pattern
More informationFrom Physics to Logic
From Physics to Logic This course aims to introduce you to the layers of abstraction of modern computer systems. We won t spend much time below the level of bits, bytes, words, and functional units, but
More informationMicro Cooling of SQUID Sensor
Excerpt from the Proceedings of the COMSOL Conference 2008 Hannover Micro Cooling of SQUID Sensor B.Ottosson *,1, Y. Jouahri 2, C. Rusu 1 and P. Enoksson 3 1 Imego AB, SE-400 14 Gothenburg, Sweden, 2 Mechanical
More informationScalable, Robust, Fault-Tolerant Parallel QR Factorization. Camille Coti
Communication-avoiding Fault-tolerant Scalable, Robust, Fault-Tolerant Parallel Factorization Camille Coti LIPN, CNRS UMR 7030, SPC, Université Paris 13, France DCABES August 24th, 2016 1 / 21 C. Coti
More informationEntropy Changes & Processes
Entropy Changes & Processes Chapter 4 of Atkins: he Second Law: he Concepts Section 4.3, 7th edition; 3.3, 8th and 9th editions Entropy of Phase ransition at the ransition emperature Expansion of the Perfect
More informationRedundant Array of Independent Disks
Redundant Array of Independent Disks Yashwant K. Malaiya 1 Redundant Array of Independent Disks (RAID) Enables greater levels of performance and/or reliability How? By concurrent use of two or more hard
More informationLow Temperature Instrumentation: Detectors, Cooling Systems and Superconducting Magnets LOW TEMPERATURE INSTRUMENTATION - DDAYS
Low Temperature Instrumentation: Detectors, Cooling Systems and Superconducting Magnets MARIA BARBA DACM GALAHAD JEGO DEDIP JULIEN AVRONSART - DACM 1 Use of cryogenic systems Cryogenic range of temperatures:
More informationB I A S T E E Reducing the Size of the Filtering Hardware. for Josephson Junction Qubit Experiments Using. Iron Powder Inductor Cores.
B I A S T E E 2. 0 Reducing the Size of the Filtering Hardware for Josephson Junction Qubit Experiments Using Iron Powder Inductor Cores. Daniel Staudigel Table of Contents Bias Tee 2.0 Daniel Staudigel
More informationCold Boot Attacks in the Discrete Logarithm Setting
Cold Boot Attacks in the Discrete Logarithm Setting B. Poettering 1 & D. L. Sibborn 2 1 Ruhr University of Bochum 2 Royal Holloway, University of London October, 2015 Outline of the talk 1 Introduction
More information2.0 Basic Elements of a Quantum Information Processor. 2.1 Classical information processing The carrier of information
QSIT09.L03 Page 1 2.0 Basic Elements of a Quantum Information Processor 2.1 Classical information processing 2.1.1 The carrier of information - binary representation of information as bits (Binary digits).
More informationph Probe ReallyEasyData com
ph Probe 9200001 Uses Whether you re monitoring ph for chemistry, physical science, life science, or earth science activity, this ph meter offers accurate readings in a convenient format. Use the RED ph
More informationComparing the Effects of Intermittent and Transient Hardware Faults on Programs
Comparing the Effects of Intermittent and Transient Hardware Faults on Programs Jiesheng Wei, Layali Rashid, Karthik Pattabiraman and Sathish Gopalakrishnan Department of Electrical and Computer Engineering,
More informationA Quick Introduction to the Micron Automata Chip
A Quick Introduction to the Micron Automata Chip Peter M. Kogge Univ. of Notre Dame See also: Dlugosch, et al. An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing, IEEE
More informationThe New IMP(F) - F4 unified. Nanoscale Science and Technology
IMP(F) - Nanoscale Science and Technology The New IMP(F) - F4 unified International Master s Programme in Nanoscale Science and Technology 2002/2003 Göran Wendin, MINA/MC2 What sizes are we talking about?
More informationLecture 2, March 1, 2018
Lecture 2, March 1, 2018 Last week: Introduction to topics of lecture Algorithms Physical Systems The development of Quantum Information Science Quantum physics perspective Computer science perspective
More informationTeraLED. Thermal and Radiometric Characterization of LEDs. Technical Specification.
TeraLED Thermal and Radiometric Characterization of LEDs Technical Specification M E C H A N I C A L A N A L Y S I S TeraLED HARDWARE OPTIONS Depending on the dimensions and power level of the LED or LED
More informationChapter 5 Energy and States of Matter. Changes of State. Melting and Freezing. Calculations Using Heat of Fusion
Chapter 5 Energy and States of Matter Changes of State 5.6 Melting and Freezing 5.7 Boiling and Condensation 1 2 Melting and Freezing A substance is melting while it changes from a solid to a liquid. A
More informationSuperconducting cables Development status at Ultera
1 Superconducting cables Development status at Ultera "Superconductors and their Industrial Applications Pori, 15-16 Nov 2006 Chresten Træholt (D. Willén) Senior Development Engineer, Ultera A Southwire
More informationTowards optimal synchronous counting
Towards optimal synchronous counting Christoph Lenzen Joel Rybicki Jukka Suomela MPI for Informatics MPI for Informatics Aalto University Aalto University PODC 5 July 3 Focus on fault-tolerance Fault-tolerant
More information2.6 Complexity Theory for Map-Reduce. Star Joins 2.6. COMPLEXITY THEORY FOR MAP-REDUCE 51
2.6. COMPLEXITY THEORY FOR MAP-REDUCE 51 Star Joins A common structure for data mining of commercial data is the star join. For example, a chain store like Walmart keeps a fact table whose tuples each
More information(ii) the total kinetic energy of the gas molecules (1 mark) (iii) the total potential energy of the gas molecules (1 mark)
NAME : F.5 ( ) Marks: /70 FORM FOUR PHYSICS REVISION TEST on HEAT Allowed: 70 minutes This paper consists of two sections. Section A (50 marks) consists of the structure-type questions, and Section B (20
More informationLecture 6 PN Junction and MOS Electrostatics(III) Metal-Oxide-Semiconductor Structure
Lecture 6 PN Junction and MOS Electrostatics(III) Metal-Oxide-Semiconductor Structure Outline 1. Introduction to MOS structure 2. Electrostatics of MOS in thermal equilibrium 3. Electrostatics of MOS with
More informationSGM800 Low-Power, SOT µp Reset Circuit with Capacitor-Adjustable Reset Timeout Delay
GENERAL DESCRIPTION The low-power micro-processor supervisor circuit monitors system voltages from 1.6V to 5V. This device performs a single function: it asserts a reset signal whenever the V CC supply
More informationQuantum Computers Is the Future Here?
Quantum Computers Is the Future Here? Tal Mor CS.Technion ISCQI Feb. 2016 128?? [ 2011 ; sold to LM ] D-Wave Two :512?? [ 2013 ; sold to NASA + Google ] D-Wave Three: 1024?? [ 2015 ; also installed at
More information