Chapter 6. Synchronous Sequential Logic

Transcription

1 6. Synchrono Seqential Logic 6- Chapter 6. Synchrono Seqential Logic Introction x (I/P) q (PS) Combinational Circit q (NS) Memory Element y (O/P) x (I/P) q (PS) NS Logic Memory q Element (NS) O/P Logic y (O/P) Mealy Moel Moore Moel Figre : Synchrono eqential circit moel. A eqential circit i a logic circit that employ memory element in aition to (combinational) logic gate. Their otpt are etermine from the tate of the memory cell (a well a the preent inpt combination). The tate of the memory element, in trn, i a fnction of the previo inpt (an the previo tate). It behavior therefore i pecifie by a time eqence of inpt an internal tate. The binary information tore in the memory element (flip-flop) at any given time efine the tate of the eqential circit. An aynchrono eqential circit change their tate an otpt vale whenever a change in inpt vale occr. It behavior epen on the orer in which it inpt ignal change an can be affecte at any time. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

2 6. Synchrono Seqential Logic 6- A ynchrono eqential circit change their tate an otpt vale at fixe point of time, which are pecifie by the riing an/or falling ege of a free-rnning clock ignal. It behavior i efine at icrete intant of time. Synchronization ally i achieve by a timing evice calle a clock generator, which generate a perioic train of clock ple itribte throghot the ytem to trigger the memory element. A ynchrono eqential circit can be moele by a finite tate machine (FSM): M = (x; y; q;f;h); where f : x q! y (the Mealy machine) or f : q! y (the Moore machine) i the otpt fnction, an h : x q! q i the next-tate fnction. Note that q (t) = q(t +). Clock perio Clock with Riing ege Figre : Clock ignal [Gajki]. Falling ege Clock perio: time between cceive tranition in the ame irection (meareinm,n,orp). Clock freqency: the reciprocal of clock perio (meare in KHz, MHz, or GHz). Clock with: time ring which the clock ignal i high (vale i ). A clock ignal i active high if the tate change occr at the clock riing ege or ring the clock with. It i active low otherwie. Clock ty cycle: ratio of clock with an clock perio. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

3 6. Synchrono Seqential Logic 6-3 SR Latch The SR latch i a baic memory element which can tore one bit of information. It conit of two cro-cople NOR gate or two cro-cople NAN gate. It ha two inpt ignal, the et ignal (S) anthereet ignal (R). It ha two otpt ignal, an. It ha two tate, the et tate (when = an = ) anthereet tate (when = an = ). In the NOR-type SR latch, if S = R =, = =. If, beqently, both S an R are iaerte at the ame time, the otpt wol be npreictable. It i elay epenent. The latch can ocillate (if both NOR gate have the ame elay). The ocillation i calle critical race. Normally, we prohibit the inpt combination S = R = to avoi the problem. an are then alway complementary to each other. In the NAN-type SR latch, if S = R =, = =. If, beqently, both S an R are aerte at the ame time, the otpt wol be npreictable. Normally, we prohibit the inpt combination S = R = to avoi the problem. an are then alway complementary to each other. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

4 6. Synchrono Seqential Logic 6-4 S R (next) (next) S.4 R.4 (a) Logic chematic (c) Trth table S R Unefine Unefine t t t t 3 t 4 t 5 t 6 t 7 t 8 t 9 t S R.4.4 (b) Timing iagram S R (next) (next) (a) Logic chematic (c) Trth table S R Unefine Unefine t t t t 3 t 4 t 5 t 6 t 7 t 8 t 9 t (b) Timing iagram Figre 3: NOR-type an NAN-type SR latche [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

5 6. Synchrono Seqential Logic 6-5 Gate SR Latch (Clocke SR Latch) The gatesrlatchi one that ha a thir inpt, C (ally the clock ignal), which enable or iable the SR latch (ee Fig. 4). The eigner mt make re that the inpt ignal o not change ring the time winow aron the falling ege of C. The winow tart at etp time t etp before the falling ege of C an en with hol time t hol after the falling ege of C. In Fig. 5, e.g., the following conition mt hol for C: t t t 3 t t etp t hol S C C S R Next tate of No change No change = ; Reet tate R = ; Set tate Unefine (a) Logic iagram (b) Fnction table Fig. 4-7 SR Latch with Control Inpt Figre 4: Gate SR latch (NAN-type) [Mano & Kime]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

6 6. Synchrono Seqential Logic 6-6 C S R (next) S C R R C S.. NA (a) Graphic ymbol (b) Logic chematic (c) Trth table C reet tate et tate reet tate S R t t t t 3 t 4 t 5 t 6 t 7 t 8 t 9 t t t t 3 () Timing iagram Figre 5: Gate SR latch (NOR-type) [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

7 6. Synchrono Seqential Logic 6-7 Gate Latch The gate latch ha only one inpt (the ata inpt). Contrcte from a gate SR latch by connecting the inpt to S an to R. Avoiing S = R = (for NOR-type latch). C C (next). C. (a) Graphic ymbol (b) Logic chematic (c) Trth table C reet tate et tate reet tate t t t t 3 t 4 t 5 t 6 t 7 t 8 t 9 t etp t hol t etp t hol t etp t hol () Timing iagram Figre 6: Gate latch [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

8 6. Synchrono Seqential Logic 6-8 Flip-Flop A latch which i enable whenever C = i calle a level-enitive latch (or level-triggere latch). At any point ring that time, any inpt change will propagate to the otpt (with ome mall elay), caing erroneo hifting a hown below. Soltion: mater-lave an ege-triggere flip-flop. A flip-flop (FF) repon to inpt change only ring the tranition in C. 3 C C C (a) Logic chematic C t t t t 3 t 4 t 5 t 6 t 7 (b) Timing iagram Figre 7: Erroneo hifting with latche [Gajki]. A mater-lave flop-flop i implemente with two latche a mater latch an a lave latch. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

9 6. Synchrono Seqential Logic 6-9 The inpt to the mater latch i the inpt to the FF. The inpt to the lave latch i the otpt from the mater latch. The otpt from the lave latch i the otpt of the FF. Both latche are riven by the ame clock ignal,. The mater latch i enable iff =. The lave latch i enable iff =. Avantage: the FF i never tranparent. Mater latch m 4./3. C C Slave latch 4./3. (a) Logic chematic m t t t t 3 t 4 t 5 t 6 t 7 t t 8 9 (b) Timing iagram Figre 8: Mater-lave flip-flop [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

10 6. Synchrono Seqential Logic 6- Mater lave flip flop Mater lave flip flop Mater lave flip flop m m 3m 3 C C C C C C (a) Logic chematic C m m m t t t t 3 t 4 t 5 t 6 t 7 (b) Timing iagram Figre 9: Shifting with mater-lave flip-flop [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

11 6. Synchrono Seqential Logic 6- An ege-triggere FF i implemente with three interconnecte SR latche: et, reet, an otpt latche. Poitive-ege-triggere FF (-to- tranition) Negative-ege-triggere FF (-to- tranition) Set latch.4 A.4 S.4.4 R.4 Otpt latch.4 B Reet latch (a) Logic chematic A S R.4.4 B t t t t 3 t 4 t 5 t 6 t 7 t 8 t 9 (b) Timing iagram Figre : Ege-triggere flip-flop [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

12 6. Synchrono Seqential Logic 6- Flip flop name Flip flop ymbol Table : Flip-flop type [Gajki]. Characteritic Characteritic table eqation Excitation table SR S R S R (next) (next) = S + R SR = (next) S R NA JK J K J K (next) (next) = J + K (next) J K (next) (next) = (next) T T T (next) (next) = T + T (next) T cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

13 6. Synchrono Seqential Logic 6-3 Flip-Flop Type We ame only poitive (riing) ege-triggere FF. SR (et-reet), JK, (ata), an T (toggle) FF are the for major FF commonly e. The characteritic table give for every inpt an tate combination before the riing ege of the correponing tate of the FF after the falling ege of. A characteritic eqation for each FF can be erive from the characteritic table ing the map metho. The excitation table i erive from the characteritic table by tranpoing inpt an otpt colmn. It give the vale of the FF inpt that are neceary to change the FF preent tate to the eire next tate. Table : State iagram for vario flip-flop [Gajki]. Flip flop name State iagram SR S,R =, S,R =, = = S,R =, S,R =, JK J,K= J,K =, or, = = J,K =, or, J,K =, = = = = = = T T= T = = = T= T = A flip-flop can have aynchrono inpt: PRS (preet) anclr (clear or reet). cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

14 6. Synchrono Seqential Logic 6-4 They are e to preet an clear the FF inepenently of other inpt. They are not controlle by the clock ignal. CLR C PRS CLR PRS (a) latch (b) Graphic ymbol PRS Set latch A S R Otpt latch PRS CLR CLR Reet latch B (c) ege triggere flip flop () Graphic ymbol Figre : flip-flop with aynchrono inpt [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

15 6. Synchrono Seqential Logic 6-5 Analyi of Seqential Logic The analyi of a eqential circit conit of obtaining a table or a iagram for the time eqence of inpt, otpt, an internal tate: the tate table or the tate iagram. It i alo poible to write Boolean expreion incling the neceary time eqence. The ame information available in a tate table can be repreente graphically in a tate iagram. A tate iagram i a irecte graph, where each noe repreent a niqe tate, an each arc a niqe tate tranition. The erivation of a tate iagram from a tate table (an vice vera) i niqe o far a iomorphim i concerne (th can be revere). Given a logic chematic, the analyi procere i a follow:. erive excitation eqation. erive next-tate an otpt eqation 3. Generate next-tate an otpt table 4. Generate tate iagram 5. evelop timing iagram 6. Simlate logic chematic cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

16 6. Synchrono Seqential Logic 6-6 Cnt (a) Logic chematic = Cnt + = Cnt + Cnt = Cnt + Cnt + Cnt (b) Excitation eqation (next) = (next) = = Cnt + Cnt + Cnt = Cnt + Cnt (c) Next tate eqation Preent tate Next tate (next) (next) Cnt = Cnt = () State table Figre : Analyi of a molo-4 conter [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

17 6. Synchrono Seqential Logic 6-7 Cnt = = Cnt = = Cnt = Cnt = Cnt = Cnt = = Cnt = = Cnt = (e) State iagram clock cycle clock cycle clock cycle 3 clock cycle 4 Cnt t t t t 3 t 4 t 5 (f) Timing iagram Figre 3: Analyi of a molo-4 conter (cont) [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

18 6. Synchrono Seqential Logic 6-8 Cnt (a) Logic chematic = Cnt + = Cnt + Cnt = Cnt Cnt + Cnt + (b) Excitation eqation (next) = (next) = = Cnt + Cnt + Cnt = Cnt + Cnt = (c) Next tate an otpt eqation Preent tate Next tate (next) (next) Cnt = Cnt = Otpt () State an otpt table Figre 4: Analyi of a tate-bae (Moore) molo-4 conter [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

19 6. Synchrono Seqential Logic 6-9 Cnt = = Cnt = = = = Cnt = Cnt = Cnt = Cnt = = = Cnt = = = Cnt = (e) State iagram clock cycle clock cycle clock cycle 3 clock cycle 4 Cnt t t t t 3 t 4 t 5 (f) Timing iagram Figre 5: Analyi of a tate-bae (Moore) molo-4 conter (cont) [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

20 6. Synchrono Seqential Logic 6- Cnt (a) Logic chematic = Cnt + = Cnt + Cnt = Cnt Cnt + Cnt + (b) Excitation eqation (next) = (next) = = Cnt + Cnt + Cnt = Cnt + Cnt = Cnt (c) Next tate an otpt eqation Preent tate Next tate / Otpt (next) Cnt = Cnt = / (next) / / / / / / / / () State an otpt table Figre 6: Analyi of a inpt-bae (Mealy) molo-4 conter [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

21 6. Synchrono Seqential Logic 6- Cnt = / = Cnt = / = Cnt = / = = = Cnt = / = Cnt = / = Cnt = / = = Cnt = / = = Cnt = / = (e) State iagram clock cycle clock cycle clock cycle 3 clock cycle 4 Cnt t t t t 3 t 4 t 5 (f) Timing iagram Figre 7: Analyi of a inpt-bae (Mealy) molo-4 conter (cont) [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

22 6. Synchrono Seqential Logic 6- Synthei of Seqential Logic eign ecription or timing iagram evelop tate iagram Generate next tate an otpt table Minimize tate Encoe inpt, tate, otpt erive next tate an otpt eqation Chooe memory element erive excitation eqation Optimize logic implementation erive logic chematic an timing iagram Simlate logic chematic Verify fnctionality an timing Figre 8: Synthei procere for FSM moel [Gajki]. FSM Moel (State iagram) Captre Conier a molo-3 p/own conter. Two inpt: cont enable (C) an cont irection (). When C =, it top conting. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

23 6. Synchrono Seqential Logic 6-3 When C =, it cont p if = anownif =. One otpt: = when the conter reache while conting p or while conting own. C = C Molo 3 p/own conter C = C = C = C = C = (a) Conter ymbol (b) Partial tate iagram (p an own conting) C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = C = (c) Partial tate iagram (changing irection) C = C = C = C = () Final tate iagram Figre 9: State iagram for a molo-3 conter [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

24 6. Synchrono Seqential Logic 6-4 Example (State iagram for the BC-to-Exce-3 ecoer) The inpt are applie erially, with LSB firt, an the otpt are generate erially, too. TABLE 4-6 Seqence Table for Coe Converter Example Seqence in Orer of igit Repreente Seqence in Orer of Common Prefixe BC Inpt Exce-3 Otpt BC Inpt Exce-3 Otpt Table 4-6 Seqence Table for Coe Converter Example Init Init / / / / B= B= B= B= (a) / / / or / B= B= B= (b) Init Init / / / or / / / / or / / or / B= / / B= / or / / or / B= / / B= / or / B= B= B= B= B= B= / or / / / / / B3= B3= B3= B3= (c) Fig. 4- Contrction of a State iagram () cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

25 6. Synchrono Seqential Logic 6-5 State Minimization We wol like to rece the nmber of gate an FF ring the eign of a eqential circit (they ometime are competing objective). The nmber of gate an the nmber of inpt per gate for the next tate an otpt fnction can be rece by tate minimization. The nmber of FF reqire i irectly relate to the nmber of tate of the FSM. ForanFSMwithm tate, we wol nee log me FF. g / / / / a / / / / b / / f / / / / c e PS a b c e f g NS a b c a e f a f g f a f O/P t q a a b c e f f g f g a x y Figre : An FSM example. Given the FSM a hown above, can we fin an eqivalent FSM with fewer than 7 tate? efinition Two FSM are ai to be (behaviorally) eqivalent if given any inpt eqence, tarting from any ientical initial tate, they proce the ame otpt eqence. efinition Two tate, j an k,inanfsmareaitobeeqivalent, enote a j k,iff cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

26 6. Synchrono Seqential Logic i x; h( j ;i)=h( k ;i);. 8 i x; f ( j ;i)=f ( k ;i). ➀ Fin row in the tate table that have ientical NS an O/P entrie. They correpon to eqivalent tate. If there are no eqivalent tate, top. ➁ When tate are eqivalent, one of them can be remove. Upate the entrie of the remaining table to reflect the change. Go to ➀. PS a b c e f g NS a b c a e f a f g f a f O/P ➁ ➀ NS O/P NS O/P PS PS a a b a a b b c b c c a c a e f e e a f e a f ge f g a f t q a a b c e e e a x y The ame otpt eqence relt althogh the tate eqence i ifferent. Note that in either machine, 3 FF are reqire to repreent the tate. Three FF can repreent p to 8 tate. Une tate are treate a ontcare. In general, recing the tate table i likely (bt oe not garantee) to relt in a maller nmber of FF or gate. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

27 6. Synchrono Seqential Logic 6-7 Preent tate Next tate C = C = C = / / / / / / / / / / / / / / / / / / (a) Initial tate table C = {,,,,, } Otpt vale C = G = {, } G = {, } G = {, } G G G G G G G G G G G G G G G G G G Next tate (b) Partitioning into eqivalence clae Preent tate Next tate C = C = C = / / / / / / (c) Final next tate/otpt table / / / Figre : State rection for the molo-3 conter [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

28 6. Synchrono Seqential Logic 6-8 Eqivalence clae of tate alo can be obtaine by an implication table. A trianglar table in which every entry repreent a pecific pair of tate. Every pair of tate i aigne one entry in the table < 3, > 4 <, 6 > <, > Figre : An implication table [Gajki]. ➀ Enter a for every pair of tate that iffer in their otpt vale for at leat one et of inpt vale. Pair of tate that are not eqivalent are eliminate. ➁ For the remaining pair of tate, enter into each entry the next-tate pair that wol have to be eqivalent if the pair of tate repreente by the entry are to be eqivalent. The eqivalence of the next-tate pair i implie. For example, the eqivalence of < ; 5 > implie the eqivalence of < 3 ; 4 >. ➂ Scan the table from top to bottom one row at a time, an from left to right one colmn at a time, an enter a into any qare having at leat one noneqivalent next-tate pair. May be iterate everal time ntil no are entere ring the table can. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

29 6. Synchrono Seqential Logic 6-9 All the noncroe entrie repreent eqivalent pair. ➃ Grop the eqivalent tate into eqivalent clae. If i j an j k,then i k. Preent tate Next tate / Otpt C = C = C = / / / / / / / / / / / / / / / / / / (a) Next tate an otpt table <, > (b) Implication table Figre 3: Rection ing the implication table [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

30 6. Synchrono Seqential Logic 6-3 State Encoing (Aignment) NS O/P PS a a b b c c a e e a q a-a-a-3 a b c e PS NS O/P PS I/P NS O/P ABC x ABC y ifferent tate encoing (aignment) relt in ifferent (combinational) circit for the intene FSM. ifferent cot an elay. There are at leat n! ifferent way to encoe n tate. There i no eay tate-encoing procere that garantee a minimal-cot or minimal-elay combinational circit. Exploration of all poibilitie i impoible. Heritic are often e. Minimm-bit change: aign Boolean vale to the tate in ch a way that the total nmber of bit change for all tate tranition i minimize. Prioritize ajacency: aign ajacent encoing, which iffer in one bit only, to all tate that have a common orce, etination, or otpt.. The highet priority i given to tate that have the ame next tate for a given inpt vale.. The econ priority i given to the next tate of the ame tate. 3. The thir priority i given to tate that have the ame otpt vale for the ame inpt vale. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

31 6. Synchrono Seqential Logic 6-3 One-hot encoing: e renant encoing in which one FF i aigne to each tate. (a) Straight forwar encoing (b) Minimm bit change encoing Figre 4: Two ifferent encoing for a -bit binary conter [Gajki]. / / Priority : (, ) /, / Priority : (, ) / /, / / / / Priority 3: (, ), (, 3 ) / / 3 (a) Initial tate iagram (b) Ajacency prioritie (c) Poible encoing Figre 5: Encoing bae on prioritize ajacency [Gajki]. Encoing A Encoing B Encoing C Figre 6: Some encoing for molo-3 conter [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

32 6. Synchrono Seqential Logic 6-3 C (next) (next) (a) Next tate map (b) Otpt map (next) = C + C + C (next) = C + C + C = C + C (c) Excitation an otpt eqation.4.8 (next) (next) Cot ( ) = 4 Cot ( ) = 4 elay ( ) = 4. elay ( ) = 4. Cot () = 8 elay () = 3.6 () Cot an elay etimation Figre 7: Cot an elay etimation for encoing A [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

33 6. Synchrono Seqential Logic 6-33 C (next) (next) (a) Next tate map (b) Otpt map (next) = C + C + C (next) = C + C + C = C + C (c) Excitation an otpt eqation.4.8 (next) (next) Cot ( ) = 4 elay ( ) = 3.6 Cot ( ) = 4 elay ( ) = 3.6 () Cot an elay etimation Cot () = 6 elay () = 3. Figre 8: Cot an elay etimation for encoing B [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

34 6. Synchrono Seqential Logic 6-34 C (next) (next) (next) (a) Next tate table (b) Otpt table (next) (next) (next) = C + C + C = C + C + C = C + C + C = C + C (c) Excitation an otpt eqation (next) (next) (next) Cot ( ) = Cot ( ) = Cot ( ) = Cot () = 6 elay ( ) = elay( ) = elay ( ) = 3.6 elay () = 3. () Cot an elay etimation Figre 9: Cot an elay etimation for encoing C [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

35 6. Synchrono Seqential Logic 6-35 Choice of Memory Element After tate minimization an tate encoing, we chooe the proper type of FF for implementation. Given the tate tranition table, we wih to fin the FF inpt conition that will cae the reqire tranition. A tool for ch a prpoe i the excitation table, which can be erive from the characteritic table (or eqation). SR FF are generally e when ifferent ignal et an reet the FF. FF are goo for application reqiring ata tranfer (e.g., hift regiter). T FF are goo for thoe involving complementation (e.g., binary conter). Many igital ytem are contrcte entirely with JK FF becae they are the mot veratile available. JK i efl when we nee to combine the behavior of T an SR. The excitation table for the JK flip-flop ha many ont-care, which are more likely to relt in impler combinational circit. An example ing SR FF: + S R PS ABC I/P x NS ABC O/P y SA SB SC RA RB RC. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

36 6. Synchrono Seqential Logic 6-36 C (next) (next) (a) Next tate table for encoing A (preent) (next) S R J K T (b) Flip flop excitation table C S S R R S = + C C [cot = 8, elay = 3.6] R = = ( + C ) S = C + C [cot = 9, elay =.4] [cot = 8, elay = 3.6] = C = ( + C ) [cot = 9, elay =.4] R (c) Implementation with SR flip flop Figre 3: Mo-3 conter ing SR FF [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

37 6. Synchrono Seqential Logic 6-37 C J K J K J C + = C = (C + + ) K = C J = C + C = (C + + ) K = C () Implementation with JK flip flop [cot =, elay =.4] [cot =, elay = ] [cot =, elay =.4] [cot =, elay = ] C C T T T = C + C + C [cot =, elay = 3.6] T = C + C + C [cot =, elay = 3.6] = C + C + C = C + C + C [cot = 4, elay = 4.] [cot = 4, elay = 4.] (e) Implementation with T flip flop (f) Implementation with flip flop Figre 3: Mo-3 conter ing other type of FF [Gajki]. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

38 6. Synchrono Seqential Logic 6-38 Optimization an Timing iagram C.4 J K Inpt otpt elay.4 J K 4. C, to 5.4 to 7.6 C, to 5.6 to 7.4 (a) Logic chematic (b) elay table C t t t t 3 t 4 t 5 t 6 Figre 3: Schematic an a timing iagram of mo-3 conter [Gajki]. eign Example: Conter A conter i a eqential circit that goe throgh a precribe eqence of tate pon the application of inpt/clock ple (the cont ple). A banary conter i one that follow the binary eqence. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5

39 6. Synchrono Seqential Logic 6-39 An n-bit conter cont from p to ( n ), an then reet to. What i a elf-correcting FSM? What ha it to o with ne tate? We are going to eign a ivie-by-6 conter (molo-6 conter) with the conting eqence (,,,3,4,5), which proce a if the tate 5 i encontere, an otherwie. We are going to e T FF. The tate iagram an table are hown below. 5 -/ -/ 4 -/ -/ 3 -/ -/ PS ABC NS ABC O/P y Excitation TA TB TC From the table, the implifie otpt fnction an the excitation fnction can be erive ing the K-map: A BC A BC BC A y = AC TA = AC + BC TA = A Φ B A BC TB = A C TC = An the chematic of the conter i hown below. T T T y A B C What if we e JK FF? Work the etail ot. cfl Cheng-Wen W, Lab for Reliable Compting (LaRC), EE, NTHU 5