Problem Class 4. More State Machines (Problem Sheet 3 con t)

Transcription

1 Problem Class 4 More State Machines (Problem Sheet 3 con t) Peter Cheng Department of Electrical & Electronic Engineering Imperial College London URL: p.cheng@imperial.ac.k Problem Class 4 - Slide 1 Problem 1: Test yorself (Sheet 3 Q4) Draw the state diagram for a state machine whose otpt goes high when the inpt is high for for or more clock cycles. As shown in the timing diagram, the otpt shold go high dring the forth clock cycle and remain high so long as the inpt does. Inpt and state transitions occr shortly after the clock rising edge. Problem Class 4 - Slide 2

2 Soltion 1: Test yorself (Sheet 3 Q4) Since the otpt mst go high dring the forth clock cycle in response to the vale in that cycle, we mst have a Mealy machine: a Moore machine wold insert too mch delay. If IN=1 dring the crrent cycle then we want OUT=1 if the previos three (or more) cycles had IN=1. We therefore need to remember how many of the previos cycles had IN=1: 0, 1, 2 or 3. We therefore need for states. Problem Class 4 - Slide 3 Problem 2: Explain it (Sheet 3 Q2) The state diagram and inpt waveforms of a state machine are shown below. All inpt and state transitions occr shortly after the clock rising edge. Complete the timing diagram by indicating the vale of the state dring each clock cycle and by drawing the waveform of X. The initial state is 0 as shown. Problem Class 4 - Slide 4

3 Synchronos State Machines (L5, S3) Synchronos State Machine (also called Finite State Machine) = Register + Logic Otpt logic Next state logic Mealey machine otpt can change middle clock cycle Moore machine otpt is associated only with the state the FSM is in Problem Class 4 - Slide 5 Otpt Expressions on Arrows (L5, S9) It may make the diagram clearer to pt otpt expressions on the arrows instead of within the state circles: - Usefl if the same Boolean expression determines both the next state and the otpt signals - For each state, the otpt specification mst be either inside the circle or else on every emitted arrow - If self transitions are omitted, we mst declare defalt vales for the otpts Otpts written on an arrow apply to the state emitting the arrow. Otpts still apply for the entire time spent in a state This does not affect the Moore/Mealy distinction This is a notation change only Problem Class 4 - Slide 6

4 Soltion 2: Explain it (Sheet 3 Q2) Yo shold first determine the state seqence. The transitions depend on the vale of A and B immediately before the Clock edge. A common mistake is to se the vales after the edge. Note that X is only ever high in state 0 and then only if A and B are high. A common mistake is to make X high in state 2 rather than state 0: remember that otpts on transition arrows refer to the preceding state. Problem Class 4 - Slide 7 Problem 3: Test yorself (Sheet 3 Q3) A synchronos state machine has its state represented by the 2-bit nmber S1:0 and has a single inpt signal. The crrent state is stored in a D-type register whose inpt NS1:0 is defined by: and. Draw the state transition table for the state machine. Problem Class 4 - Slide 8

5 Soltion 3: Test yorself (Sheet 3 Q3) This represents a 2-bit bidirectional conter whose conting seqence has only one bit changing at a time Problem Class 4 - Slide 9 Problem 4: Explain it (Sheet 3 Q7) Constrct the state diagram for a state machine that emits a single plse on each rising edge of its inpt and a doble plse on each falling edge as shown below. Each otpt plse shold last exactly one clock cycle. Assme that the inpt signal has been synchronized with the clock rising edge. Problem Class 4 - Slide 10

6 Soltion 4: Explain it (Sheet 3 Q7) We mst se a Mealy machine in order to get zero delay between IN and OUT. The only two points of difficlty are 1) what to do if the inpt goes high in the middle of the doble plse seqence and 2) whether we wish to ensre that consective plses are separated by at least one clock cycle. Problem Class 4 - Slide 11 Soltion 4: Explain it (Sheet 3 Q7) The following diagram ensres that plses are distinct (by the addition of states e and f) and abandons plse seqences when another inpt transition occrs Problem Class 4 - Slide 12