Probe Storage Concepts and Challenges

Transcription

1 Probe Storage Concepts and Challenges Harish Bhaskaran And the IBM Probe Storage Team Collaborating partners: IBM Almaden, Burlington University of Wisconsin University of Pennsylvania University of Patras, Greece University of Ulm, Germany IBM Portable Data Center WIND/IMST

2 Probe-Based Data Storage Single Lever Write / Read Principle 2/39

3 Parallel Probe Data Storage Highly Parallel Recording 3/39

4 Probe Storage: State-of-the-art not needed Density Depends on: 1990 Don Eigler, IBM Almaden Xe atoms on Cu, Low Temp. ~1000 Tb/in 2 Tip Shape -does not require state of the art lithography Media Read/Write Mechanism -fundamental limit at atomic/molecular scale Positioning System Resolution -<1nm resolution demonstrated with MEMS based nano-positioners R.Bennewitz et al. UW Madison Au atoms on Si, Room Temp. 250Tb/in 2 H. F. Hamann et al., IBM Watson Phase Change Media (Ge 2 Sb 2 Te 5 ) 3.3Tb/in 2 Silicon tip produced with conventional lithography (3 micron min. feature size) Tip Radius ~ 3nm IBM Zurich Polymer Media 2Tb/in 2 & 3Tb/in 2 Cho et al., Tohoku University Ferroelectric Media (LiTaO 3 ) 1.5 Tb/in 2 4/39

5 Different Probe Storage Concepts Write Read Erase Thermomechanical Thermal probe: apply voltage to heat tip and force tip into polymer (~1us write time demonstrated) Write-energy ~10nJ Monitor resistance change of microheater (IBM) or piezoresistive sensing (LG) Similar to write and 10 4 cycles demonstrated (IBM) Ferroelectric Conducting Probe: apply voltage to tip and change polarization state of medium locally (4ns write time demonstrated) Various forms of capacitive sensing or piezoresponse microscopy Similar to write process Phase Change Conducting Probe: Apply voltage to conducting tip to change phase of medium (1nJ power and 50ns theoretically possible) Simple resistance change measurement potentially very fast Difficult complex schemes required (Nanochip) Advantages Storage density, write speed very attractive Good readback sensitivity Good polymer reusability Low cost medium Storage density write speed, and power consumption very attractive Storage density, write speed, power consumption very attractive High readback contrast between states Issues Low read back speed (thermal method) Power consumption Tip Wear Read back slow and complex Samsung technique looks promising Extreme Tip Wear! Erasing not yet demonstrated Low read back speed Bit stability not proven in probe recording Tip Wear 5/39

6 Thermomechanical Writing scan direction polymer substrate resistive heater 6/39

7 Thermomechanical Writing scan direction writing current polymer substrate resistive heater 7/39

8 Thermomechanical Writing scan direction writing current polymer substrate resistive heater 8/39

9 Thermomechanical Writing scan direction polymer substrate resistive heater 1 9/39

10 Thermomechanical Reading sensing current Less cooling by substrate More cooling by substrate => T => R R/R ~ 10-4 per nm 10/39

11 Storage Device Concept Mobile Applications Coil Magnet Scanner Lever Electronic Cell CMOS Chip Lever Interconnect Base Plate Interconnect Bonding Pad Spacer 11/39

12 Fundamental Challenges - Nanopositioning (a) (b) T R Microscanner with nm-scale accuracy and high;y linear operation demonstrated (see Lantz et. al., Nanotechnology, 2004) Linearity: +/- 60 microns, Resolution: < 2nm 12/39

13 Fundamental Challenges Media Design Space Dilemma: Little prior art & huge parameter space t Indentation phase diagram F - glass temperature - cross-linking - chemistry - film thickness -. 13/39

14 Fundamental Challenges - Tip Wear scan direction polymer substrate resistive heater New bits are larger Tip cannot go into previously written bit 14/39

15 Probes in archival storage FP6 funded ProTeM (Probe-based Terrabit Memory) with objectives of using probe storage technology for ultra-high capacity, non-volatile, low power, low-cost, write-once and rewritable memories* Address the needs of data storage in the domain of digital archiving, as per laws that govern these requirements the Sarbanes-Oxley Act Basel II IFRS/IAS Tip wear and endurance even more important, since data is most likely stored by a sharp tip and will have to be read-out reliably reliability in data retrieval is the key for archival storage Probe-Storage is a very interesting and compelling emerging technology for archival and back-up * 15/39

16 But.. Zurich Research Laboratory scan direction polymer substrate resistive heater New bits are larger Tip cannot go into previously written bit A problem for all forms of probe storage, and is especially exacerbated in phase change probe storage because of the high forces and hard media 16/39

17 Tip Requirements Must preserve integrity (maintain dia<20nm) for read cycles 10s of km Additional requirements for probe technologies based on conduction must also conduct reliably for this distance! Coatings, if present cannot exceed in thickness the required final diameter this is a problem Must be mass manufacturable no piece by piece assembly for each probe possible for manufacturing arrays of 1000s of probes Issues with presently available tips Silicon tips are worn through tribo-chemical wear Si-O-Si + H2O Si-OH +Si-OH Silicon Tips do not conduct reliably (oxide formation) an issue for electrical probe storage Conducting tips using coatings not an option other tips too blunt 100s of nm tip diameter 17/39

18 Zurich Research Laboratory Si-DLC Tips Integrated on Si Cantilevers DLC Si SiO2 18/39

19 Process Flow Circle SOI wafer with thermal oxide Pattern and etch anchor Mold Etching Mold Sharpening Deposit Si-DLC Define and Etch DLC Etch Cantilever Back-Side RIE Release of cantilever Si SiO 2 Si-DLC 19/39

20 Diamond-like-Carbon Ultra-sharp tips (r<5nm) 200nm H. Bhaskaran et. al., Proc. MNE /39

21 Existing state-of-the-art Dia ~ 9 nm UNCD Tips Epinosa, Auciello at. Al, Novel Ultrananocrystalline Diamond Probes for High-Resolution Low-Wear Nanolithographic Techniques, Small (2005) Si doped DLC Tips H. Bhaskaran et. al., Proc. MNE /39

22 The Wear Test Wear of a 22nm diameter DLC tip on thermally grown SiO 2 (thk. 400nm) Sliding wear is carried out at an applied normal loading force of 25 nn and at 0.25mm/s in a specialized home-made AFM Wear is monitored in-situ as a function of increasing tip diameter, and correspondingly the adhesion. Adhesion is recorded after every 800 um of sliding Spring constant of cantilever used is 65 mn/m, and was individually calibrated using Sader s method 22/39

23 Adhesion curves on SiO Drops in Adhesion are probably chunks of Si breaking off Silicon Tip DLC Adhesion (nn) DLC Curve looks even, and shows very little wear Sliding Distance (mm) 23/39

24 Wear Volumes DLC Tip Wear Volume ~17x10 3 nm 3 Si Tip Wear Volume ~ 66x10 6 nm 3 Wear of DLC on SiO 2 < 3000 times Si on SiO 2 Evidence for oxide on Si-DLC: Junho Choi et. al. Deposition of Si-DLC film and its microstructural, tribological and corrosion properties, Microsys. Techn. (2007) H. Bhaskaran et. al., Proc. MNE 08 24/39

25 Platinum Silicide Tip Apexes Not a coating preserves tip geometry Hard - Vicker s hardness is 1761 GPa (H v (Si) = 1089 and H v (Poly. diamond) = ~2000) PtSi is an ohmic contact to Si important for good conduction Fabricate tip Deposit 10nm Pt using a mask Anneal at 700 o C. Etch remaining Pt in 3HCl:1HNO 3 Pt being a noble metal reduces probability of oxide at tip Complete processing to fabricate cantilevers PtSi can be easily formed ONLY at the tip by a single mask layer, and this process is completely compatible with standard MEMS processing 25/39

26 Assessment of Wear and Conduction The force of adhesion is used as a measure of wear The sample we use is ta-c (for wear) For conduction we use 200nm Au on SiO 2 Tests were done on Si and PtSi tips fabricated on the same wafer, with the same spring constant For 40nN load we used a 100 µm long cantilever with k = 0.26N/m For 100nN load we used a 50 µm long cantilever with k = 1N/m All tests done in ambient conditions (typically o C and 28-34% RH) 26/39

27 Adhesion vs. Sliding Distance Si Si (k=1.13n/m) Pt (k=1.13n/m) Si (k=0.26n/m) Pt (k=0.26n/m) Adhesion (nn) nN Loading force PtSi 50 Si PtSi 40nN Loading force Sliding Distance (mm) 27/39

28 Si-PtSi Comparison Si at 500 nn PtSi at 56 nn 80 Current (µa) Voltage (V) H. Bhaskaran et. al., IEEE Trans. Nanotech. (2008) 28/39

29 Conduction Measurements (high current) 2000 Resistance (kω) Z position (µm) Deflection (nm) Z position (µm) Measurement done with a 10kΩ Series Resistor Current through tip ~ 100µA 29/39

30 Encapsulated conducting tips Conducting PtSi Chip with 4 cantilevers Oxide encapsulation Simultaneous measurement of deflection (bottom) and conduction (top) of encapsulated tip on TiN (commonly used as an electrode for PCM). Blue indicates approach and red indicates retraction. 30/39 Figure showing sustained conduction of encapsulated tip. The red indicates a conduction image during the first 1.6 mm of scanning. The black indicates conduction image during the last 1.6 mm of a 2000mm scan The voltage drop across the tip is the measure used for this figure.

31 Progress on tip endurance DLC Tips of ~5nm radius have been fabricated Their integration into standard silicon microfabrication has been demonstrated Systematic wear tests pending, but initial results confirm that wear is significantly lower in these tips potential for use in thermomechanical probe technology We verify that PtSi is 3-4 times better than Si in terms of wear resistance We verify that PtSi tips are much superior to standard doped silicon tips for conduction A process to make conducting encapsulated probes with PtSi tips has been developed Encapsulated tips have been shown to have much superior wear resistance and high adhesion force Significant progress has been made in tip endurance enhancement, but future work must continue to concentrate on this aspect to improve reliability 31/39

32 Conclusion Zurich Research Laboratory Probe storage offers an interesting alternative to compete in the archival storage sector Many existing challenges (nanopositioning, media design and tip wear) are being actively addressed. Tip wear seems to be a resolvable problem through: - Use of new materials Mass manufacturing methods compatible with standard microprocessing Superior scanning techniques to minimize tip wear (e.g. tapping) A European Project supported within the sixth framework program IBM Research GmbH University of Exeter ST Microelectronics S.r.l. CEA Fraunhofer RWTH Aachen UT Plasmon Data Systems Ltd. Arithmatica Limited Alma Consulting Group. 5.3M ( ) Future challenges Density Scaling and Cost 32/39

33 Back-up slides 33/39

34 Probe Storage Technologies Noise in NEMS Engineering complicated control systems State-of-the-art Nanofabrication technology Probe- Storage Nanoscale heat transport measurements New advances in polymer science and chemistry Understanding of nanoscale tip wear The probe storage device is the first true Micro/ Nano Electro Mechanical SYSTEM precedent of future devices 34/39

35 Thermomechanical Probe Storage on Polymers (IBM, LGE) Write: Thermal probe: apply voltage to heat tip and force to push tip into polymer (~1us write time demonstrated) Write-energy ~10nJ 1.2 Tb/in 2 Read: monitor resistance changes due to changing thermal conductance from topography Data-rate 30 Kb/s demo, 100 Kb/s possible SNR ~ 10 db, BER ~ 10-4 SNR 9.2 db 1.2 Tb/in 2 Erase: similar to write, lower power >10 4 erase cycles demonstrated Erasing a subfield Advantages Storage density, write speed very attractive Good readback sensitivity, SNR Good polymer reusability Low cost medium Issues to resolve Low read back speed (thermal method) Tip Wear Bit stability potential, needs to be demonstrated Power consumption 35/39

36 LG: Polymer / Thermomechanical Lever design Piezo-electric read Write: thermomechanical: write indentations using a resistively heated tip mounted on a cantilever Read: contact mode topography imaging using piezo electric sensor built into cantilever 128x128 probe array Transferred Cantilever array (CMOS + Cantilever) Erase: not demonstrated yet, but should be like Millipede Advantages Storage density, write speed very attractive Low cost medium Advanced fabrication and integration stage Issues to resolve SNR/BW of readback signal may be limited Low readback speed Tip wear 36/39

37 Ferroelectric Probe Storage (Samsung, HP, Fuji, Pioneer, >10 Universities/Institutes) Write: apply voltage pulse to conducting tip in contact with ferroelectric media changes electrical polarization state (4ns write time demonstrated!) 717Gb/in 2 5µs Read: various forms of capacitance sensing or piezo response microscopy (slow) Samsung: tip with built in FET 4.7kb/s Erase: similar to write process -12V 10ms Advantages Storage density write speed, and power consumption very attractive Strong dependence on quality of material Single crystals, epitaxial materials best, poly-crystaline materials more problems Issues to resolve Read back slow and complex Samsung technique looks promising Extreme Tip Wear! Bit stability/fatigue unproven, conflicting results, no data for elevated temps or > 1month at RT Role of water unclear in imaging mechanism 37/39

38 Probe Storage on Phase-change media (Nanochip, IBM, Matsushita, LETI, Tohoku Univ., Exeter Univ.) Write: apply voltage pulse to conducting tip in contact with phase-change media amorphous to crystalline state (~1us write time demonstrated, ~50ns theoretically possible) Ultra-low write-energy ~1nJ Nanochip array/actuator Read: conductance images: monitor current on application of bias voltage between probe and bottom electrode Read power ~100nW/tip shown Erase: re-amorphization by heating above melting temp. and rapid quenching NOT demonstrated 20 nm pitch 1.6 Tb/in 2 IBM YKT 14 nm pitch 3.3 Tb/in 2 Advantages Storage density, write speed, power consumption very attractive High readback contrast between states Issues to resolve Erasing not yet demonstrated Low read back speed Tip Wear Bit stability not proven in probe recording 38/39

39 Other Important Media Ferroelectric Probe Storage Phase Change Probe Storage Reading in contact mode at high forces (50-200nN, typically 125nN) severely reduces tip lifetime 39/39

40 Archival Requirements Source: Plasmon Data Storage Limited 40/39

41 Archival Technologies Power Consumption UDO Tape TCO ($/GB, 10 years) 41/39