Ming-C. Cheng: Research overview

Transcription

1 Ming-C. Cheng: Research overview Dept. of Electrical & Computer Engineering Clarkson University. Potsdam, NY, Research Experiences Block-Based Reduced Order Thermal Modeling for semiconductor Chips Electro-Thermal Simulation of semiconductor devices and IC s Electro-thermal modeling of photovoltaics Electromagnetics simulation in magnetic materials Simulation of nano-scale devices Additional Research Interests Electro-thermal modeling of the following structures/systems based on reduced order models. LED lighting devices and systems Battery packs Thermoelectric modules MEMS Electro-thermo-mechnical modeling of semiconductor IC s Thermal Simulation of Data Centers

2 Thermal Simulation of IC s based on a Reduced Order Model Block-based Thermal Model Based on Proper Orthogonal Decomposition (POD) A novel approach that could reduce the number of numerical nodes by 6 orders of magnitude and still offers detailed temperature profiles Brief description of the developed approach Partition semiconductor chips into building blocks, such as standard cells, functional circuit blocks, etc. Develop the POD thermal model for each block, and store the trained model parameters of each individual blocks in a library for a specific technology

3 Block-based Thermal Model using Proper Orthogonal Decomposition (POD) Dynamic temperature at a junction Thermal Simulation of IC s Heat sources: periodic pulses Heat sources: random pulses 5-fin FinFET Source Drain POD with 4 or 6 modes nearly duplicates detailed numerical simulation (DNS) Reduction in numerical nodes by 6 orders of magnitude, compared to DNS The model can be developed at any level of resolution The model can be extended to electro-thermal simulation of IC s Mechanical stress can be inlcuded for electrothermo-mechanical simulation of IC s

4 Electro-thermal Modeling of IC s Silicon-on-Insulator MOSFET s and FinFET s Drain Gate Metal interconnect Source L g = 20nm FinFET Physics-based approach derived from characteristic thermal lengths of the wire segments along fins/channels across channels via hot spots along meta wires

5 Electro-thermal Simulation self-heating & thermal coupling Layout I Layout II Layout I Layout II SOI MOSFET Current Mirror Self-heating induces unbalanced pairs & strong thermal coupling The isothermal model exaggerates thermal coupling Temperature from S to D

6 Block-based Compact Thermal Model B-B Temperature BCs Flux BCs Flux BCs Cascode Current Mirror T(x) along BB via device (M3 and M4) channels T o 10 blocked used in a 3D Integrated circuit Number of Nodes: 352 to capture the hot spots at the device junctions Reduction in numerical nodes: 4 orders of magnitude to capture the hot spots Maximum error ~ 4%

7 Photovoltaic Thermal Model Gain from sun power: P ab,sun = α E sun A Loss from thermal radiation: P rad = σ (T 4 T 4 amb) Electric power output: P o = I o V o Loss due to conduction: P cond = (T T o )/R Loss due to convection: P conv = S h (T T o ) Photovoltaic Electric Model based on singular value decomposition (SVD) I ph I o r ( V, T, E ) = a ( T, E ) ϕ ( V o R I s d R sh k = 1 I o V o k k o ) Electro-thermal model for design, reliability analysis and optimization of photovoltaic cells, modules and arrays. Published in SST, vol. 28, , 2013; the paper has been chosen as IOP SELECT by the IOP editors for its novelty and potential impact on future research.

8 Nano-device simulation - quantum-dot/well solar cells, spintronic devcies, semiconductor heterostructures p-i-n quantum-well solar cell Modeling of DX center Effects in 2DEG in AlGaAs/GaAs heterojunctions p i n 2d o d + + DX - DX - d + + 2e f ni = j gdi exp g exp dj { [ n ( E E ) E ]/ kt} i C F di { [ n ( E E ) E )]/ kt} j C F dj n s i * m k πh B 2 T EF E ln 1 + exp kbt i Electron wavefunction in GaAs/InGaAs p-i-n QW cell at 1V Spin Field Effect Transistor

9 Electromagnetics Simulation in Magnetic Materials An aggressive but simple assumption: the intrinsic B-Hloop is independent of the frequency and waveform of the excitation and independent of the lamination dimensions The expansion of the measured loop actually results from skin effects. Static loop 50Hz 1KHz Average B vs. applied H evaluated in finite element simulation using the static loop Core losses using the static B-H relation

10 Recent Publications Ming-C. Cheng, Wangkug Jia, Jeffrey Smith, Ryan Coleman, An Effective Thermal Model for FinFET Structure, IEEE Trans. on Electron Devices, pp , Jan K. Zhang, W. Jia, J. Koplowitz, P. Marzocca, M.C. Cheng, Modeling of Photovoltaic Cells and Arrays Based on Singular Value Decomposition, Semiconductor Science & Technology, vol. 28, (7pp) (IOP Select) R. Venters, B.T. Helenbrook K. Zhang, M.C. Cheng, Proper Orthogonal Decomposition Based Thermal Modeling of Semiconductor Structures, IEEE TED, ol.59, No. 11, pp , E. Foreman, P.Habitz, M.C. Cheng, C. Visweswariah, A Novel Method for Reducing Metal Variation with Statistical Static Timing Analysis, IEEE Trans. CAD. ICs/Syst., vol. 31, pp , Y. Zhang, P. Pillay, M.C Cheng, Magnetic Characteristics and Core losses in Machine Laminations: High Frequency Loss Prediction from Low Frequency Measurements, IEEE Tran Industry Applications, Vol. 48, No. 2, pp , Y. Zhang, M.C Cheng, P. Pillay, A Novel Hysteresis Core Loss Model,for Magnetic Laminations, IEEE Tran Energy Conv, Vol. 26, No. 4, pp , E. Foreman, P. Habitz, M.C. Cheng, Christino Tamon, Inclusion of Chemical-Mechanical Polishing Variation in Statistical Static Timing Analysis, IEEE Trans. CAD. ICs & Syst., Vol. 30, pp , Y.X. Liang, Q. Dong, M.C. Cheng, U. Gennser, A. Cavanna, Y. Jin, Insight into low frequency noise induced by gate leakage current in AlGaAs/GaAs high electron mobility transistors at 4.2K, Applied Phys. Lett., Vol. 99, , M.C. Cheng, K. Zhang, An Effective Thermal Circuit Model for Electro-thermal Simulation of SOI Analog Circuits, Solid-State Electronics, 48 61, vol. 62, K. Zhang, M.C. Cheng, Thermal Circuit for SOI Structure Accounting for Non-Isothermal effect, IEEE Trans. Electron Devices, Vol 57, pp , 2010.