GENERAL PURPOSE DUAL-GATE GaAS MESFET
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1 GENERAL PURPOSE DUAL-GATE GaAS MESFET FEATU SUITABLE FOR USE AS RF AMPLIFIER IN UHF TUNER POWER GAIN AND NOISE FIGURE vs. DRAIN TO SOURCE VOLTAGE LOW CRSS:. pf (TYP) HIGH : db (TYP) AT 9 MHz LOW : 1.1 db TYP AT 9 MHz LG1 = 1. µm, LG = 1. µm, WG = 4 µm ION IMPLANTATION AVAILABLE IN TAPE & REEL OR BULK Power Gain, (db) VGS = 1 V VGS =. V VGS = V ID = ma f = 9 MHz Noise Figure, (db) DESCRIPTION Drain to Source Voltage, VDS (V) The NE1 is a dual gate GaAs FET designed to provide flexibility in its application as a mixer, AGC amplifier, or low noise amplifier. As an example, by shorting the second gate to the source, higher gain can be realized than with single gate MESFETs. This device is available in a mini-mold (surface mount) package. ELECTRICAL CHARACTERISTICS (TA = C) PART NUMBER PACKAGE OUTLINE 39 SYMBOL PARAMETERS AND CONDITIONS UNITS MIN TYP MAX Noise Figure at VDS = V, VGS = 1 V, ID = ma, f = 9 MHz db 1.1. Power Gain at VDS = V, VGS = 1 V, ID = ma, f = 9 MHz db 16 BVDSX Drain to Source Breakdown Voltage at VG1S = -4 V, VGS =, ID = µa V 13 IDSS Saturated Drain Current at VDS = V, VGS = V, VG1S = V ma 4 VG1S (OFF) Gate 1 to Source Cutoff Voltage at VDS = V, VGS = V, ID = µa V -3. VGS (OFF) Gate to Source Cutoff Voltage at VDS = V, VG1S = V, ID = µa V -3. IG1SS Gate 1 Reverse Current at VDS =, VG1S = -4V, VGS = µa IGSS Gate Reverse Current at VDS =, VGS = -4V, VG1S = µa YFS Forward Transfer Admittance at VDS = V, VGS = 1 V, ID = ma, f = 1. khz ms 18 3 CISS Input Capacitance at VDS = V, VGS = 1 V, ID = ma, f = 1 MHz pf CRSS Reverse Transfer Capacitance at VDS = V, VGS = 1 V, ID = ma, f = 1 MHz pf..3 California Eastern Laboratories
2 ABSOLUTE MAXIMUM RATINGS 1 (TA = C) SYMBOLS PARAMETERS UNITS RATINGS VDS Drain to Source Voltage V 13 VG1S Gate 1 to Source Voltage V -4. VGS Gate to Source Voltage V -4. ID Drain Current ma IDSS PT Total Power Dissipation mw TCH Channel Temperature C 1 TYPICAL NOISE PARAMETERS (TA = C) (VDS = V, VGS = V, IDS = ma) FREQ. OPT GA ΓOPT (GHz) (db) (db) MAG ANG Rn/ TSTG Storage Temperature C - to Operation in excess of anyone of these parameters may result in permanent damage. TYPICAL PERFORMANCE CURVES (TA = C) TOTAL POWER DISSIPATION VS. AMBIENT TEMPERATURE 3 DRAIN CURRENT vs. GATE 1 TO SOURCE VOLTAGE VDS = V Total Power Dissipation, PT (mw) 1 FREE AIR Drain Current, ID (ma) VGS = 1.V. V V -. V 7 1 Ambient Temperature, TA ( C) Gate 1 to Source Voltage, VG1S (V) FORWARD TRANSFER ADMITTANCE vs. GATE 1 TO SOURCE VOLTAGE FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT Forward Transfer Admittance, YFS (ms) 3 VDS = V f = 1kHz -. V VGS = 1.. V V Forward Transfer Admittance, YFS (ms) 3 VGS =. V VGS = 1. V VDS = V f = 1 khz Gate 1 to Source Voltage, VG1S (V) Drain Current, ID (ma)
3 TYPICAL PERFORMANCE CURVES (TA = C) Input Capacitance, CISS (pf). 1. INPUT ACITANCE vs. GATE TO SOURCE VOLTAGE VGS = 1 V at ID = ma1 VDS = V f = 1kHz 1 VGS = 1 V at ID = ma Power Gain, GP (db) POWER GAIN AND NOISE FIGURE vs. GATE TO SOURCE VOLTAGE 1 VDS = V VGS = 1 V ID = ma f = 9 MHz Noise Figure, (db) Gate to Source Voltage, VGS (V) 1. Initial bias conditions. VG1S set to obtain specified drain current Gate to Source Voltage, VGS (V) 1. Initial bias conditions. VG1S set to obtain specified drain current. Power Gain, GP (db) 1 POWER GAIN AND NOISE FIGURE vs. DRAIN CURRENT VDS = V VGS = 1 V f = 9 MHz Noise Figure, (db) Drain Current, ID (ma)
4 NONLINEAR MODEL UNITS FOR MODEL PARAMETERS Parameter Units time capacitance inductance resistance voltage current seconds farads henries ohms volts amps FET NONLINEAR MODEL PARAMETERS (1) Parameters FET1 FET Parameters FET1 FET UGW e-6 e-6 IDSOC.7.7 NGF 4 4 RDB 1.e9 1.e9 IS 8.78e- 8.78e- CBS.16e-1.16e-1 N GDBM.. RG KDB RD VDSM 7.1e e-11 RS GMMAXAC RIS GAMMAAC.7.1 RID KAPAAC.1. TAU.17e-1.17e-1 PEFFAC CDSO 1.19e e-13 VTOAC C11O 6.1e e-13 VTSOAC - - C11TH 1.6e e-13 VDELTAC.6.6 VIL GMMAX.4.34 DELTGS GAMMA.6. DELTDS KAPA.46. LAMBDA \ PEFF C11DELT VTO C1O VTSO - - C1SAT 6.81e e-14 VDELT.13.1 CGDSAT 6.81e e-14 VCH 1 1 KBK.3.3 VSAT VBR VGO NBR VDSO 3 (1) Libra EEFET3 Model
5 NONLINEAR MODEL SCHEMATIC Pdrain port = Cgd C =.1 Rd R = 4.8 P1 port = 3 IND Lg L =.4 Rg R = 1.44 EEFET3 FET UGW= N= FILE = NE7_b.mdif MODE = nonlinear C1 C =.3 Cg1d C =.64e-3 R1 R = 1.13 RDS R = 711 Pgate1 port = 1 IND Lg1 L = 1.6 Rg1 R = 1. EEFET3 FET1 UGW= N= FILE = NE7_b.mdif MODE = nonlinear CDS C = 7.6e- Cg1s C =.41 Rs R =.79 Cgs C =.39 IND Ls L = 1.78 UNITS Parameter Units capacitance picofarads inductance nanohenries resistance ohms NOTES: 1. This UGW value scales the model parameters on page 1.. This N value is the number of gate fingers and scales the model parameters on page 1. P4 port = 4 MODEL RANGE Frequency:.1 to Bias: VDS = V, Vg1s= -.78 V, Vgs= V, ID = ma
6 TYPICAL COMMON SOURCE SCATTERING PARAMETERS (TA = C) j j j j1 j S1 S1. S j -j -j -j -j1 -j Coordinates in Ohms Frequency in GHz (VDS = V, VGS = V, IDS = ma) S VDS = V, VGS = V, IDS = ma FREQUENCY S1 S1 K S1 MAG 1 (GHz) MAG ANG MAG ANG MAG ANG MAG ANG (db) (db) Gain Calculations: MAG = S1 K - 1 ). MAG = Maximum Available Gain MSG = Maximum Stable Gain (K ± When K 1, MAG is undefined and MSG values are used. MSG = S1, K = , = - S1 S1 S1 S1
7 TYPICAL COMMON SOURCE SCATTERING PARAMETERS (TA = C) j j j j j1 j S1 1. GHz j 1 -j -j VDS = V, VGS = 1 V, ID = ma -j -j1 -j -1 Coordinates in Ohms Frequency in GHz (VDS = V, VGS = 1 V, ID = ma) FREQUENCY S1 S1 (GHz) MAG ANG MAG ANG MAG ANG MAG ANG S K S1 MAG 1 (db) (db) Gain Calculations: MAG = S1 (K ± When K 1, MAG is undefined and MSG values are used. MSG = S1, K = , = - S1 S1 S1 S1 K - 1 ). MAG = Maximum Available Gain, MSG = Maximum Stable Gain OUTLINE DIMENSIONS (Units in mm).9 ±..9 PIN CONNECTIONS 1. Source. Drain 3. Gate 4. Gate PACKAGE OUTLINE 39 (SOT-143) (LEADS, 3, 4) ORDERING IORMATION PART AVAILABILITY IDSS RANGE MARKING NUMBER (ma) Bulk up to 3K - 4 -T1 3K/Reel - 4 U71 Bulk up to 3K - 1 U71 T1U71 3K/Reel - 1 U71 U7 Bulk up to 3K - U7 T1U7 3K/Reel - U7 U73 Bulk up to 3K - 3 U73 T1U73 3K/Reel - 3 U73 U74 Bulk up to 3K 3-4 U74 T1U74 3K/Reel 3-4 U74 to.1 All dimensions are typical unless otherwise specified. EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES Headquarters 49 Patrick Henry Drive Santa Clara, CA (48) Telex FAX (48) Hour Fax-On-Demand: (U.S. and Canada only) Internet: DATA SUBJECT TO CHANGE WITHOUT NOTICE 8/98
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IXTH80N65X2 V DSS. X2-Class Power MOSFET = 650V I D25. = 80A 38m. R DS(on) N-Channel Enhancement Mode Avalanche Rated TO-247 G D S
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General Purpose Transistors NPN and PNP Silicon These transistors are designed for general purpose amplifier applications. They are housed in the SOT 33/SC which is designed for low power surface mount
Features. R DS(on) = 25 C unless otherwise noted. Symbol Parameter Q2 Q1 Units
Dual Notebook Power Supply N-Channel PowerTrench SyncFet September General Description The is designed to replace two single SO-8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide
µtrenchmos standard level FET Low on-state resistance in a small surface mount package. DC-to-DC primary side switching.
M3D88 Rev. 2 19 February 23 Product data 1. Product profile 1.1 Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS technology. Product availability: in
An Angelov Large Signal Model and its Parameter Extraction Strategy for GaAs HEMT
TSINGHUA UNIVERSITY An Angelov Large Signal Model and its Parameter Extraction Strategy for GaAs HEMT Yan Wang Wenyuan Zhang Tsinghua University Outline Motivation Large Signal Model Parameter Extraction
N-channel µtrenchmos ultra low level FET. Top view MBK090 SOT416 (SC-75)
M3D73 Rev. 3 March 24 Product data. Product profile. Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS technology..2 Features Surface mounted package Low
IXBT20N360HV IXBH20N360HV
High Voltage, High Gain BIMOSFT TM Monolithic Bipolar MOS Transistor Advance Technical Information V CS = V = A V C(sat).V TO-HV (IXBT) Symbol Test Conditions Maximum Ratings V CS = C to C V V CGR = C
DATA SHEET. BC556; BC557 PNP general purpose transistors DISCRETE SEMICONDUCTORS. Product specification Supersedes data of 1997 Mar 27.
DISCRETE SEMICONDUCTORS DATA SHEET book, halfpage M3D186 Supersedes data of 1997 Mar 27 FEATURES Low current (max. 100 ma) Low voltage (max. 65 V). APPLICATIONS General purpose switching and amplification.
DATA SHEET. BF1203 Dual N-channel dual gate MOS-FET DISCRETE SEMICONDUCTORS. Product specification Supersedes data of 2000 Dec 04.
DISCRETE SEMICONDUCTORS DATA SHEET andbook, halfpage MBD12 BF123 Dual N-channel dual gate MOS-FET Supersedes data of 2 Dec 21 Apr 25 BF123 FEATURES Two low noise gain controlled amplifiers in a single
DATA SHEET. BSD22 MOSFET N-channel depletion switching transistor DISCRETE SEMICONDUCTORS
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Matched N-Channel JFET Pairs
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TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-mosvi) 2SK3567
SK7 TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-mosvi) SK7 Switching Regulator Applications Unit: mm Low drain-source ON resistance: RDS (ON) =.7Ω (typ.) High forward transfer admittance:
TPC8203 TPC8203. Lithium Ion Battery Applications Portable Equipment Applications Notebook PCs. Maximum Ratings (Ta = 25 C) Circuit Configuration
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U MOSII) TPC8203 Lithium Ion Battery Applications Portable Equipment Applications Notebook PCs Unit: mm Small footprint due to small and thin
PHP/PHB/PHD45N03LTA. TrenchMOS logic level FET
Rev. 3 2 October 22 Product data 1. Description N-channel logic level field-effect power transistor in a plastic package using TrenchMOS technology. Product availability: PHP45N3LTA in SOT78 (TO-22AB)
PHP/PHB/PHD55N03LTA. TrenchMOS Logic Level FET
Rev. 4 4 September 22 Product data 1. Description N-channel logic level field-effect power transistor in a plastic package using TrenchMOS technology. Product availability: PHP55N3LTA in a SOT78 (TO-22AB)
P-Channel Enhancement Mode Mosfet
WPM34 WPM34 P-Channel Enhancement Mode Mosfet Features Higher Efficiency Extending Battery Life Miniature SOT3-3 Surface Mount Package Super high density cell design for extremely low RDS (ON) http://www.willsemi.com
Monolithic N-Channel JFET Dual
N98 Monolithic N-Channel JFET Dual V GS(off) (V) V (BR)GSS Min (V) g fs Min (ms) I G Max (pa) V GS V GS Max (mv). to. Monolithic Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: pa Low
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DISCRETE SEMICONDUCTORS DATA SHEET File under Discrete Semiconductors, SC14 September 1995 DESCRIPTION PINNING NPN silicon planar epitaxial transistor in a plastic SOT3 envelope. It is primarily intended
Type Marking Pin Configuration Package BFR93AW R2s 1=B 2=E 3=C SOT323
NPN Silicon RF Transistor For low distortion amplifiers and oscillators up to 2 GHz at collector currents from 5 ma to 30 ma 3 1 2 Pbfree (RoHS compliant) package Qualified according AEC Q1 ESD (Electrostatic
N-Channel Dual Gate MOS-Fieldeffect Tetrode, Depletion Mode. Low feedback capacitance Low noise figure
N-Channel Dual Gate MOS-Fieldeffect Tetrode, Depletion Mode Applications Electrostatic sensitive device. Observe precautions for handling. Input and mixer stages especially for VHF TV-tuners. Features
PMN40LN. 1. Description. 2. Features. 3. Applications. 4. Pinning information. TrenchMOS logic level FET
M3D32 Rev. 1 13 November 22 Product data 1. Description N-channel logic level field-effect power transistor in a plastic package using TrenchMOS technology. Product availability: in SOT457 (TSOP6). 2.
MMBFJ309L, MMBFJ310L, SMMBFJ309L, SMMBFJ310L. JFET - VHF/UHF Amplifier Transistor. N Channel
MMBFJ9L, MMBFJL, SMMBFJ9L, SMMBFJL JFET - VHF/UHF Amplifier Transistor NChannel Features Drain and Source are Interchangeable S Prefix for Automotive and Other Applications Requiring Unique Site and Control
PHP/PHB174NQ04LT. 1. Product profile. 2. Pinning information. N-channel TrenchMOS logic level FET. 1.1 Description. 1.2 Features. 1.
Rev. 1 12 May 24 Product data 1. Product profile 1.1 Description Logic level N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS technology. 1.2 Features Logic level
IXTT16N10D2 IXTH16N10D2
epletion Mode MOSFET N-Channel V SX = V I (on) > 16A R S(on) 6m G TO-268 (IXTT) S G S (Tab) Symbol Test Conditions Maximum Ratings V SX = C to 17 C V V GX = C to 17 C, R GS = 1M V X Continuous 2 V M Transient
Pb-free (RoHS compliant) package Qualified according AEC Q101 C1 (2) Type Marking Pin Configuration Package BCV62A BCV62B BCV62C 2 = C1 2 = C1 2 = C1
PNP Silicon Double Transistor To be used as a current mirror Good thermal coupling and V BE matching High current gain Low collector-emitter saturation voltage 1 2 Pb-free (RoHS compliant) package Qualified
PHP7NQ60E; PHX7NQ60E
Rev. 1 2 August 22 Product data 1. Description N-channel, enhancement mode field-effect power transistor. Product availability: PHP7NQ6E in TO-22AB (SOT78) PHX7NQ6E in isolated TO-22AB. 2. Features Very
OptiMOS 2 Small-Signal-Transistor
OptiMOS Small-Signal-Transistor Features Dual N-channel Enhancement mode Ultra Logic level (1.8V rated) Avalanche rated Qualified according to AEC Q11 1% lead-free; RoHS compliant Product Summary V DS
TPCP8402 TPCP8402. Portable Equipment Applications Mortor Drive Applications DC-DC Converter Applications. Maximum Ratings (Ta = 25 C)
TOSHIBA Field Effect Transistor Silicon P, N Channel MOS Type (U-MOS IV / U-MOS III) TPCP8402 Portable Equipment Applications Mortor Drive Applications DC-DC Converter Applications Unit: mm Low drain-source
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-mosvi) 2SK3767
SK77 TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-mosvi) SK77 Switching Regulator Applications Unit: mm Low drain-source ON resistance: RDS (ON) =.Ω (typ.) High forward transfer admittance:
MOC205-M MOC206-M MOC207-M MOC208-M
DESCRIPTION These devices consist of a gallium arsenide infrared emitting diode optically coupled to a monolithic silicon phototransistor detector, in a surface mountable, small outline, plastic package.
N-channel TrenchMOS logic level FET
M3D315 Rev. 3 23 January 24 Product data 1. Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS technology. 2. Features Low on-state resistance Fast switching
Vrg Qgd Gdg Vrd Gate Rg Rd Vgd Vgs Qds Ids = f(vds,vgs,t Qgs Ids Vds Idiode_f = f(vds Idiode_r = f(vdiode_r,t Ggs Qds = f(vds,t Qgs = f(vgs,t Vrs Rs Q
Motorola s Electro Thermal (MET LDMOS Model 1. Description of the Model The MET LDMOS model [1] is an electro thermal model that can account for dynamic selfheating effects and was specifically tailored
TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type (U MOSIII) 2SJ668
TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type (U MOSIII) 2SJ668 Relay Drive, DC/DC Converter and Motor Drive Applications Unit: mm 4 V gate drive Low drain source ON-resistance: R DS (ON)
2SK1169, 2SK1170. Silicon N-Channel MOS FET. Application. Features. Outline. High speed power switching
Silicon N-Channel MOS FET Application High speed power switching Features Low on-resistance High speed switching Low drive current No secondary breakdown Suitable for switching regulator and DC-DC converter