Monolithic N-Channel JFET Duals
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1 Monolithic N-Channel JFET Duals N96/97/98/99 Part Number V GS(off) (V) V (BR)GSS Min (V) Min (ms) I G Max (pa) V GS V GS Max (mv) N96.7 to N97.7 to N98.7 to N99.7 to Monolithic Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: pa Low Noise High CMRR: db Tight Differential Match vs. Current Improved Op Amp Speed, Settling Time Accuracy Minimum Input Error/Trimming Requirement Insignificant Signal Loss/Error Voltage High System Sensitivity Minimum Error with Large Input Signal Wideband Differential Amps High-Speed, Temp-Compensated, Single-Ended Input Amps High Speed Comparators Impedance Converters The N96/97/98/99 JFET duals are designed for high-performance differential amplification for a wide range of precision test instrumentation applications. This series features tightly matched specs, low gate leakage for accuracy, and wide dynamic range with I G guaranteed at V DG = V. The hermetically-sealed TO-7 package is available with full military processing (see Military Information and the N/6/7JANTX/JANTXV data sheet). For similar products see the low-noise U/SST series, the high-gain N9/9, and the low-leakage U/ data sheets. TO-7 S G 6 D D G S Top View Gate-Drain, Gate-Source Voltage V Gate Current ma Lead Temperature ( / 6 from case for sec.) C Storage Temperature to C Operating Junction Temperature to C Document Number: 7 S- Rev. D, -Jun- Power Dissipation : Per Side a mw Total b mw Notes a. Derate mw/c above 8C b. Derate mw/c above 8C 8-
2 N96/97/98/99 Static N96 Limits N97 Parameter Symbol Test Conditions Typ a Min Max Min Max Unit Gate-Source Breakdown Voltage V (BR)GSS I G = A, V DS = V 7 Gate-Source Cutoff Voltage V GS(off) V DS = V, I D = na.7.7 Saturation Drain Current b I DSS V DS = V, V GS = V ma V GS = V, V DS = V pa Gate Reverse Current I GSS T A = C na V DG = V, I D = A pa Gate Operating Current I G T A = C.8 na Gate-Source Voltage V GS V DG = V, I D = A V Dynamic Input Capacitance Reverse Transfer Capacitance C iss C rss V DS = V, V GS = V f = khz V DS = V, I D = A f = khz V DS = V, V GS = V f = MHz. ms S ms S 6 6 Equivalent Input Noise Voltage e n V DS = V, V GS = V, f = khz 9 Noise Figure Matching NF V DS = V, V GS = V f = Hz, R G = M V pf nv Hz.. db Differential Gate-Source Voltage V GS V GS V DG = V, I D = A mv Gate-Source Voltage Differential Change with Temperature V GS V GS T V DG = V, I D = A T A = to C V/C Saturation Drain Current Ratio I DSS I DSS V DS = V, V GS = V Transconductance Ratio Differential VDS V = V, I D = A f = khz S Differential Gate Current I G I G V DG = V, I D = A, T A = C. na Common Mode Rejection Ratio c CMRR V DG = to V, I D = A db 8- Document Number: 7 S- Rev. D, -Jun-
3 N96/97/98/99 Static N98 Limits N99 Parameter Symbol Test Conditions Typ a Min Max Min Max Unit Gate-Source Breakdown Voltage V (BR)GSS I G = A, V DS = V 7 Gate-Source Cutoff Voltage V GS(off) V DS = V, I D = na.7.7 Saturation Drain Current b I DSS V DS = V, V GS = V ma V GS = V, V DS = V pa Gate Reverse Current I GSS T A = C na V DG = V, I D = A pa Gate Operating Current I G T A =C.8 na Gate-Source Voltage V GS V DG = V, I D = A V Dynamic. ms V DS = V, V GS = V, f = khz S V DS = V, I D = A f = khz ms S Input Capacitance C iss 6 6 Reverse Transfer Capacitance C rss V DS = V, V GS = V, f = MHz Equivalent Input Noise Voltage e n V DS = V, V GS = V, f = khz 9 Noise Figure Matching NF V DS = V, V GS = V f = Hz, R G = M V pf nv Hz.. db Differential Gate-Source Voltage V GS V GS V DG = V, I D = A mv Gate-Source Voltage Differential Change with Temperature V GS V GS T V DG = V, I D = A T A = to C V/C Saturation Drain Current Ratio I DSS I DSS V DS = V, V GS = V Transconductance Ratio Differential VDS V = V, I D = A f = khz S Differential Gate Current I G I G V DG = V, I D = A, T A = C. na Common Mode Rejection Ratio c CMRR V DG = to V, I D = A 97 db Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NQP b. Pulse test: PW s duty cycle %. c. This parameter not registered with JEDEC. Document Number: 7 S- Rev. D, -Jun- 8-
4 N96/97/98/99 Drain Current and Transconductance vs. Gate-Source Cutoff Voltage na Gate Leakage Current I DSS Saturation Drain Current (ma) I DSS I V DS = V, V GS = V DG = V, V GS = V f = khz (ms) I G Gate Leakage na na pa pa pa I I D = A T A = C I C A A A I C T A = C. pa V GS(off) Gate-Source Cutoff Voltage (V) V DG Drain-Gate Voltage (V) V GS(off) = V V GS(off) = V V GS = V. V V GS = V. V. V.6 V.8 V. V. V.6 V.9 V. V. V.8 V. V. V. V V GS(off) = V V GS(off) = V V GS = V. V.6 V GS = V. V..6 V..8.. V.6 V.8 V. V. V. V....9 V. V. V.8 V. V.6 V V Document Number: 7 S- Rev. D, -Jun-
5 N96/97/98/99 t Transfer Characteristics V GS(off) = V V DS = V Gate-Source Differential Voltage V DG = V T A = C T A = C C (mv) V GS V GS N99 N96 C..... V GS Gate-Source Voltage (V).. Voltage Differential with Temperature Common Mode Rejection Ratio V GS V GS ( V/ C ) V DG = V T A = to C T A = to C N99 N96 CMRR (db) CMRR = log V DG = V V V DG V GS V GS A V Voltage Gain 8 6. Circuit Voltage Gain V GS(off) = V A V R L R L Assume V DD = V, V DS = V R L V I D V GS(off) = V. r DS(on) Drain-Source On-Resistance ( Ω ) k 8 6 On-Resistance V GS(off) = V V GS(off) = V.. Document Number: 7 S- Rev. D, -Jun- 8-
6 N96/97/98/99 Input Capacitance vs. Gate-Source Voltage Reverse Feedback Capacitance vs. Gate-Source Voltage Ciss Input Capacitance (pf) 8 6 f = MHz V DS = V V V V Crss Reverse Feedback Capacitance (pf) f = MHz V DS = V V V V V GS Gate-Source Voltage (V) V GS Gate-Source Voltage (V) Equivalent Input Noise Voltage vs. Frequency. V DS = V V GS(off) = V V DS = V f = khz en Noise Voltage nv / Hz 6 8 I A V GS = V (µs).... C T A = C C k k k f Frequency (Hz)... k On-Resistance and vs. Gate-Source Cutoff Voltage (ms).... V GS(off) = V C T A = C C V DS = V f = khz.. r DS(on) Drain-Source On-Resistance ( Ω ) 8 6 r DS r I D = A, V GS = V DS = V, V GS = V, f = khz 8 6 gos (S) V GS(off) Gate-Source Cutoff Voltage (V) 8-6 Document Number: 7 S- Rev. D, -Jun-
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