Analysis of Phase Noise and Jitter in Ring Oscillators

Transcription

1 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., Analysis f Phase Nise and Jitter in Ring Oscillatrs Shruti Suman 1* K. G. Sharma P. K. Ghsh 1 1.ECE Department, Cllege f Engineering and Technlgy, Mdy University f Science and Technlgy, akshmangarh, Rajasthan, India.ECE Department, CCET, Chandigarh, India Abstract Vltage cntrlled scillatrs (VCOs) have gain paramunt imprtance in frequency mdulatin (FM) and pulse mdulatin (PM) circuits, phase lcked lps (Ps), functin generatrs, frequency synthesizers etc. which are vital fr cmmunicatin circuits. CMOS based ring scillatrs have tuning range, tuning gain and phase nise as the imprtant characteristics. The mst difficult task is that variatin f phase due t stchastic perturbatins. Phase nise has been the designer s primary cncerned. The effect f scillatr s nise is ne f the mst insightful issues in the designing f mdern RF telecmmunicatin systems. A lw phase nise with minimum pwer dissipatin is rapidly preferred criteria fr the design f vltage cntrlled ring scillatrs (VCROs). A very simple and precise analysis f different phase nise mdels f ring VCOs and their causes is analyzed in this paper. Fr each case, the flicker nise and the white nise cmpnent f phase nise and jitter are cnsidered which limits the signal. The imprtant elements that determine the phase nise in VCOs are the transistr's flicker nise ( 1 f nise), the utput pwer level, and the quality factr (Q). A synchrnized relatinship amng the effective nise cmpnents in the scillatry circuits leads t gd agreement fr new design insights and als imprves the perfrmance. Keywrds: Ring Oscillatrs, Vltage Cntrlled Oscillatr, Vltage Cntrlled Ring Oscillatr, Phase nise, jitter. 1. Intrductin Vltage cntrlled ring scillatrs (VCOs) are categrized amng the class f scillatrs where the frequency f the utput scillatin can be varied by the biasing f a cntrlled vltage signal. They are fundamental electrnic mdules in the wide sectrs f cmmunicatin. They have variety f applicatins such as RF transceivers, mdulatr and demdulatr, radi frequency identificatin devices (RFID) transpnders [Rezvan Dastanian, Ebrahim Abiri, Mhammad Reza Salehi, Saeed Ghrbani (015)] medical dmains [Ahmet Tekin, Mehmet R. Yuce, and Wentai iu (008)] and clck data recvery circuit [Shruti Suman, K. G. Sharma, P. K. Ghsh (015)]. Extensive research has been dne fr mdeling f VCOs which is cncerned with its instantaneus phase alng with the signal amplitude and wavefrm shape. Cnsequently, mdeling is ften dne in the phase dmain. Phase nise is the frequency dmain representatin f rapid shrt term randm fluctuatins in the phase f the wavefrm caused by time dmain instabilities (jitter). Phase nise and jitter bth indicate the stability f signal and are interrelated. Basically phase nise is the instability f a frequency expressed in frequency dmain; while jitter is fluctuatin f the signal wavefrm in the time dmain. The phase nise is a critical parameter which can cmpare the perfrmance f VCO. The utput f a practical scillatr can be written as (1) Here A is the amplitude f scillatr V ut ( t) = Acs( ω t+ φ) ω is the scillatin frequency and φ is the inherent phase. The utput f ideal scillatr is shwn in Figure1 (a). Hwever, the scillatr is affected by internal and external nise. This nise makes an amplitude and phase fluctuatin. The utput f actual scillatr can be given by Equatin () as () V ut ( t) = A( t) f ( ω t+ φ) The functin f is peridic in π then, A(t) and φ(t) are mdeled as the fluctuatin f amplitude and phase, respectively. The amplitude can be riginally restred by the amplitude mechanism. Hwever, the phase nise can t be brught back t the frmer state. The phase variatin is very imprtant and significantly cnsidered. In rder t mathematically understand the phase nises the utput f the actual scillatr as shwn in Figure 1(b). In the Figure 1, ω is the scillatin frequency, ω is the ffset frequency. T quantify the phase nise, a unit bandwidth is cnsidered at an ffset is given by Equatin () as ω with respect t ω.thus the equatin fr describing t the phase nise 1

2 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., ttal p { ω} = 10lg sideband ( ω + ω,1hz ) pcarrier Equatin () describes the phase nise which is nise pwer in a unit bandwidth divided by carrier pwer. The value f phase nise can be different accrding t the ffset frequency. Fr the lw phase nise the nise pwer in the unit bandwidth shuld be small and the pwer f the carrier shuld be large. The instantaneus frequency f a VCO is generally mdeled as a linear relatinship with its instantaneus cntrl vltage [Shruti Suman, K. G. Sharma and P. K. Ghsh (016)]. Figure shws that the utput phase f the scillatr is the integral f the instantaneus frequency as expressed in Equatin (4) as f( t) = f + K. vctrl( t) (4) φ t ( t) = f ( t)dt () (5) Where, f (t) is the instantaneus frequency f the scillatr at time t, scillatr, K is called the scillatr sensitivity, r gain (Hertz per Vlt). ) f is the quiescent frequency f the φ (t is the VCO's utput phase, is the time-dmain cntrl input r tuning vltage f the VCO. Fr analyzing a cntrl system, the aplace transfrms f the abve signals are useful; mathematically can be expressed as Equatins (6) and (7) as F( s) = K vctrl( s) (6). ( s) F (7) θ ( s ) = s In general CMOS circuits are sensitive t pwer supply, temperature variatins as well as nise generated in IC s. Due t these effects, the prpagatin delay is variable with respect t its nminal value called as jitter. In an ideal scillatr, the spacing between transitins is cnstant but practically the transitin spacing is variable. This uncertainty is knwn as clck jitter and increases with measurement interval T (i.e., the time delay between the reference and the bserved transitins). This variability accumulatin ( jitter accumulatins ) ccurs because any uncertainty in an earlier transitin affects all the fllwing transitins, and its effect persists indefinitely. Fr ring scillatrs with identical stages, the variance will be given by s V ctrl mσ s where m is the number f transitins during T and σ is the variance f the uncertainty intrduced by ne stage during ne transitin. Nting that m is prprtinal t T, the standard deviatin f the jitter after T secnds is (8) σ T = k T Where k is prprtinality cnstant which can be determined by circuit parameters. Anther instructive special case that is nt usually cnsidered is when the nise surces are ttally crrelated with ne anther. In this case, the standard deviatins rather than the variances add. Therefre, the standard deviatin f the jitter after T secnds is prprtinal t T as given by Equatin (9) as σ T = ς T (9) whereς is als a prprtinality cnstant. In mst digital applicatins, it is desirable t decrease at the same rate as the peridt. In practice, we wish t keep cnstant the rati f the timing jitter t the perid. Therefre, in many applicatins, phase jitter, which is is a mre useful measure can be defined by Equatin (10) as (10) σ T σ φ = π T = ω σ T Phase nise study f an scillatr cnsiders its transfer functin as linear with respect t infinitesimally small input nise perturbatins t utput phase. Frm scillatr thery, tw cnditins are required t make a feedback system t scillate: the pen lp gain must be greater than unity; and ttal phase shift must be 60 at the frequency f scillatin. Oscillatr has psitive feedback lp at selected frequency which is f keen interest [Vaishali, Shruti Suman, K. G. Sharma, P. K. Ghsh (014)]. It is seen that frequency f such scillatin can be increased by decreasing the number f stages r by altering device dimensins, which ften end up disastrusly increasing the pwer cnsumptin. The dd numbers f stages are well suited fr single ended scillatrs and

3 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., will always scillate whereas differential cnfiguratins can have bth dd as well as even number stages such that ne stage des nt invert. Such differential even number f stages f is useful fr generating quadrature r multiphase utputs [B. Razavi (001)]. Thus, prper frequency stability is necessary fr peratin f the scillatr [Adel S.Sedra and Kenneth C.Smith (01)]. Frequency Stability is a measure f the degree t which an scillatr maintains the same value f frequency ver a given time. Phase nise is the shrt-term randm frequency fluctuatins f a signal which is measured in the frequency dmain, and is expressed as a rati f signal pwer t nise pwer measured in a 1 Hz bandwidth at a given ffset frm the desired signal. In ther way, it is a measurement f uncertainty in phase f a signal. Bth the systemic nise and the randm nise cntribute t the phase nise f the ring scillatr. The systemic nise such as cmmn-mde supple nise can be avided by using symmetric architectures, while the influence f the randm nise such as thermal nise and flicker nise cannt be easily alleviated. There are varius ways f imprving phase nise such as increasing the width f the device and minimizing the channel length, which als add the pwer dissipatin and many mre. This paper prvides designers with an verview f phase nise and jitter. The sectin gives relatinship between phase nise and jitter. Sectin fcuses n describing different mdels f phase nise and jitter and their impact n system perfrmance, and identifies techniques t minimize them. Sectin 4 gives cnclusin and future scpes.. Relatinship between Phase Nise and Jitter Phase nise and jitter are different ways f quantifying the same phenmenn but in different dmains. Phase nise is the frequency dmain representatin f randm fluctuatins in the phase f a wavefrm. A high vltage swing with imprved linearity f delay helps minimizing ring scillatr phase nise. Jitter is a randm variatin f the signal in time dmain and essentially describes hw far the signal perid shws variatin frm its ideal value. These ccur due t are identifiable interference signals; due t crsstalk between adjacent signal traces, EMI radiatin surces in signal path, substrate nise and switching. Fr high speed circuits the prime requirement is f ptimizatin f phase nise and jitter. This nise spreads the signal t adjacent frequencies, resulting in nise sidebands. The phase nise is typically expressed in dbc Hz and represents the amunt f signal pwer at a given sideband r ffset frequency frm the ideal carrier frequency [6]. Hence jitter is the time dmain instability f the signal, usually expressed in picsecnds. There are three regins shwn in Figure, the flat regin( 1 f ) at large ffset frequency is the nise flr. The ( 1 f ) regin is referred t as the white frequency variatin regin, since it is due t white, r uncrrelated, fluctuatins in the perid f the scillatr. The behavir in this regin is dminated by the thermal nise in the devices f the scillatr circuit. At sufficiently lw ffset frequencies the flicker nise f devices usually cmes int play and the spectrum in this regin falls as ( 1 f ) [James Wilsn (010)]. The first step in calculating the equivalent RMS jitter is t btain the integrated phase nise pwer ver the desired range f frequency i.e., the area f the curve, A. The curve is divides int smaller f individual areas (A1, A, A, A4), as shwn in Figure 4 and each ne defined by tw data pints. Generally the upper frequency range fr the integratin shuld be twice the sampling frequency. The integratin f each individual area yields individual pwer ratis. These ratis are then summed and cnverted back int dbc. Once the integrated phase nise pwer is knwn, the RMS phase jitter in radians is given by the equatin as shwn belw in Equatin (11) [Ulrich. Rhde (198)]. 10 RMS Phase Jitter ( radians ) =.10 A (11) Divisin f Equatin (11) by πf cnverts the jitter in radians t jitter in secnds given in Equatin (1) as RMS Phase Jitter (Secnds ) = A 10 Althugh the use f a deep submicrn prcess allws the pssibility f higher VCO frequency, it als intrduces the prblem f a higher 1/f nise. The high 1 device nise in the deep submicrn prcess. Even thugh the.10 πf 1 f phase nise is due t the pr f (1) 1 f phase nise crner can be significantly, lwered by imprving wavefrm symmetry [Adnan Gundel (007)], the applicability is limited fr ring scillatrs since it is impssible t get symmetric rising and falling edges. Differential ring scillatrs d nt have symmetry advantage ver single-ended peers since it is the symmetry f the half circuits that matters.

4 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., Analysis f Phase Nise using Different Mdels The advantage f differential VCO cmpared t single-ended VCO is the superir cmmn-mde nise (i.e. pwer supply and substrate nise) rejectin ability. Therefre, the differential VCO is mre suitable fr mdern mixed-signal IC n-chip envirnment, in which the digital circuitry will generate a substantial amunt f pwer supply and substrate nise. Since the transitin f each stage is triggered by the previus stage, at a single time nly ne stage in the ring is switching and thus cntributing jitter [Bris Drakhlis (001)]. Therefre the jitter analysis fr the CMOS inverter is the best way t characterize the capacity f jitter ptimizatin fr different semicnductr prcesses. The phase nise f the differential ring scillatr ( ω) has an inverse relatinship with the cntrl current and the vltage swing [A. Hajimiri and T. H. ee (1998)] as (1) The ttal average nise pwer density (PSD) as given in Equatin (14) as The average nise pwer n n KT f I. V ( ω ) =. cntrl P in a particular frequency band can be fund by integrating the pwer spectral P f n =. f1 PSD( f)df P fr any randm prcess can be expressed as T 1 P n = lim v n ( t)dt. T T T Nise vltage V n can be given as T v n ( t) = 4KTR Als, switching time fr each cycle is defined in Equatin (17) C V T = DD I Here, C is the lad capacitance at the utput f each nde, DD is the pwer supply vltage and is the current in the device during peratin. Hence, fundamental nise analysis dne fr ring scillatr yields average P n nise pwer ( ) as the functin f time cnstant, delay at each stage and scillatin frequency which can be given by equatin (18) (18) T 4KTR P n = T 1+ F RC t ( π ) where T is the scillatin perid, is n-time f the transistr per delay cell, F0 is the ffset frequency f the carrier signal, RC is the time cnstant f the delay cell, and K is the Bltzmann s cnstant having value 1.8 x 10 - J/K. 0.1 essn s Mdel An early ne-prt mdel fr the phase nise spectrum f scillatrs was frmulated by D.B essn s [J. McNeill (1997)]. Variatins f this mdel is presently taken fr the mdeling f phase nise in scillatrs reveals relatinship between sht nise, pwer and quality factr. The phase nise can be clsely related by equatin (19) as V (14) (15) (16) (17) I 4

5 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., 017 ( w) ω 1 KTF ω + f = 10 lg 1+ 1 p Q ω ω (19) where K is the Bltzmann s cnstant having value 1.8 x 10 - J/K, is the average signal pwer dissipated, is the abslute temperature, F is fitting parameter fr figure f nise, is crner angular frequency between 1 and 1 cmpnents f flicker nise and f f Q is quality functin f the scillatr, ω is frequency ffset frm the carrier ( Hz) and ω 0 = carrier frequency (Hz) which is expressed as given by Equatin (1) as Q= f db Here in equatin (1), this input phase nise spectrum is expected t have tw regins. One regin is due t the α additive white nise, FKT/Ps at frequencies arund the scillatr frequency. The secnd regin is due t ω intrduced by parameter variatin at lw frequencies. This includes bth white nise and flicker nise which has a pwer spectral density inversely prprtinal t frequency. When Q increases due t decrease in -db bandwidth results in sharpening f the peak in magnitude respnse. The analysis f nise in the system can be dne by keeping in mind evaluatin f nise added at the input, nise current generated due t the surces and thermal actins.. Razavi s Mdel In Razavi s mdel fr nise analysis an scillatr is cnsidered as tw prt feedback system. These scillatrs T w f the ring scillatr in frequency dmain with functin f average pwer P give utput phase nise { } as given by fllwing equatins () and () as Y X [ j( ω + ω) ] S ( ω) = α KTF = + ω P ω 1f T ( ω) 1 da dω dφ + dω In an scillatr with largeq, the required instantaneus change in frequency fr given phase shift is smaller, thus giving better frequency stability. This mdel adpts TI apprach t mdel differential CMOS ring scillatrs as given in Equatin () as () ( ) 16 KTR ω ω = 10.lg V ω swing It can be said that the input and the utput ndes f any f the delay stages never reach the balanced state tgether. Therefre, inverter based ring scillatr never act as a linear amplifier during the transitins. Hence its phase nise cannt be analyzed with linearity assumptin.. Hajimiri Mdel A mre accurate linear time invariant mdel is develped by Hajimiri and ee [A. Hajimiri and T. H. ee (1998), Dnhee Ham, Ali Hajimiri (00)]; which intrduces Impulse sensitivity functin t undertake effects f P () (0) (1) avg 5

6 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., cyclstatinarity virtue f nise. Phase change is prprtinal t change in vltage hence can be written as in Equatin (4) as V q (4) ϕ =Γ( ωτ) =Γ( ωτ) Vmax qmax Γω ( τ ) where is the time-varying prprtinality cnstant called as impulse sensitivity functin. Phase nise depends n the time when the nise current is injected. Oscillatrs have different nise sensitivity at different time instants ver the perid. It accunts fr cyclstatinarity thrugh mdulated ISF which can be given by Equatin (5) as (5) ϕ ( ) ( τ)( τ) τ t = hφ t, i d A nise current cmpnent i (t), whse frequency is near an integer multiple (n) f the scillatin frequency has the frm f equatin (6) which further yields simplified equatin (7) as fllws (6) i( t) = In cs [( nω + ω) t] (7) in Γ rms ( w) = 10 lg ( ) Q max ω i n Γ Here, rms is the rt mean square (RMS) value f the ISF, where is the ttal square nise spectral density per hertz fr lng channel CMOS transistrs, which can be expressed mathematically as in Equatin (8) [J. McNeill (1997)]. (8) in 4KT = µ effqinv Q inv =CxWVeff γ (9) As the linearized bulk charge, surface ptential at surce and surface ptential at the drain plays vital significant therefre, drain surce cnductance cmes int design given by Equatin (0) as W (0) g d = µ effcx Veff The equatin (8) can be mdified as (1) in A = 4KTγgd Here, with γ = / fr MOSFETs in the saturatin regin and γ varies frm / t 1 as the drain-t surce vltage V DS varies frm zer t the nset f the saturatin. Fr lng-channel MOSFETs in the saturatin regin, the value can be expressed as given in equatin () as in = KTµ effcx 8 With the advancement, wavefrm symmetry is f great imprtance fr minimizatin f phase nise strngly dependent n the scillatin amplitude. Fr shrt channel nise, the linearity criteria fr resistance and channel length des nt satisfy due t degraded charge carrier mbility; als the γ (excess nise factr due t ht electrn effect ) bserved t be tw r three times larger than that f lng-channel MOS transistrs in saturatin. Hz W Veff () 6

7 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., These mdels fr nn-linearity, is prescribed t btain time dependent sensitivity in the scillatrs. Therefre, the dependency f the scillatin frequency n the channel length is given by fllwing equatin () as 1 () in α 1 ff c pp when c.4 Demir s Mdel This mdel is cmplex, pure mathematical based and invlves n circuit intuitin. This mdel is nn linear, mathematically invlved and CAD riented. It can be described by ne dimensinal differential equatin. Q- factr definitin is nt utilized thrughut analysis. It develps slid fundatin f phase nise regardless f perating mechanism. It requires slving f cmplex differential equatins but mre accurate. It s able t predict injectin lcking behavir f scillatr hence its universal mdel. Demir s mdel represents scillatr by a grup f equatins in the frm as expressed by Equatins (4) [Ali Hajimiri and Thmas H. ee (00)] as (4) x( t) = f( x( t) ) τ When the scillatr is perturbed by a small perturbatin b (t), the utput vltage where v (t) is the rbital deviatin. Finally the phase nise resulting frm the vltage perturbatin b(t) can be btained by slving the fllwing ne dimensinal differential equatin (5) as θ (5) = v( t+ θ( t) ) Bt ( + θ( t) )( b( t) ) τ.5 Ham s Mdel This mdel is recent and cntributins in the scenari f phase nise and jitter dmains which act as a bridge between cnventinal and existing nise theries. It is simple and intuitive mdel which is valid fr bth TI and TV mdeling f phase nise. In this mdel, cncept f virtual damping rate is taken as a fundamental measure f phase nise [Y. Tsividis (1988), Asad A. Abidi (006), A. Demir (1998)]. This mdel is capable t explain up cnversin, dwn cnversin f nise in the vicinity f integral multiple f scillatin frequency. Analysis using this nt requires lng simulatin time and des nt have cmputatinal verhead. Cnsidering that all scillatrs start scillating at the same time instant, it s fund that the ensemble average ver time exhibits expnential damping. If the phase diffusin is due t white nise, the variance f which signifies the width f the prbability distributin is given by equatin (6) as (6) ϕ ( t) = DT Here phase diffusin cnstant D is the reciprcal f the expnential time cnstant in damping f ensemble/time average and is als called as virtual damping rate. Fr TV analysis time varying effects are taken in t accunt fr evaluating diffusin cnstant. Cnclusin With the scaling f technlgy in the recent years, high density f integratin and fast speed are challenges t the design cnsideratins such as pwer supply, stability and phase nise in circuits. The majr fcus has been laid n lw phase nise and lw jitter devices. Imprtant VCO phase nise mdels such as essn s linear mdel, Razavi s Mdel and Hajimiri s time-variant mdel were analyzed. Abidi s mdel was studied fr the phase nise and jitter prcess in CMOS inverter-based and differential ring scillatrs. Demir s and Hem s Mdels are als discussed. A time-dmain jitter calculatin methd is used t analyze the effects f white nise, while randm VCO mdulatin is used fr flicker nise. Analysis shwed that in differential ring scillatrs, white nise in the differential pairs dminates the jitter and phase nise, whereas the phase nise due t flicker nise arises mainly frm the tail current. This analysis aids better understanding f phase and jitter phenmena. Apt minimizatin f nise distrtin in the circuits leads t high perfrmances. References Rezvan Dastanian, Ebrahim Abiri, Mhammad Reza Salehi, Saeed Ghrbani, A temperature cmpensated CMOS differential ring scillatr with lw pwer cnsumptin fr RFID applicatins, Internatinal Jurnal f Engineering & Technlgy Sciences, Vl.0, N. 1, pp , February 015. Shruti Suman, K. G. Sharma, P. K. Ghsh, Perfrmance Analysis f Vltage Cntrlled Ring Oscillatrs in 7

8 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., Prceedings f the Internatinal Cngress n Infrmatin and Cmmunicatin Technlgy (ICICT) - 015, Advances in Intelligent System., Cmputing (AISC), Vl. 49, Chapter 4, Publisher Springer, ISSN N , Octber 015. Ahmet Tekin, Mehmet R. Yuce, and Wentai iu, Integrated VCOs fr Medical Implant Transceivers, Hindawi Publishing Crpratin, 008. Shruti Suman, K. G. Sharma and P. K. Ghsh, Analysis and Design f Current Starved Ring VCO - in Internatinal Cnference n Electrical, Electrnics, and Optimizatin Techniques (ICEEOT), Chennai, ISBN N , IEEE Xplre Digital library, pp. -7, March 016. Vaishali, Shruti Suman, K. G. Sharma, P. K. Ghsh, Design f Ring Oscillatr based VCO with Imprved Perfrmance in Innvative Systems Design and Engineering, Vl.5, N., pp. 1-41, ISSN (Paper), ISSN -871 (Online), 014. B. Razavi, Design f analg CMOS integrated circuits, Tata McGraw - Hill, Third editin, 001. Zuw-Zun Chen and Tai-Cheng ee, The design and analysis f dual-delay-path ring scillatrs, IEEE Transactins n Circuits and Systems, Vl. 58, N., March 011, pp Adel S.Sedra and Kenneth C.Smith, Micrelectrnics Circuits, Thery and Applicatins, Oxfrd Publicatins, Sixth editin, 01. James Wilsn, "Jitter Attenuatin: Chsing the Right Phase-cked p Bandwidth," Silicn abratries Inc., James Wilsn, 010. Ulrich. Rhde Digital P Frequency Synthesizers Thery and Design, Prentice-Hall, ISBN , pp , 198. Adnan Gundel, "w Jitter Phase-cked p Clck Synthesis With Wide cking Range," New Jersey Institute f Technlgy, PhD Thesis, 007. Bris Drakhlis, "Calculate Oscillatr Jitter by using Phase-Nise Analysis Part," Micrwaves and RF, February 001, pp. 109, 001. A. Hajimiri and T. H. ee, A general thery f phase nise in electrical scillatrs, IEEE Jurnal f Slid- State Circuits, vl., pp Dnhee Ham, Ali Hajimiri, Virtual Damping and Einstein Relatin in Oscillatrs, IEEE J. Slid-State Circuits, vl. 8, n., March, 00. J. McNeill, Jitter in ring scillatrs, IEEE Jurnal f Slid-State Circuits, vl., pp , Y. Tsividis, Operatin and Mdeling f the MOS Transistr, McGraw-Hill, Asad A. Abidi, Phase nise and jitter in CMOS ring scillatrs IEEE Jurnal f Slid-State Circuits, Vl. 41, N. 8, pp , August 006. A. Demir, Phase Nise in Oscillatrs: DAEs and Clred Nise Surces, In Prc. IEEE ICCAD, pp , Shruti Suman is pursuing Ph. D. (ECE) frm Mdy University f Science and Technlgy, akshmangarh, Rajasthan since 01. She cmpleted her M. Tech. (VSI Design) in 01 frm Mdy Institute f Technlgy and Science akshmangarh, Sikar, Rajasthan, India and B. E. (ECE) frm Rajeev Gandhi Technical University, Bhpal, India, in 010. Her Research Interests are in Analg, Digital and Mixed Signal VSI Design. Currently she is Assistant Prfessr in the department f ECE, Cllege f Engineering and Technlgy, Mdy University f Science and Technlgy, akshmangarh, Rajasthan. K. G. Sharma cmpleted his B.E. (Electrnics and Cmmunicatin Engineering) frm M.M.M. Engineering Cllege, Grakhpur in 001 and M. Tech. (VSI Design) in 009 frm Mdy Institute f Science & Technlgy, akshmangarh. He earned Ph.D. (w Pwer VSI Design) frm SGV University, Jaipur in 01. Presently he is wrking as Assciate Prfessr in Chandigarh Cllege f Engineering & Technlgy. He published mre than 50 research papers in reputed jurnals and cnferences. He is editrial bard member and reviewer f sme reputed internatinal jurnals. His research area is w pwer VSI device design. P. K. Ghsh received his B.Sc. (Hns in Physics), B. Tech. and M. Tech. degrees in 1986, 1989, and 1991, respectively, all frm Calcutta University. He earned Ph.D. (Tech.) degree in Radi Physics and Electrnics in 1997 frm the same University. He served varius institutins, namely, Natinal Institute f Science and Technlgy (Orissa), St. Xavier s Cllege (Klkata), Murshidabad Cllege f Engineering and Technlgy (West Bengal), R. D. Engineering Cllege (Uttar Pradesh) and Kalyani Gvernment Engineering Cllege (West Bengal) befre he jins Mdy University f Science and Technlgy (Rajasthan). T his credit, he has mre than 80 research papers in Jurnals f repute and cnference prceedings. He is a life member f Indian Sciety fr Technical Educatin (ISTE), New Delhi. His research interests are in the areas f VSI circuits & devices, wireless cmmunicatins and signal prcessing. 8

9 Innvative Systems Design and Engineering ISSN -177 (Paper) ISSN -871 (Online) Vl.8, N., (a) (b) Figure 1 (a) Output spectrum f ideal scillatr (b) Output spectrum f actual scillatr Figure Fundamental mdel f ring VCO Figure Phase nise representatin with flicker nise cmpnent fr ring VCO Figure 4 Calculatin f jitter frm phase nise 9