PowerIn Connector to Power Modules

Transcription

1 LLPWM[:0] PLOK[:0] PULPWM RWR TM TRRV W[:0] S[:0] Sheet_ Sheet_ Sheet_ PULPWM LLPWM[:0] LL[:0] GT[:0] PWMto LL[:0] PULSR nalogsignalproc PULSR LL[:0] TTRIG[:0] TTRIG[:0] S[:0] W[:0] TRRV TM RWR NGT STTN GR M ITN HSFIL TSTR TRQ TK LKHZ_S LKM NTL RMP[:0] ST[:0] ST[:0] VK[:0] VK[:0] [:0] TTRIG[:0] [:0] SLK[:0] ST[:0] HKSLK S[:0] SOUNT[:0] HKS VRF VRF T[:] HKST HKMUXR[:0] HKMUXSL[:0] LLPWM[:0] PULPWM PLOK[:0] T[:0] SSRQ SSFLG SSUSY ILLM TGNT HWRSTL GT[:0] RMP[:0] SLK[:0] S[:0] GT[:0] RMP[:0] SLK[:0] S[:0] ILLM TGNT HWRSTL SSFLG T[:0] SSRQ SSUSY Sheet_ T[:0] SSRQ SSFLG SSUSY ILLM TGNT HWRSTL SInterface RT_S S[:0] W[:0] TRRV TM RWR NGT STTN GR M ITN HSFIL TSTR TRQ TK LKHZ_S LKM Sheet_ T[:] NGT STTN GR M ITN HSFIL TSTR TRQ TK LKHZ_S LKM VRF PLOK[:0] PULSR nalogprocif onnector to RaTR nalog oard T[:] SOUNT[:0] TMON[:] TIMON[:] TMP[:0] SOUNT[:0] TMON[:] TIMON[:] TMP[:0] Sheet_ HKST HKMUXSL[:0] HKMUXR[:0] HKS HKSLK VISTHIK HKS HKST VISTH HKSLK ISRT HKMUXSL[:0] HKMUXR[:0] VRF VP TIMON[:] LL[:0] PULSR Housekeeping Sheet_ iasvoltagegen Sheet_ PowerIn onnector to Power Modules VP PURFLWRT VP PURFLWRT IMONTHIK IMONTH VMONTHIK VMONTH PURFLWRT TMP[:0] TMON[:] RT_S 0 VK[:0] NVTHIK NVTH ISRT VISTHIK VISTH IMONTH IMONTHIK VMONTH VMONTHIK ISRT VMONTHIK VMONTH IMONTHIK IMONTH RT_S VISTHIK VISTH T: heck decoupling Go over analog versus digital grounds Finisn FPG pin assignment & add testpoints check locations TMP 0s Finish nalog Mux assignments heck spare gates/inputs termination rater igital ontrol oard Top Level Size ocument Number Rev ate: Thursday, February, 00 Sheet of

2 HWRSTL SRMT[:0] U TP TP TP SRMR0 0 SRMT0 0 O0 SRMR SRMT R0 O SRMR SRMT O TI TK SRMR SRMT 00K % N O SRMR SRMT PR O U U SRMT SRMR SRMT SRMT O SRMR SRMT R O SRMT SRMR SRMT R. % O SRMT SRMR. % R SRMT SRMR. % SRMT SRMR0 0.UF 00V 0 SRMT R SRMR [:0] SRMT0 0.0K % SRMR VK[:0] SRMR R SRMR 0 0.0K % SRMS 0 0.0uF 00V S SRMO O SRMW W _ 0 SRMR[:0] R 0.0K % R 0.0K % R 0.0K % R 0.0K % R0 0.0K % TKP PRP HKMUXSL[:0] UF 0V.0UF 0V TIP Series termination rqd for MUX inputs SRMR R SRMR SRMR 00 % SRMR 0 0 PULPWM SRMR0 SRMR LLPWM[:0] TP SRMR 0 TMSP 0 TMS PLOK[:0]. % R SRMR HighSpeed lock Terminate if not used SRMR HLK SRMR Routed locks Terminate if not used SRMR LK 0 SRMR 0 LK 0 SRMR[:0] Quadrant locks can be used instead as I/Os QLK U SRMR 0 QLK 0 SRMR QLK SRMR0 QLK 0 SRMO No onnects: 0, SRMS SXS SRMW ecouple at each pin of FPG Install wire at TRST jumper RMP[:0] prior to flight (TRST must be 0 0 GT[:0] hardwired to ground) JP SLK[:0] TRST 0 0 ST[:0] JUMPR S[:0] 0.0uF 00V 0.0uF 00V 0.0uF 00V 0.0uF 00V TTRIG[:0] 0 0 LKHZ_S SOUNT[:0] W 0 0 W W W 0 W0 0.0uF 00V 0.0uF 00V 0.0uF 00V 0.0uF 00V W[:0] S S 0 0 S 0 0 S 0 0 S0 0 0 S[:0] NGT HKSLK HKST HKS HKMUXR[:0] UF V V U RH0M VRF VOUT R 00 % _ T0 T T LKM R % 0 0PF T[:0] SSRQ SSFLG SSUSY ILLM T T T T T T T T0 T T T T T dd testpoints/pulldowns for spare I/Os _ Internal ctel rray Supply ecouple at each _ pin of FPG Place clock termination near R FPGPin R TSTR 0.0K % 0.0K % TRRV HSFIL TM RWR TK TOP R TO TP TP ITN STTN M GR TGNT TRQ PRP. % R. % PR TP RTR igital ontrol FPG Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

3 J R.00K % Use Vcc and digital ground here? (so that analog ground doesn't have to run to this segment of the board) RT_S To (chassis ONX mounted) RT TST TST RTddress = 0x0 RP set to 0 (for odd parity) roadcast mode disabled R 0 % W0 W W W W S0 S S S S T0 0 0 T[:0] Y T T TK T UFN Y 0 T T T ynamic us U0 G T ontrol R 0 % G 0 T disabled T HS SSRQ T0 SSRQ 0 T SSFLG T SSFLG T T V from S/ is received via chassis mounted MIFilter SSUSY 0 SSUSY T and routed to chassis mounted converters hassis Ground connected to Signal Ground at the Power RTFLG Supply ILLM TP0TPTPTP TGNT TGNT TRQ TK TRQ TSTR TK TSTR LK HWRSTL MSGRR RST MSGRR RTFIL RTFIL 0 HSFIL RTRR RTRR HSFIL T H_P J TXP_ N RXP_ N N TXN_ H_N ON N RXN_ Keep LK etch as short as possible, run TRNSFORMR as single line (no branches). T J TXP_ H_P RXP_ R 0.0K % R 0 % R 0 % R 0 % R 0 % R 0 % R 0 % 0 R_0 R_ R_ R_ R_ RP RON ILLM U0F00 GN GN GN 0_W0 _W _W _W _W _S0 _S _S _S _S 0_TR T_M R_WR NGT 0 M ITN 0 STTN GR TXN_ RXN_ H_N W[:0] S[:0] TRRV TM RWR NGT M ITN STTN GR 00 % R SHZ_P SHZ_N TRNSFORMR T output routed to hassis Mounted J (bus) T output routed to hassis Mounted J (bus) U Y Y ON R0 0 % LKHZ_S Y N 0.UF 00V 0.UF 00V 0.UF 00V 0.UF 00V 0.UF 00V GN OUT R 0 % LKM RTR igital ontrol Spacecraft Interface OSILLTOR MHz ecouple each Power/Gnd set of the U0 OUPL Oscillator and Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

4 TP TP TP U U VISTHIK NVTHIK TP0 VISTH NVTH UF U 0 TP TP TP TP IMONTH IMONTHIK VMONTH VMONTHIK TP TP VK[:0] VK0 VK TP TP TP onnections for the VIS subsystem ISRT rater igital ontrol oard ias Voltage Generation Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

5 VP T: Temp Sensor Locations 0 U 0 U R0 0.K % VMONV TMP[:0] TMP0 TMP VP VP TMP0 R ssume 0, biased TMP to nalog VP at 0.0K % location sensor site R R R R R R.K %.K %.K %.K %.0K % 0.0K % R JP.0K % R0.0K % R.0K % JUMPR U S VMONV 0 S R Used for testing only. nalog and VMONVP S R VMON igital grounds are connected at the S RT_S 00 % supply in the final configuration. S TMP0 RH.0K % RH S TMP[:0] TMP U0 0.0uF 00V U S TMP0 Voltage Range OK? S TMP S PURFLWRT 0 S0 LL[:0] LL0 S LL S IMONTH S IMONTHIK Scaling of these values? S VMONTH S VMONTHIK S R HKMUXR[:0] HKMUXR0 0 HKMUXR HKMUXSL[:0] HKMUXR. % HKMUXR U HKMUXSL0 N GN RF OUT HKST G.0V S TMP[:0] VRF SLK VRF R MX U TIMON[:] 00 % TIMON RH S TIMON 0 U0 Should the be connected S TIMON to GN or GN (it is S TIMON S R connected to the digital TIMON S supply)? TIMON S TMON[:] TMON.K % S TMON 0.0uF 00V S TMON R S PULSR 0 S0.K % S S S HKS S Need to add inputs (or assign the TMP inputs) for: S HKSLK ft ulkhead Temp S Forward ulkhead Temp HKMUXR0 Power Supply Temp 0 HKMUXR HKMUXR HKMUXR HKMUXSL N 0 GN G V VSS V VSS 0 0 V GN Radiation Tolerance of G sufficient? Housekeeping ntries: MUXR Measurement 0 V Monitor V Monitor V Monitor V Monitor RT S/ TMP0 TMP TMP0 nalog lec Temp TMP0 Telescope Temp Purge Flow Rate 0 LL0 Level LL Level IMONTH IMONTHIK VMONTH VMONTHIK etector urrent Monitors ose Monitor Test Pulser Level rater igital ontrol oard Housekeeping Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

6 PURFLWRT VP 0 0UF V 0UF V J F ecouple ecouple 0UF V 0UF V 0UF V istribute 0uF capacitors around board in Vcc regions VP/: Outputs of MI Filter fowarded to analog housekeeping rater igital ontrol oard Power In Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

7 PLOK[:0] PLOK0 U R 00 % PLK_L omparator output pullup option (dnp = do no populate resistors): current plan is to place the pullups on the analog board. U R R PLOK PLK_H.00K % (dnp) 00 % R0 U ny other termination recommended?.00k % (dnp) IS_ R SOUNT0 SOUNT[:0] R. %.00K % (dnp) U R IS_ R SOUNT.00K % (dnp). % U R.00K % (dnp) R.00K % (dnp) J IS_ R SOUNT 0. % 0 VRF R PLK_H PULSR U PLK_L IS_ R SOUNT 00 % nalog oard Requires 0V RH IS_ IS_ further scaling or termination. % U IS_ IS_ required? IS_ IS_ U IS_ 0 R SOUNT. % UF T T IS_ R T[:] SOUNT T 0 T. % 0 TMP[:0] T 0 T 0 TMP0 TMP TMON[:] TMON TMON TIMON TMON TIMON[:] TIMON TIMON TIMON TIMON TIMON VISTHIK VISTH 0 0 F ISRT TMP0: P Temperature TMP: T Temperature rater igital ontrol oard nalog oard Interface Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

8 T[:] RMP[:0] GT[:0] SLK[:0] S[:0] T RMP0 GT0 SLK0 S0 Sheet_ SIGON RMPON GTON SLKON SON T TTRIG SIGTHR TTRIGTHR RMP ST RMPTHR STTHR GT GTTHR SLK SLKTHR S STHR T RMP GT SLK S SIGFIV RMPFIV GTFIV SLKFIV SFIV SP_Thin TTRIGON STON TTRIGFIV STFIV TTRIG0 ST0 TTRIG ST TTRIG[:0] ST[:0] LL0 LLTH VRF Sheet_0 T TTRIG SIGTWO TTRIGTWO RMP ST RMPTWO STTWO GT GTTWO SLK SLKTWO S STWO T TTRIG SIGFOUR TTRIGFOUR RMP ST RMPFOUR STFOUR GT GTFOUR SLK SLKFOUR S SFOUR T RMP GT SLK S SIGSIX RMPSIX GTSIX SLKSIX SSIX SP_Thick TTRIGSIX STSIX TTRIG ST LL[:0] LL LLTHIK VRF U VS uF 00V ST VG P H OM 0V V.V VRF 0 VRF Should the be connected to GN or GN (it is connected to the digital supply)? ecouple RHs ecouple RHs rater igital ontrol oard nalog Signal Processing Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

9 VRF. % U R U OUT R SIGON OMP 0 % RXT VP % HRS V 000 PF RF OUT STON 000 PF (do not populate) HP PKT VRF SHG GT.0V IST RMP 0 S GN UMP SLK R R R PH00 RH MX U.0K % 00 %.K % RH U GN R 0 0 V GN R RMPON GTON R.00K % 0.0uF 00V 0.0K % LLTH SON SLKON TTRIGON. % U R0 U OUT R SIGTHR OMP 0 % RXT VP % HRS V 000 PF RF OUT STTHR VRF 000 PF (do not populate) HP PKT SHG GT.0V IST RMP 0 S GN UMP SLK R R R PH00 RH MX U.0K % 00 %.K % RH U GN R 0 0 V GN R RMPTHR GTTHR R.00K % 0.0uF 00V 0.0K % STHR SLKTHR. % U R U R SIGFIV OUT 0 % OMP % 0 VP RXT V HRS 000 PF RF OUT STFIV 000 PF (do not populate) HP PKT VRF SHG GT.0V IST RMP 0 S GN UMP SLK R R0 R PH00 RH MX.0K % 00 %.K % RH U GN R 0 V GN R TTRIGTHR 0 RMPFIV GTFIV R.00K % 0.0uF 00V 0.0K % SFIV SLKFIV TTRIGFIV ecouple PH00s rater igital ontrol oard Thin etector Signal hains Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of

10 VRF. % U R U R SIGTWO OUT OMP 0 % RXT VP % HRS V 000 PF RF OUT STTWO 000 PF (do not populate) HP PKT VRF SHG GT.0V IST RMP 0 S GN UMP SLK R00 R R0 PH00 RH MX U0.0K % 00 %.K % RH U GN R0 0 0 V GN R RMPTWO GTTWO R0.00K % 0 0.0uF 00V 0.0K % LLTHIK STWO SLKTWO TTRIGTWO. % U R0 U R0 SIGFOUR OUT OMP 0 % RXT VP % HRS V 000 PF RF OUT STFOUR VRF 000 PF (do not populate) HP PKT SHG GT.0V IST RMP 0 S GN UMP SLK R0 R0 R0 PH00 RH MX U.0K % 00 %.K % RH U GN R0 0 0 V GN R0 RMPFOUR GTFOUR R.00K % 0.0uF 00V 0.0K % SFOUR SLKFOUR. % U R U R SIGSIX OUT 0 % OMP % VP RXT V HRS 000 PF RF OUT STSIX 000 PF (do not populate) HP PKT SHG GT VRF.0V IST RMP 0 S GN UMP SLK R R R PH00 RH MX U.0K % 00 %.K % RH U GN R 0 V GN R TTRIGFOUR 0 RMPSIX GTSIX R.00K % 0.0uF 00V 0.0K % SSIX SLKSIX TTRIGSIX 0 ecouple PH00s rater igital ontrol oard Thick etector Signal hains Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet 0 of

11 R R0 0 K % 00 PF 00V K % 00 PF 00V R R PULSR R R PULPWM K %.K % RH K %.K % RH MHz 0.0uF 00V R MHz, 0V OUT 0.0uF 00V R K % Fc = 00 Hz K % 0 0 LLPWM[:0] R R.0K % 0.0uF 00V.0K % 0.0uF 00V LL[:0] R0 LL0 R R R LLPWM0.K %.K % RH.K %.K % RH 0.0uF 00V R 0.0uF 00V R.K %.K % 0 0 MHz MHz, 0V OUT Fc = 00 Hz R R.0K % 0.0uF 00V.0K % 0.0uF 00V R R LL R R0 LLPWM.K %.K % RH.K %.K % RH 0 0.0uF 00V R 0.0uF 00V R.K %.K % 0 0 rater igital ontrol oard PWM to onverters (Test Pulse and LL) Size ocument Number Rev 000 see Sh. ate: Thursday, February, 00 Sheet of